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Sega Hikaru

From Sega Retro

Hikaru mainPCB.jpg
Fast facts on Sega Hikaru
Manufacturer: Sega
Release Date RRP Code
Arcade
World
1999-05 837-13402


The Sega Hikaru is a successor of the Sega NAOMI and Sega Model 3 arcade systems that was developed in 1998 and debuted in 1999. The Hikaru was used for a handful of deluxe dedicated-cabinet games, beginning with 1999's Brave Fire Fighters, in which the flame and water effects were largely a showpiece for the hardware.

It was significantly more powerful and expensive than the NAOMI. The Hikaru featured a custom Sega GPU with advanced graphical capabilities, additional CPU and sound processors, various custom processors, increased memory, and faster bandwidth. It was the first game platform capable of effective hardware Phong shading, the most intensive form of shading at the time, and was capable of the most complex lighting and particle effects of its time.

It was the most powerful game system of its time (Planet Harriers in particular was regarded as having the best video game graphics at the time), but it was very expensive and difficult to program. Since it was comparatively expensive to produce, Sega soon abandoned the Hikaru in favor of continued NAOMI development. It was succeeded by the NAOMI 2, which was quite not as powerful but more affordable.[1]

Development

According to Sega in 1999:[2]

Brave Firefighters utilizes a slightly modified Naomi Hardware system called Hikaru. Hikaru incorporates a custom Sega graphics chip and possesses larger memory capacity then standard Naomi systems. "These modifications were necessary because in Brave Firefighters, our engineers were faced with the daunting challenge of creating 3d images of flames and sprayed water," stated Sega's Vice President of Sales and Marketing, Barbara Joyiens. "If you stop and think about it, both have an almost infinite number of shapes, sizes, colors, levels of opaqueness, shadings and shadows. And, when you combine the two by simulating the spraying of water on a flame, you create an entirely different set of challenges for our game designers and engineers to overcome; challenges that would be extremely difficult, if not impossible to overcome utilizing existing 3D computers. Hikaru has the horsepower to handle these demanding graphic challenges with clarity, depth and precision."

In addition, the Hikaru also uses two Hitachi SH-4 CPU processors, two Yamaha AICA sound engine processors, a Motorola 68000 network CPU, and a dual GPU setup. The Hikaru hardware was largely complete in 1998, before it was released to the public in 1999.[3] The system was very expensive, and difficult to program.[1] The word "Hikaru" (ひかる) means "to shine" in Japanese.

Specifications

Main

  • Main CPU: 2× Hitachi SH‑4 @ 200 MHz[6]
    • Units: 2× 128‑bit SIMD vector units with graphic functions, 2× 64‑bit floating‑point units, 2× 32‑bit fixed‑point units
    • Bus width: 256‑bit (2× 128‑bit) internal, 128‑bit (2× 64‑bit) external
    • Fixed‑point performance: 720 MIPS
    • Floating‑point performance: 2.8 GFLOPS
    • Note: With Sega Custom 3D GPU, the SH‑4's 128‑bit SIMD matrix unit can be dedicated to game physics, artificial intelligence, collision detection, overall game code, or additional graphical performance.
  • MIE bridge MCU: Sega 315‑6146 Maple‑JVS MCU (Zilog Z80)[7][8] @ 14.7456 MHz[3] (8/16‑bit instructions, 8‑bit bus, 2.14 MIPS)
  • Memory controllers: 2× Sega 315‑6154 Memory Controller @ 200 MHz (2× 32‑bit, DMA capabilities)[4][3][9]
  • Main Board PLD: 27 units, 928‑bit (25 GB/sec) internal, 640‑bit (21 GB/sec) external[3]Media:Hikaru rombd upright.jpg[10]
    • 2× Sega PAL (Lattice GAL16V8) GAL @ 250 MHz: 16 units (2× 8 units), 128‑bit (2× 64‑bit), DMA control, graphics processing,[11] 4 GB/sec
    • Sega 315‑6083A, 315‑6085, 315‑6086 @ 250 MHz: 3 units, 384‑bit (3× 128‑bit), 12 GB/sec
    • Sega 315‑6202 (Lattice CY37128) CPLD @ 167 MHz: 8 units, 416‑bit (8× 52‑bit) internal (9 GB/sec), 128‑bit (8× 16‑bit) external (3 GB/sec)[12]
  • Network Board processors:[3]
    • Network CPU: Motorola 68000 @ 40 MHz (16/32‑bit instructions, 16‑bit bus, 7 MIPS)[3]
    • Network PLD: FPGA @ 180 MHz (32‑bit),[13]PAL @ 40 MHz, Sega 315‑5804 CPLD @ 40 MHz
    • Network processors: 2× Sega 315‑5917 @ 40 MHz
  • ROM Board processors:[3]
    • ROM Board PLD: FPGA @ 180 MHz (32‑bit),[13] CPLD/PAL @ 182 MHz (32‑bit)[14][15]
    • Security IC: Sega 315-5881 @ 28 MHz

Sound

Graphics

The Sega Hikaru uses custom 3D graphics hardware, which include the following specifications:[16][17][4]

  • Graphics Engine GPU: Sega Custom 3D GPU @ 250 MHz
  • GPU core processors: 7 processors[3]Media:Hikaru rombd upright.jpg[10]
    • 2× Sega GPU 15 CP Command Processors (315‑6197) @ 250 MHz: 512‑bit (2× 256‑bit), Geometry Processor
    • Sega GPU 1A Image Generator (315‑6087) @ 250 MHz: 128‑bit, rasterizer/renderer[18]
    • 2× Sega GPU DMA controllers (315‑6084) @ 250 MHz: 256‑bit (2× 128‑bit)
    • 2× Analog Devices ADV7120 Video DAC @ 80 MHz: 48‑bit (2× 24‑bit)[19]
  • GPU Geometry Processors: 2× Sega GPU 15 CP Command Processors
    • Hardware T&L: Transform, clipping, lighting
    • Materials: Flat shading, Gouraud shading, Phong shading, diffuse, ambient, specular, unlit
    • Fog: Color, transparency, density, depth blend, translucency
    • Rendering: Double‑buffered 3D rendering (odd & even frames), depth cueing, depth buffer, depth bias, face culling, static meshes, dynamic meshes
    • Shading: Flat shading, Gouraud shading, Phong shading, diffuse, ambient, specular, linear
    • Modelview matrix: Instanced drawing, multiple instances, shared attributes between models,[20] modelview stack
    • Object memory: 8 viewports, 256 modelviews, 16,384 materials (256 LOD levels), 16,384 textures/texheads (256 LOD levels), 1024 lights (256 light sets)
  • GPU DMA controllers: 2× Sega GPU DMA controllers
    • GPU IDMA (Indirect DMA) controller: Loads texture data from MaskROM (via external bus) into texture banks (with metadata), allows CPU access to texture banks
    • DMA controller: Moves textures around in framebuffer, transfers bitmap data to bitmap layers, allows CPU access to framebuffer
  • Color depth: 32‑bit ARGB, 16,777,216 colors (24‑bit color) with 8‑bit (256 levels) alpha blending, YUV and RGB color space, color key overlay
  • Display resolution: 31 kHz horizontal sync, 60 Hz refresh rate, 80 MHz Video DAC, JAMMA/VGA output, progressive scan[3][19]
    • Single monitor display: 496×384 to 800×608 (default 640×480)
    • Dual monitor display: 992×384 to 1600×608 (default 1280×480)
    • Video output: 496×384 to 1968×1080 (default 640×480)
    • Framebuffer: 496×384 to 2048×2048 (default 2048×2048)[3]
  • Lighting: 1024 lights per scene, 4 lights per polygon, 256 light sets per scene (4 lights per set), 8 window surfaces
    • Light types: Diffuse, ambient, specular, horizontal, spot
    • Emission types: Constant, linear, infinite linear, square, reciprocal, reciprocal squared
    • Object types: Lights (with individual position, direction and emission properties), lightsets (a set of up to 4 lights that share a mesh)
  • GPU capabilities: 2 bitmap layers, calendar, 16,384 vertices per mesh,[21] hidden surface removal, deferred rendering
  • Texture capabilities: 1×1 to 2048×2048 texture sizes, mipmapping, mipmap trees, texture panning, multi‑texturing, bump mapping, normal mapping, texture filtering, bilinear filtering, trilinear filtering, environment mappingMedia:NAOMI 1998 Press Release JP.pdf[22]
    • Texture banks: 2 texture banks (stored as 2× 2048×1024 sheets), stores textures from MaskROM (with 16‑byte metadata per texture in Command RAM)
  • Floating-point performance: 15–30 GFLOPS[n 1]
  • Rendering fillrate:
  • Texture fillrate:
    • Opaque polygons: 8 GTexels/s
    • Translucent polygons: 4 GTexels/s (8bpp), 2 GTexels/s (16bpp), 1.3 GTexels/s (24bpp)[n 4]
  • Phong shading performance:
    • 2 million polygons/sec: 4 lights/polygon, 50-100-pixel polygons[n 5]
    • 3-6 million polygons/sec: 4 lights/polygon, 32-pixel polygons[n 6]
    • 10-20 million polygons/sec: 1 light/polygon, 32-pixel polygons[n 7]
  • Gouraud shading performance:
    • 30-60 million polygons/sec: 4 lights/polygon,[n 8] 32-pixel polygons
    • 100-200 million polygons/sec: 1 light/polygon,[n 9] 32-pixel polygons
  • Texture mapping performance:
    • 80 million polygons/sec: 50-100-texel polygons
    • 100-200 million polygons/sec: 32-texel polygons

Memory

Bandwidth

  • Internal processor cache bandwidth:[3]
    • SH‑4 cache: 6.4 GB/s[n 21]
    • Sega Custom 3D GPU: 32 GB/s
    • AICA Sound Processor: 536 MB/s[n 22]
    • Z80 MIE MCU: 15 MB/s[n 23]
    • 315‑6154 Memory Controllers: 1.6 GB/s[n 24]
    • Main Board PLD: 25 GB/sec[n 25]
    • ROM Board PLD: 1.45 GB/s[n 26]
    • Network Board 68000: 80 MB/s[n 27]
    • Network Board FPGA: 720 MB/s[n 28]
  • RAM bandwidth: 35.111 GB/s[3]
  • ROM bandwidth: 4 GB/s[3]
    • Boot ROM: 800 MB/s[n 42]
    • ROM Board PLD: 1.45 GB/s[n 43]
    • ROM Board Connectors: 1.5 GB/s[n 44]

Notes

  1. Phong shading: 2 million polygons/sec, 4 light sources per polygon, 7,898–15,796 floating-point operations per 100-pixel polygon, 15–30 GFLOPS
  2. 32 pixels per cycle,[25] 250 MHz
  3. 3.2 GB/s framebuffer SDRAM bandwidth (double-buffered)
  4. 8 GB/s texture bank RAM bandwidth (double-buffered)
  5. 7,898–15,796 floating-point operations per 50-100-pixel polygon for 4 light sources (196 operations setup, 156 operations per pixel),[26] 15–30 GFLOPS
  6. 5188 floating-point operations per 32-pixel polygon for 4 light sources (113 operations setup, 156 operations per pixel )[26]
  7. 1297 floating-point operations per 32-pixel polygon for 1 light source (49 operations setup, 39 operations per pixel)[26]
  8. 181 floating-point operations per vertex/polygon: 113 operations for transformation, 68 operations for 4 light sources (17 operations per light source)[27]
  9. 130 floating-point operations per vertex/polygon: 113 operations for transformation, 17 operations for 1 light source[27]
  10. 64 MB RAM, 66 MB ROM
  11. 30.25 MB RAM, 256 MB ROM
  12. 16 MB RAM, 32 MB ROM
  13. 384 KB RAM, 96 KB cache
  14. 32 MB per SH‑4
  15. 2× 315‑6197
  16. 2× 315‑6084
  17. IC 44‑47[3]
  18. 1 MB Geometry Processor, 1 MB Image Generator
  19. 8 MB per AICA
  20. 48 KB per SH‑4 CPU[35]
  21. 256‑bit, 200 MHz
  22. 2× 32‑bit, 67 MHz
  23. 23.0 23.1 8‑bit, 14.7456 MHz
  24. 64‑bit, 200 MHz
  25. 928‑bit, 250 MHz
  26. 2× 32‑bit, 180/182 MHz
  27. 16‑bit, 40 MHz
  28. 32‑bit, 180 MHz[13]
  29. 192‑bit, 100 MHz, 6 ns[28]
  30. 128‑bit
  31. 64‑bit
  32. 1088‑bit, 4.5 ns
  33. 315‑6197, 512‑bit, 250 MHz
  34. 315‑6084, 256‑bit, 250 MHz
  35. 9× 32‑bit, 200 MHz, 4.5 ns[29]
    • Framebuffer: 3.2 GB/s (4x 32‑bit,[3] 200 MHz)
  36. 32‑bit, 100 MHz, 5 ns[30]
  37. 32‑bit, 67 MHz, 6 ns[36]
  38. 72‑bit, 45 ns[31]
  39. 16‑bit, 22.222222 MHz
  40. 48‑bit, 22.222222 MHz
  41. 16‑bit, 125 MHz, 8 ns[32]
  42. 64‑bit, 100 MHz[37]
  43. 2× 32‑bit, 180/182 MHz[13][14][15]
  44. 2x 32‑bit, 182 MHz

Hardware Images

List of Games

References

  1. 1.0 1.1 File:NextGeneration US 76.pdf, page 37
  2. 2.0 2.1 Sega Confirms Hikaru Does Exist (November 24, 1999)
  3. 3.00 3.01 3.02 3.03 3.04 3.05 3.06 3.07 3.08 3.09 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 Sega Hikaru (MAME)
  4. 4.0 4.1 4.2 4.3 Sega Hikaru Memory Controller (Valkyrie)
  5. Sega Hikaru AICA Sound Boards (Valkyrie)
  6. File:SH-4 Software Manual.pdf
  7. 7.0 7.1 Sega Hikaru MIE (Valkyrie)
  8. Demul 0.56 (1 September 2010)
  9. 9.0 9.1 Sega Hikaru (Valkyrie)
  10. 10.0 10.1 File:Hikaru rombd upright.jpg
  11. File:GAL16V8 datasheet.pdf
  12. File:CY37 datasheet.pdf
  13. 13.0 13.1 13.2 13.3 File:PLSI2032 datasheet.pdf
  14. 14.0 14.1 File:M4A3 datasheet.pdf
  15. 15.0 15.1 File:MACH111 datasheet.pdf
  16. 16.0 16.1 Sega Hikaru GPU (Valkyrie)
  17. Sega Hikaru GPU CP (Valkyrie)
  18. Sega Hikaru Renderer (Valkyrie)
  19. 19.0 19.1 File:ADV7120 datasheet.pdf
  20. Instanced Rendering
  21. Sega Hikaru GPU Private (Valkyrie)
  22. 22.0 22.1 File:NAOMI 1998 Press Release JP.pdf
  23. Computer Graphics: Principles and Practice (Page 871)
  24. Computer Graphics: Principles and Practice (Page 900)
  25. Sega NAOMI
  26. 26.0 26.1 26.2 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (Page 78)
  27. 27.0 27.1 Design of Digital Systems and Devices (pages 95-97)
  28. 28.0 28.1 File:HM5264 datasheet.pdf
  29. 29.0 29.1 File:HY57V161610D datasheet.pdf
  30. 30.0 30.1 File:UPD432232 datasheet.pdf
  31. 31.0 31.1 31.2 File:HM62256B datasheet.pdf
  32. 32.0 32.1 File:CY7C199 datasheet.pdf
  33. Planet Harriers (MAME)
  34. Hideki Sato Sega Interview (Edge)
  35. File:SH-4 32-bit CPU Core Architecture.pdf
  36. File:K4S641632 datasheet.pdf
  37. File:CY2292 datasheet.pdf
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