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Yamaha known to have first appeared in the late 1980s. The chip implements Yamaha Operator Type-N (OPN) frequency modulation synthesis, and is given the designation OPN2, however it is not the second OPN chip — the YM2203 (OPN) and YM2608 (OPNA) are known to precede it, with possible others as well. A CMOS version, the YM3438/OPN2C, was also manufactured by Yamaha.
By default, the chip can generate six simultaneous tones, each with their own configuration of FM operators. As with all OPN chips, the third channel can be modified to have each operator run at a different frequency — this is often called "special" or "multifrequency" mode. The sixth channel can be swapped out for a software-controlled 8-bit PCM channel mixed directly into the output waveform. Finally, there is a single LFO which acts on all FM channels, but each channel can be set to be affected by it differently.
The YM2612/YM3438 was only notably used on the Sega Mega Drive game console, Sega System 32 arcade board, and the Fujitsu FM Towns computer. However, its use on the Mega Drive meant it was also used on hardware derived from it — including arcade boards, where the YM3438 was used. Several Mega Drive 2s also used the YM3438 core.
OPN FM synthesis is similar to other forms of Yamaha FM synthesis, in that it consists of a number of operators connected in a variety of ways, each operator consisting of a modified ADSR envelope, rate scaling, frequency multiplication, detuning, and a SSG envelope generator (the YM2612 does not include the YM2149 [AY-3-8910 clone] core found in other OPN chips, but the envelope generator remains).
Communication with the YM2612 is serial. Each parameter the chip provides is accessed by first sending a register number to the chip, then the register's value. Because Yamaha's register layout only allows four channels on a single register map, the YM2612 uses two ports to access each group of three channels.
The YM2612 also contains two timers — the high frequency Timer A and lower frequency Timer B. While the YM2612 can be set to interrupt a CPU when a timer reaches zero, sadly Sega did not make this connection on the Mega Drive, requiring timers to be checked in software.
When Channel 6 is in DAC mode, the controlling CPU must stream 8-bit unsigned PCM data to the YM2612 fast enough to be played back at the optimal playback speed. The maximum sample rate depends on the sample rate of the chip, but keep in mind that register writes must be synchronized to when the chip is ready — this is checked by polling the YM2612's status register and seeing if its Busy bit is set or not.