Difference between revisions of "Sega Model 1"

From Sega Retro

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** Bus width: [[#Bandwidth|112-bit]] (16/32‑bit each)
 
** Bus width: [[#Bandwidth|112-bit]] (16/32‑bit each)
 
** Notes: DSP coprocessors located on Main Board. DSP are modified by Sega with custom microcode. One DSP used as coprocessor, others used as T&L geometry units.{{ref|[http://wiki.mamedev.org/index.php/TGP:Index TGP (MAME)]}}
 
** Notes: DSP coprocessors located on Main Board. DSP are modified by Sega with custom microcode. One DSP used as coprocessor, others used as T&L geometry units.{{ref|[http://wiki.mamedev.org/index.php/TGP:Index TGP (MAME)]}}
** T&L fixed‑point arithmetic: 32‑bit instructions @ 128 MIPS (32 MIPS per T&L unit){{ref|80 million [[wikipedia:Multiply–accumulate operation|MACs]]/sec{{fileref|MB86232 datasheet.pdf|page=33}}|group=n}}
+
** T&L fixed‑point arithmetic: 32‑bit instructions @ 128 MIPS (32 MIPS per T&L unit){{ref|64 million [[wikipedia:Multiply–accumulate operation|MACs]]/sec{{fileref|MB86232 datasheet.pdf|page=33}}|group=n}}
** T&L [[wikipedia:Floating point unit|Floating‑point unit]]: 32‑bit operations @ 64 MFLOPS (16 MFLOPS per T&L unit){{ref|40 million MACs/sec, 40 million divides/sec{{fileref|MB86232 datasheet.pdf|page=33}}|group=n}}
+
** T&L [[wikipedia:Floating point unit|Floating‑point unit]]: 32‑bit operations @ 64 MFLOPS (16 MFLOPS per T&L unit){{ref|32 million MACs/sec, 32 million divides/sec{{fileref|MB86232 datasheet.pdf|page=33}}|group=n}}
 
* GPU [[wikipedia:Rasterisation|Rasterizer]] Video Board: Sega 837‑7894 171‑6080D Video PCB @ 36 MHz,{{ref|[https://www40.atwiki.jp/arcadegames/pages/17.html MODEL1 (アーケードゲーム基板@ ウィキ)]}} custom [[wikipedia:Programmable logic device|programmable logic devices]] programmed by Sega
 
* GPU [[wikipedia:Rasterisation|Rasterizer]] Video Board: Sega 837‑7894 171‑6080D Video PCB @ 36 MHz,{{ref|[https://www40.atwiki.jp/arcadegames/pages/17.html MODEL1 (アーケードゲーム基板@ ウィキ)]}} custom [[wikipedia:Programmable logic device|programmable logic devices]] programmed by Sega
 
** 315‑5292: [[Fujitsu]] [[wikipedia:Large Scale Integration|LSI]] ([[wikipedia:Quad Flat Package|QFP160]]), [[Sega System 24]] [[wikipedia:Tile-based video game|tilemap]] generator,{{ref|[https://github.com/bji/libmame/blob/master/old/src/mame/video/segaic16.c Sega 16‑Bit Common Hardware], [[MAME]]}}{{intref|Sega System 24 Hardware Notes (2013-06-16)}} 2D [[Sprite|tiled]] backgrounds
 
** 315‑5292: [[Fujitsu]] [[wikipedia:Large Scale Integration|LSI]] ([[wikipedia:Quad Flat Package|QFP160]]), [[Sega System 24]] [[wikipedia:Tile-based video game|tilemap]] generator,{{ref|[https://github.com/bji/libmame/blob/master/old/src/mame/video/segaic16.c Sega 16‑Bit Common Hardware], [[MAME]]}}{{intref|Sega System 24 Hardware Notes (2013-06-16)}} 2D [[Sprite|tiled]] backgrounds

Revision as of 07:04, 14 November 2016

Model1 board.jpg
Sega Model 1
Manufacturer: Sega
Release Date RRP Code

The Sega Model 1 is an arcade system board that was released by Sega in 1992. It is the successor to the Sega System 32 (released in 1990), and was succeeded by the Sega Model 2 (released in 1993). While earlier Sega hardware was capable of handling 3D polygons (such as the Mega Drive, released in 1988), the Model 1 was Sega's first hardware specifically designed for 3D polygon graphics.

Originally, the Model 1 was simply known as the CG Board, but was retroactively given the Model 1 name after work on the Model 2 began. Both the Model 1 and Model 2 were eventually succeeded by the Sega Model 3.

Hardware

It began development in 1990,[1] with Yu Suzuki's Sega AM2 team involved in its development from the drawing board.[2] The Model 1 was intended to compete with Namco's System 21; Namco was then the market leader in polygonal 3D video games, with titles such as Galaxian³ and Starblade.[3] The Model 1 was eventually released in 1992, debuting with Virtua Racing. While it was a significant improvement over the System 21, the Model 1 hardware was expensive, and only a few games were developed for the platform.

Unlike the Model 2, Lockheed Martin was not involved with the development of the Model 1, but it was developed internally at Sega, before Lockheed Martin became involved with the development of the Sega Model 2, according to former Lockheed Martin employee, Real3D's Jon Lenyo, in 1998.[1]

Like the Model 2, Fujitsu was involved with the development of the Model 1. They provided the DSP coprocesors, which were modified by Sega with custom microcode for hardware T&L capabilities;[4] hardware T&L would not appear on consumer home systems for many years. Fujitsu also provided several other components, including the tilemap generator chip, the DMA controllers, and several memory chips.

According to Yu Suzuki:[5]


dedicated 3D processors didn’t exist yet, and so I had to manually write a 3D graphics engine that would compress and process things faster. Just using assembly language. Now, of course, everyone writes in C++, but back then there was no other choice than machine code, otherwise we wouldn't be able to make everything fast enough.

Yu Suzuki


The Model 1 also had support for the Sega VR headset. It was used for only one known Model 1 game, Dennou Senki Net Merc. It is unknown whether Model 1 hardware was used for the VR-1.

Technical Specifications

Technical specifications for Sega Model 1 hardware:[6]

  • Board composition: Main Board, Video Board, Memory Board, I/O Board, Communication Board, Sound Board, Motor Board, Audio Mix Board, Amp Board
    • Board revisions: CPU Board 837‑8886171‑6298C (40 MHz), Video PCB 837‑7894 (36 MHz), Memory Board 837‑7893, I/O PCB 837‑8950‑01 (32 MHz), Motor PCB SJ25‑0155‑01 (8 MHz), Communication Board 837‑8842, Sound Board 837‑8679 (20 MHz), Audio Mix PCB 839‑0542, Amp PCB 838‑10018
  • Main CPU: NEC V60 @ 16 MHz[7][8]
  • Additional CPU: 3× Zilog Z80 @ 4 MHz (8‑bit & 16‑bit instructions @ 1.74 MIPS)
    • CPU for I/O Board, Comm Board and Motor Board
  • DMA controllers: Fujitsu MB89237A DMAC, Fujitsu MB89374 Data Link Controller[9][10]

Sound

  • Sound CPU: Toshiba TMP68000N‑10 (68000) @ 12 MHz
  • Sound chips: 2× Sega 315‑5560 Custom MultiPCM
    • Audio capabilities: 28 PCM channels per chip (one for music, one for sound effects), 56 PCM channels total
  • Sound timer: Yamaha YM3834 @ 8 MHz

Graphics

Graphical capabilities of the Sega Model 1:[11]

Memory

  • Memory: Up to 39,166 KB (7008 KB main, 23,646 KB video, 8512 KB audio)
  • System RAM: 2776 KB (1896 KB high‑speed SRAM)
    • Main RAM: 480 KB (at least 156 KB SRAM)
      • Main Board: 324 KB (320 KB main, 4 KB comm)
      • Comm Board: 12 KB SRAM (8 KB SRAM, 4 KB Dual‑Port SRAM)[19][20]
      • Other boards: 144 KB SRAM (128 KB Memory Board, 8 KB I/O Board, 8 KB Motor Board)
    • VRAM: 2232 KB (at least 1464 KB SRAM)
      • Main Board: 768 KB (128 KB display lists, 576 KB tiles, 64 KB color)
      • Video Board: 1464 KB SRAM (1024 KB framebuffers)
    • Audio RAM: 64 KB (16 KB SRAM)
  • Internal DSP cache: 30 KB (6 KB per DSP)[13]
  • System ROM: 1 MB EPROM (768 KB Memory Board, 64 KB I/O Board, 64 KB Motor Board, 128 KB Comm Board)
  • Game ROM: Up to 35,336 KB (5504 KB main EPROM/MROM, 21,384 KB video MROM,[21] 8.25 MB audio MROM)[22]

Bandwidth

  • System RAM bandwidth: 664.224 MB/s
    • Main RAM: 76 MB/s
      • V60: 64 MB/s (32‑bit, 16 MHz)[23]
      • Z80: 12 MB/s (3× 8‑bit, 4 MHz)[24][25][20]
    • VRAM: 568.223776 MB/s
      • DSP: 320 MB/s (5× 32‑bit, 16 MHz)[23]
      • Video Board: 248.223776 MB/s (112-bit)
        • 315‑5422 & 315‑5292: 30.769232 MB/s (32‑bit, 7.692308 MHz, tilemaps)[26]
        • 315‑5423: 72 MB/s (16‑bit, 36 MHz)[23]
        • 315‑5424 & 315‑5425: 145.454544 MB/s (64‑bit, 18.181818 MHz, framebuffers)[27]
    • Audio RAM: 20 MB/s (16‑bit, 10 MHz)[24]
  • Internal processor bandwidth: 384 MB/s
    • V60: 64 MB/s (32‑bit, 16 MHz)
    • DSP cache: 320 MB/s (5× 32‑bit, 16 MHz)
  • System ROM bandwidth: 64 MB/s (32‑bit, 16 MHz)[28]
  • Game ROM bandwidth: 211 MB/s (3× 32‑bit)
    • EPROM: 64 MB/s (32‑bit, 16 MHz)[28]
    • MROM: 147 MB/s (2× 32‑bit, 20 MHz & 16.666667 MHz, 50/60 ns)[29][30]

List of Sega Model 1 games

Gallery

Notes

  1. [64 million MACs/sec[14] 64 million MACs/sec[14]]
  2. [32 million MACs/sec, 32 million divides/sec[14] 32 million MACs/sec, 32 million divides/sec[14]]
  3. [144 MB/sec framebuffer bandwidth, double-buffered, 16-bit color 144 MB/sec framebuffer bandwidth, double-buffered, 16-bit color]

References


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