Difference between revisions of "Sega Model 2"
From Sega Retro
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| maker=[[Sega]] | | maker=[[Sega]] | ||
| distributor= | | distributor= | ||
− | | variants= | + | | variants=Model 2A-CRX, Model 2B-CRX, Model 2C-CRX |
− | | add-ons= | + | | add-ons=DSB1/DSB2 (Model 2C-CRX) |
| processor= | | processor= | ||
| internal_games= | | internal_games= | ||
| releases={{releases | | releases={{releases | ||
| arcade_date_jp=[[Amusement Machine Show 1993|1993-08]] | | arcade_date_jp=[[Amusement Machine Show 1993|1993-08]] | ||
− | | arcade_date_us=1994 | + | | arcade_rrp_jp=2,200,000 {{fileref|MeanMachinesSega22UK.pdf|page=93}} |
+ | | arcade_date_us=1994-03 | ||
| arcade_rrp_us=15,000 {{ref|http://www.thg.ru/smoke/19991022/print.html}} | | arcade_rrp_us=15,000 {{ref|http://www.thg.ru/smoke/19991022/print.html}} | ||
− | | arcade_date_eu=1994 }} | + | | arcade_date_eu=1994-03 |
+ | | arcade_rrp_uk=16,000 {{fileref|MeanMachinesSega22UK.pdf|page=93}} | ||
+ | | arcade_date_world=1994 | ||
+ | }} | ||
}} | }} | ||
The '''Sega Model 2''' is an [[arcade]] system board originally debuted by [[Sega]] in 1993 as a successor to the [[Sega Model 1]] board. It is an extension of the Model 1 hardware, most notably introducing the concept of texture-mapped polygons, allowing for more realistic 3D graphics for its time. The Model 2 board was an important milestone for the arcade industry, and helped launch several key arcade franchises of the 1990s, including ''[[Daytona USA]]'', ''[[Virtua Cop]]'', ''[[Sega Rally Championship]]'', ''[[Dead or Alive]]'', ''[[Virtua Striker]]'', ''[[Cyber Troopers Virtual-On]]'' and ''[[The House of the Dead]]''. | The '''Sega Model 2''' is an [[arcade]] system board originally debuted by [[Sega]] in 1993 as a successor to the [[Sega Model 1]] board. It is an extension of the Model 1 hardware, most notably introducing the concept of texture-mapped polygons, allowing for more realistic 3D graphics for its time. The Model 2 board was an important milestone for the arcade industry, and helped launch several key arcade franchises of the 1990s, including ''[[Daytona USA]]'', ''[[Virtua Cop]]'', ''[[Sega Rally Championship]]'', ''[[Dead or Alive]]'', ''[[Virtua Striker]]'', ''[[Cyber Troopers Virtual-On]]'' and ''[[The House of the Dead]]''. | ||
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{{multicol| | {{multicol| | ||
*Board composition: CPU Board, Video Board, Communication Board, ROM Board, Sound Board, Feedback Driver Board {{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp}} | *Board composition: CPU Board, Video Board, Communication Board, ROM Board, Sound Board, Feedback Driver Board {{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp}} | ||
− | ** Revisions: CPU Board 837-10071, Video Board 837-10072, Communication Board 837-10537, ROM Board 834-10798, Sound Board 837-8679, Drive Board 838-10646 {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}} | + | ** Revisions: CPU Board 837-10071 (50 MHz), Video Board 837-10072 (50 MHz), Communication Board 837-10537, ROM Board 834-10798, Sound Board 837-8679 (20 MHz), Drive Board 838-10646 {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}} |
*Main [[wikipedia:Central processing unit|CPU]]: [[wikipedia:Intel i960|Intel i960-KB]] @ 25 MHz | *Main [[wikipedia:Central processing unit|CPU]]: [[wikipedia:Intel i960|Intel i960-KB]] @ 25 MHz | ||
− | ** [[wikipedia:Fixed-point arithmetic|Fixed-point arithmetic]]: | + | ** [[wikipedia:Fixed-point arithmetic|Fixed-point arithmetic]]: 32-bit [[wikipedia:Reduced instruction set computing|RISC]] [[wikipedia:Instruction set|instructions]] @ 25 [[wikipedia:Instructions per second|MIPS]] {{fileref|I960 datasheet.pdf}} |
− | ** [[wikipedia:Floating-point unit|Floating-point unit]]: [[wikipedia:Single-precision floating-point format|32 | + | ** [[wikipedia:Floating-point unit|Floating-point unit]]: [[wikipedia:Single-precision floating-point format|32]]/[[wikipedia:Double-precision floating-point format|64]]/[[wikipedia:Extended precision|80-bit]] operations @ 13.6 MFLOPS {{fileref|80960KB datasheet.pdf}} |
− | ** Bus width: 32-bit | + | ** Bus width: [[wikipedia:32-bit|32-bit]] |
− | *Additional CPU: 2× [[Zilog]] [[Z80]] (8 | + | *Additional CPU: 2× [[Zilog]] [[Z80]] (8/16-bit instructions @ 1.74 MIPS) |
**Communication Board: 8 MHz {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|http://pdf.datasheetarchive.com/indexerfiles/Scans-068/DSA2IH00225160.pdf}} (1.16 MIPS) | **Communication Board: 8 MHz {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|http://pdf.datasheetarchive.com/indexerfiles/Scans-068/DSA2IH00225160.pdf}} (1.16 MIPS) | ||
**Feedback Driver: 4 MHz {{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp}} (0.58 MIPS) | **Feedback Driver: 4 MHz {{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp}} (0.58 MIPS) | ||
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====Sound==== | ====Sound==== | ||
{{multicol| | {{multicol| | ||
− | * Sound CPU: [[Motorola 68000]] @ 10 MHz (16 | + | * Sound CPU: [[Motorola 68000]] @ 10 MHz (16/32-bit instructions @ 1.75 MIPS) |
* [[wikipedia:Sound chip|Sound chip]]: 2× Sega 315-5560 Custom MultiPCM | * [[wikipedia:Sound chip|Sound chip]]: 2× Sega 315-5560 Custom MultiPCM | ||
** [[Pulse-code modulation|PCM]] channels: 56 | ** [[Pulse-code modulation|PCM]] channels: 56 | ||
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** [[wikipedia:Geometry pipelines|Geometry Engine]] [[wikipedia:Digital signal processor|DSP]] [[wikipedia:Coprocessor|coprocessors]]: 6× [[Fujitsu]] TGP MB86234 @ 16 MHz {{ref|http://members.iinet.net.au/~lantra9jp1/gurudumps/m2status/index.html}}{{fileref|MB86232 datasheet.pdf}}{{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}} | ** [[wikipedia:Geometry pipelines|Geometry Engine]] [[wikipedia:Digital signal processor|DSP]] [[wikipedia:Coprocessor|coprocessors]]: 6× [[Fujitsu]] TGP MB86234 @ 16 MHz {{ref|http://members.iinet.net.au/~lantra9jp1/gurudumps/m2status/index.html}}{{fileref|MB86232 datasheet.pdf}}{{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}} | ||
*** Revisions: 315-5673, 315-5677, 2× 315-5678, 2× 315-5679 (later updated with 2× 315-5679B in 1994) | *** Revisions: 315-5673, 315-5677, 2× 315-5678, 2× 315-5679 (later updated with 2× 315-5679B in 1994) | ||
− | *** Coprocessor abilities: [[wikipedia:Decimal floating point|Floating decimal point]] operation function, axis rotation operation function, 3D [[wikipedia:Matrix (mathematics)|matrix operation]] function, [[wikipedia:Arithmetic logic unit|ALU]], [[wikipedia:Direct memory access|DMA]] controllers, T&L (transform, clipping, lighting) {{ref|http://wiki.mamedev.org/index.php/TGP:Index}} | + | *** Coprocessor abilities: [[wikipedia:Decimal floating point|Floating decimal point]] operation function, axis rotation operation function, 3D [[wikipedia:Matrix (mathematics)|matrix operation]] function, [[wikipedia:Arithmetic logic unit|ALU]], [[wikipedia:Direct memory access|DMA]] controllers, [[wikia:w:c:gaming:Transform, clipping, and lighting|T&L (transform, clipping, lighting)]] {{ref|http://wiki.mamedev.org/index.php/TGP:Index}} |
*** [[wikipedia:Floating point unit|Floating-point units]]: 32-bit operations @ 96 MFLOPS (16 MFLOPS each) | *** [[wikipedia:Floating point unit|Floating-point units]]: 32-bit operations @ 96 MFLOPS (16 MFLOPS each) | ||
*** Fixed-point arithmetic: 32-bit instructions @ 96 MIPS (16 MIPS each) | *** Fixed-point arithmetic: 32-bit instructions @ 96 MIPS (16 MIPS each) | ||
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*** Notes: Located on CPU Board. DSP are modified by Sega with custom microcode for coprocessor and T&L capabilities. {{ref|http://wiki.mamedev.org/index.php/TGP:Index}} | *** Notes: Located on CPU Board. DSP are modified by Sega with custom microcode for coprocessor and T&L capabilities. {{ref|http://wiki.mamedev.org/index.php/TGP:Index}} | ||
** Graphics card: [[Sega]] Video Board 837-10072 @ 50 MHz {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|http://hico-srv004.pixhotel.fr/sites/default/files/gamoovernet/20110520120039-lapin252-IMG-0112.JPG}} | ** Graphics card: [[Sega]] Video Board 837-10072 @ 50 MHz {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|http://hico-srv004.pixhotel.fr/sites/default/files/gamoovernet/20110520120039-lapin252-IMG-0112.JPG}} | ||
− | *** Sega [[wikipedia:Z-buffering|Z- | + | *** Sega [[wikipedia:Z-buffering|Z-sorting]] & [[wikipedia:Clipping (computer graphics)|clipping]] chipset: 315-5644 (32 MHz), 315-5645 (32 MHz), 315-5712 (40 MHz), 2× 315-5725 (50 MHz) |
*** [[Lockheed Martin]] [[wikipedia:Rasterization|rasterization]] & [[wikipedia:Texture mapping|texture mapping]] [[wikipedia:Render output unit|renderer units]]: 315-5646 (50 MHz), 315-5647 (50 MHz) | *** [[Lockheed Martin]] [[wikipedia:Rasterization|rasterization]] & [[wikipedia:Texture mapping|texture mapping]] [[wikipedia:Render output unit|renderer units]]: 315-5646 (50 MHz), 315-5647 (50 MHz) | ||
*** [[Sega System 24]] [[wikipedia:Tile engine|tilemap engine]]: 315-5292 tilemap generator (32 MHz) {{ref|http://imame4all.googlecode.com/svn-history/r146/Reloaded/trunk/src/mame/video/segaic16.c}} | *** [[Sega System 24]] [[wikipedia:Tile engine|tilemap engine]]: 315-5292 tilemap generator (32 MHz) {{ref|http://imame4all.googlecode.com/svn-history/r146/Reloaded/trunk/src/mame/video/segaic16.c}} | ||
+ | * Display: Up to 50-inch display {{fileref|EGM US 059.pdf|page=68}} | ||
* Display resolution: 496×384 pixels, 24 Hz [[wikipedia:Horizontal scan rate|HSync]], [[wikipedia:Progressive scan|progressive scan]] (non-interlaced), [https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp double-buffering] | * Display resolution: 496×384 pixels, 24 Hz [[wikipedia:Horizontal scan rate|HSync]], [[wikipedia:Progressive scan|progressive scan]] (non-interlaced), [https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp double-buffering] | ||
− | * Overscan resolution: 656×496 | + | ** Overscan resolution: 656×496 |
* [[wikipedia:Refresh rate|Refresh rate]]: 60 Hz, 30 Hz {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}} | * [[wikipedia:Refresh rate|Refresh rate]]: 60 Hz, 30 Hz {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}} | ||
− | ** [[wikipedia:Frame rate|Frame rate]]: | + | ** [[wikipedia:Frame rate|Frame rate]]: 60 frames/sec (60 Hz),{{fileref|VirtuaFighter2 Model2 Flyer.pdf|page=2}} 30 frames/sec (30 Hz) |
* Pixel clock rate: 19.523 MHz (656×496, 60 Hz) | * Pixel clock rate: 19.523 MHz (656×496, 60 Hz) | ||
* [[Palette|Color depth]]: 16,777,216 ([http://www.gamezero.com/team-0/whats_new/past/news9504.html 24-bit]), 65,536 (16-bit) | * [[Palette|Color depth]]: 16,777,216 ([http://www.gamezero.com/team-0/whats_new/past/news9504.html 24-bit]), 65,536 (16-bit) | ||
− | * Graphical features: [[wikipedia:Flat shading|Flat shading]], [[wikipedia:Texture mapping|texture mapping]], [[wikipedia:Texture mapping#Perspective correctness|perspective correction]], [[wikipedia:Texture filtering| | + | * Graphical features: [[wikipedia:Flat shading|Flat shading]], [[wikipedia:Texture mapping|texture mapping]], [[wikipedia:Texture mapping#Perspective correctness|perspective correction]], [[wikipedia:Texture filtering|texture filtering]], [[wikipedia:Spatial anti-aliasing|texture anti-aliasing]], [[wikipedia:Microtexture|microtexture]], [[wikipedia:Diffuse reflection|diffuse reflection]], [[wikipedia:Specular reflection|specular reflection]], [[wikipedia:Alpha blending|alpha blending]], [[wikipedia:Transparency (graphic)|transparency]], [[wikipedia:Rasterization|rasterization]], [[wikipedia:Mipmap|mipmapping]], [[wikipedia:Level of detail|LOD]],{{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}} [[wikipedia:Trilinear filtering|trilinear filtering]] {{ref|http://www.thg.ru/smoke/19991022/print.html}} |
** [[wikipedia:Texture mapping|Texture map]] resolution: Up to 1024×2048 pixels | ** [[wikipedia:Texture mapping|Texture map]] resolution: Up to 1024×2048 pixels | ||
** [[wikipedia:Microtexture|Microtexture]] size: Up to 128×128 pixels | ** [[wikipedia:Microtexture|Microtexture]] size: Up to 128×128 pixels | ||
− | * [[wikipedia:Digital geometry|Geometric]] performance: | + | * [[wikipedia:Digital geometry|Geometric]] performance: |
+ | ** 900,000 vectors/sec | ||
+ | ** 500,000 textured polygons/sec, with 24-bit color {{ref|http://www.gamezero.com/team-0/whats_new/past/news9504.html}} | ||
+ | ** 300,000 textured polygons/sec, with all effects {{fileref|DaytonaUSA Model2 Flyer.pdf|page=2}} | ||
* [[wikipedia:Fillrate|Fillrate]] performance: | * [[wikipedia:Fillrate|Fillrate]] performance: | ||
** Rendering fillrate: 82 million [[pixel]]s/sec (50 million pixels/sec polygons, 32 million pixels/sec tilemaps) | ** Rendering fillrate: 82 million [[pixel]]s/sec (50 million pixels/sec polygons, 32 million pixels/sec tilemaps) | ||
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** CPU cache: 768 bytes {{fileref|I960 datasheet.pdf}} | ** CPU cache: 768 bytes {{fileref|I960 datasheet.pdf}} | ||
** TGP internal RAM: 36 KB (6 KB per TGP) {{fileref|MB86232 datasheet.pdf}} | ** TGP internal RAM: 36 KB (6 KB per TGP) {{fileref|MB86232 datasheet.pdf}} | ||
− | * Game [[ROM]]: Up to 54.25 MB | + | * Game [[ROM]]: Up to 54.25 MB |
+ | ** Main ROM: [http://mamedb.com/game/vcop 9.5 MB] ([[EPROM]], [[wikipedia:Mask ROM|MROM]]) | ||
+ | ** Video ROM: [http://mamedb.com/game/daytona 28.75 MB] (MROM) | ||
+ | ** Audio ROM: 16 MB (MROM) | ||
}} | }} | ||
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** Main RAM bandwidth: 112 MB/sec | ** Main RAM bandwidth: 112 MB/sec | ||
*** i960: 100 MB/sec (32-bit, 25 MHz) | *** i960: 100 MB/sec (32-bit, 25 MHz) | ||
− | *** Z80: 12 MB/sec (2× 8-bit, 8 | + | *** Z80: 12 MB/sec (2× 8-bit, 8/4 MHz) |
** VRAM bandwidth: 883.34066 MB/sec {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|http://hico-srv004.pixhotel.fr/sites/default/files/gamoovernet/20110520120039-lapin252-IMG-0112.JPG}} | ** VRAM bandwidth: 883.34066 MB/sec {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|http://hico-srv004.pixhotel.fr/sites/default/files/gamoovernet/20110520120039-lapin252-IMG-0112.JPG}} | ||
*** TGP: 384 MB/sec (6× 32-bit, 16 MHz) {{fileref|TC5588P datasheet.pdf}} | *** TGP: 384 MB/sec (6× 32-bit, 16 MHz) {{fileref|TC5588P datasheet.pdf}} | ||
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** CPU cache: 100 MB/sec (32-bit, 25 MHz) | ** CPU cache: 100 MB/sec (32-bit, 25 MHz) | ||
** TGP internal RAM: 384 MB/sec (6× 32-bit, 16 MHz) | ** TGP internal RAM: 384 MB/sec (6× 32-bit, 16 MHz) | ||
− | * Game ROM bandwidth: | + | * Game ROM bandwidth: 933–1000 MB/sec (5× 32-bit) {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp}} |
+ | ** EPROM: 133–200 MB/sec (32-bit, 33–50 MHz, 20–30 [[wikipedia:Nanosecond|ns]]) {{fileref|AM27C1024 datasheet.pdf}}{{fileref|MX27C1024 datasheet.pdf}} | ||
+ | ** MROM: 800 MB/sec (4× 32-bit, 50 MHz) | ||
}} | }} | ||
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{{multicol| | {{multicol| | ||
− | * Sound CPU: Motorola 68000 @ 12 MHz (16 | + | * Sound CPU: Motorola 68000 @ 12 MHz (16/32-bit instructions @ 2.1 MIPS) |
* [[wikipedia:Sound chip|Sound chip]]: [[Saturn Custom Sound Processor|Yamaha SCSP]] | * [[wikipedia:Sound chip|Sound chip]]: [[Saturn Custom Sound Processor|Yamaha SCSP]] | ||
** PCM channels: 56 | ** PCM channels: 56 | ||
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{{multicol| | {{multicol| | ||
* GPU: {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}} | * GPU: {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}} | ||
− | ** Geometry Engine DSP coprocessors: 2× | + | ** Geometry Engine DSP coprocessors: 2× ADSP-21062 SHARC {{fileref|ADSP-2106 datasheet.pdf}} |
*** Coprocessor abilities: Floating decimal point operation function, axis rotation operation function, 3D matrix operation function, [[wikipedia:System on a chip|SOC]], ALU, T&L | *** Coprocessor abilities: Floating decimal point operation function, axis rotation operation function, 3D matrix operation function, [[wikipedia:System on a chip|SOC]], ALU, T&L | ||
− | *** Floating-point units: 32 | + | *** Floating-point units: 32/[[wikipedia:Extended precision|40-bit]] operations @ 240 MFLOPS (120 MFLOPS each) |
*** Fixed-point arithmetic: 32-bit instructions @ 80 MIPS (40 MIPS each) | *** Fixed-point arithmetic: 32-bit instructions @ 80 MIPS (40 MIPS each) | ||
*** Data bus width: 96-bit ([[wikipedia:48-bit|48-bit]] each) | *** Data bus width: 96-bit ([[wikipedia:48-bit|48-bit]] each) | ||
*** DMA controllers: 20 DMA channels (10 channels each), 480 MB/sec transfer rate (240 MB/sec each) | *** DMA controllers: 20 DMA channels (10 channels each), 480 MB/sec transfer rate (240 MB/sec each) | ||
− | ** | + | ** Sega Z-sort & clipping chipset |
− | ** | + | ** Lockheed Martin rasterization & texture mapping renderer units |
− | ** | + | ** Sega System 24 tilemap engine |
* Rendering fillrate: 120 million pixels/sec (2 million pixels per frame) | * Rendering fillrate: 120 million pixels/sec (2 million pixels per frame) | ||
* Memory: Up to 150.21 [[Byte|MB]] (35.125 MB main, 99,332 [[Byte|KB]] video, 16,960 KB audio, 18 KB other) | * Memory: Up to 150.21 [[Byte|MB]] (35.125 MB main, 99,332 [[Byte|KB]] video, 16,960 KB audio, 18 KB other) | ||
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*** [[VRAM]]: 14,596 KB (1.5 MB framebuffer [[VRAM]], 8228 KB coprocessor buffer [[SRAM]]/SDRAM, 4 MB texture SRAM/SDRAM, 64 KB luma, 32 KB geometry, 576 KB tiles, 64 KB colors) | *** [[VRAM]]: 14,596 KB (1.5 MB framebuffer [[VRAM]], 8228 KB coprocessor buffer [[SRAM]]/SDRAM, 4 MB texture SRAM/SDRAM, 64 KB luma, 32 KB geometry, 576 KB tiles, 64 KB colors) | ||
*** Audio RAM: 576 KB | *** Audio RAM: 576 KB | ||
− | *** Other RAM: | + | *** Other RAM: 2064 KB (2.015625 MB) |
** Internal processor memory: 512.75 KB | ** Internal processor memory: 512.75 KB | ||
*** CPU cache: 768 bytes | *** CPU cache: 768 bytes | ||
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===Model 2C-CRX Specifications=== | ===Model 2C-CRX Specifications=== | ||
− | Model 2A-CRX, released in 1996, featured an upgraded GPU chipset and optional sound | + | Model 2A-CRX, released in 1996, featured an upgraded GPU chipset and optional MPEG sound boards: |
{{multicol| | {{multicol| | ||
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** GPU coprocessors: 2× Fujitsu TGPx4 MB86235 {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}}{{fileref|3DGraphicsProcessorChipSet.pdf}} | ** GPU coprocessors: 2× Fujitsu TGPx4 MB86235 {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}}{{fileref|3DGraphicsProcessorChipSet.pdf}} | ||
*** Coprocessor abilities: Geometry Engine DSP, Z-sorters, clipping, hardware renderers, floating decimal point operation function, axis rotation operation function, 3D matrix operation function, ALU, DMA controllers, T&L | *** Coprocessor abilities: Geometry Engine DSP, Z-sorters, clipping, hardware renderers, floating decimal point operation function, axis rotation operation function, 3D matrix operation function, ALU, DMA controllers, T&L | ||
− | *** Floating-point units: 32 | + | *** Floating-point units: 32/40-bit operations @ 160 MFLOPS (80 MFLOPS each) |
− | *** Fixed-point arithmetic: 32 | + | *** Fixed-point arithmetic: 32/[[wikipedia:64-bit computing|64-bit]] instructions @ 240 MIPS (120 MIPS each) |
*** Bus width: 192-bit (96-bit each; 64-bit SDRAM, 32-bit SRAM) | *** Bus width: 192-bit (96-bit each; 64-bit SDRAM, 32-bit SRAM) | ||
** Tilemap engine: Sega System 24 tilemap engine | ** Tilemap engine: Sega System 24 tilemap engine | ||
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** Rendering fillrate: 190 million pixels/sec (95 million pixels/sec per GPU) | ** Rendering fillrate: 190 million pixels/sec (95 million pixels/sec per GPU) | ||
** Texture fillrate: 190 million texels/sec (95 million texels/sec per GPU) | ** Texture fillrate: 190 million texels/sec (95 million texels/sec per GPU) | ||
− | * Optional MPEG sound | + | * Optional MPEG sound boards: |
− | ** | + | ** DSB1: |
− | ** | + | *** Sound CPU: Zilog Z80 (8/16-bit instructions) |
+ | *** Sound chip: [[NEC]] µD65654GF102 | ||
+ | ** DSB2: | ||
+ | *** Sound CPU: Motorola 68000 (16/32-bit instructions) | ||
+ | *** Sound chip: NEC µD65654GF102 | ||
}} | }} | ||
Revision as of 03:52, 29 November 2015
Sega Model 2 | |||||
---|---|---|---|---|---|
Manufacturer: Sega | |||||
Variants: Model 2A-CRX, Model 2B-CRX, Model 2C-CRX | |||||
Add-ons: DSB1/DSB2 (Model 2C-CRX) | |||||
|
The Sega Model 2 is an arcade system board originally debuted by Sega in 1993 as a successor to the Sega Model 1 board. It is an extension of the Model 1 hardware, most notably introducing the concept of texture-mapped polygons, allowing for more realistic 3D graphics for its time. The Model 2 board was an important milestone for the arcade industry, and helped launch several key arcade franchises of the 1990s, including Daytona USA, Virtua Cop, Sega Rally Championship, Dead or Alive, Virtua Striker, Cyber Troopers Virtual-On and The House of the Dead.
The Model 2 was engineered with help from GE Aerospace (acquired by Martin Marietta in 1993, now part of Lockheed Martin), who designed the texture-mapping chip incorporated by the Model 2, which combined it with Sega's in-house polygon geometry engine.[1] The Model 2's development was led by famed Sega AM2 game designer Yu Suzuki. The arcade board debuted along with Daytona USA, a game which was finished and copyrighted in 1993, and debuted at the JAMMA arcade show in August 1993. [2]
There are four versions of the system: the original Model 2, and the Model 2A-CRX, Model 2B-CRX and Model 2C-CRX variants. Model 2 and 2A-CRX used a custom DSP with internal code for the geometrizer, while 2B-CRX and 2C-CRX used well documented DSPs and uploaded the geometrizer code at startup to the DSP. The Model 2 was succeeded in 1996 by the Sega Model 3, which in turn was succeeded by the Sega NAOMI, Sega Hikaru and Sega NAOMI 2.
History
It was a further advancement of the earlier Model 1 system. The most noticeable improvement was texture mapping, which enabled polygons to be painted with bitmap images, as opposed to the limited monotone flat shading that Model 1 supported. The Model 2 also introduced the use of texture filtering and texture anti-aliasing,[1] as well as trilinear filtering.[3] It was the most powerful game system in its time, equivalent to the power of a PC graphics card in 1998, five years after the Model 2's release. [3]
Designed by Sega AM2's Yu Suzuki, he stated that the Model 2's texture mapping chip originated "from military equipment from Lockheed Martin, which was formerly General Electric Aerial & Space's textural mapping technology. It cost $2 million dollars to use the chip. It was part of flight-simulation equipment that cost $32 million. I asked how much it would cost to buy just the chip and they came back with $2 million. And I had to take that chip and convert it for video game use, and make the technology available for the consumer at 5,000 yen ($50)" ($84 in 2014) per machine. He said "it was tough but we were able to make it for 5,000 yen. Nobody at Sega believed me when I said I wanted to purchase this technology for our games."[4] Suzuki stated that, in "the end," it "was a hit and the industry gained mass-produced texture-mapping as a result." For Virtua Fighter 2, he also utilized motion capture technology, introducing it to the game industry. [5]
There were also issues working on the new CPU,[4] the Intel i960-KB, which had just released in 1993.[6] Suzuki stated that when working "on a brand new CPU, the debugger doesn't exist yet. The latest hardware doesn't work because it's full of bugs. And even if a debugger exists, the debugger itself is full of bugs. So, I had to debug the debugger. And of course with new hardware there's no library or system, so I had to create all of that, as well. It was a brutal cycle." [4]
In a late 1998 interview, Read3D's Jon Lenyo, a former employee of GE Aerospace (later Lockheed Martin), stated that Sega's development for the Model 2 can be traced back as early as November 1990, when he and other GE Aerospace employees visited Sega and demonstrated the trilinear texture filtering and shading capabilities of their technology. As Sega was already working on the Sega Model 1 internally, they eventually incorporated GE Aerospace's technology into the Model 2. [3]
Despite its high price tag of around $15,000 [3] (equivalent to $24489 in 2014), the Model 2 platform was very successful. It featured some of the highest grossing arcade games of all time: Daytona USA, Virtua Fighter 2, Cyber Troopers Virtual-On, The House of the Dead, and Dead or Alive, to name a few. Sega sold 65,000 units of the Model 2 annually,[3] and eventually sold over 130,000 units by 1996, amounting to over $1.95 billion revenue from hardware cabinet sales (130,000 units[7][8] at $15,000 each),[3][9] equivalent to over $3.18 billion in 2014, making it one of the best-selling arcade systems of all time.
According to Yu Suzuki, the Sega Model 2B-CRX arcade system board developed for Fighting Vipers "has a slightly faster processing speed" and "a higher response to displaying more polygons".[10]
Technical Specifications
Model 2 Specifications
- Board composition: CPU Board, Video Board, Communication Board, ROM Board, Sound Board, Feedback Driver Board [11]
- Revisions: CPU Board 837-10071 (50 MHz), Video Board 837-10072 (50 MHz), Communication Board 837-10537, ROM Board 834-10798, Sound Board 837-8679 (20 MHz), Drive Board 838-10646 [12]
- Main CPU: Intel i960-KB @ 25 MHz
- Fixed-point arithmetic: 32-bit RISC instructions @ 25 MIPS [13]
- Floating-point unit: 32/64/80-bit operations @ 13.6 MFLOPS [14]
- Bus width: 32-bit
- Additional CPU: 2× Zilog Z80 (8/16-bit instructions @ 1.74 MIPS)
Sound
- Sound CPU: Motorola 68000 @ 10 MHz (16/32-bit instructions @ 1.75 MIPS)
- Sound chip: 2× Sega 315-5560 Custom MultiPCM
- Sound timer: Yamaha YM3834 @ 8 MHz (Model 2 only)
Graphics
- GPU: [17][11][1]
- Geometry Engine DSP coprocessors: 6× Fujitsu TGP MB86234 @ 16 MHz [18][19][12]
- Revisions: 315-5673, 315-5677, 2× 315-5678, 2× 315-5679 (later updated with 2× 315-5679B in 1994)
- Coprocessor abilities: Floating decimal point operation function, axis rotation operation function, 3D matrix operation function, ALU, DMA controllers, T&L (transform, clipping, lighting) [20]
- Floating-point units: 32-bit operations @ 96 MFLOPS (16 MFLOPS each)
- Fixed-point arithmetic: 32-bit instructions @ 96 MIPS (16 MIPS each)
- Bus width: 192-bit (32-bit each)
- Notes: Located on CPU Board. DSP are modified by Sega with custom microcode for coprocessor and T&L capabilities. [20]
- Graphics card: Sega Video Board 837-10072 @ 50 MHz [12][21]
- Sega Z-sorting & clipping chipset: 315-5644 (32 MHz), 315-5645 (32 MHz), 315-5712 (40 MHz), 2× 315-5725 (50 MHz)
- Lockheed Martin rasterization & texture mapping renderer units: 315-5646 (50 MHz), 315-5647 (50 MHz)
- Sega System 24 tilemap engine: 315-5292 tilemap generator (32 MHz) [22]
- Geometry Engine DSP coprocessors: 6× Fujitsu TGP MB86234 @ 16 MHz [18][19][12]
- Display: Up to 50-inch display [23]
- Display resolution: 496×384 pixels, 24 Hz HSync, progressive scan (non-interlaced), double-buffering
- Overscan resolution: 656×496
- Refresh rate: 60 Hz, 30 Hz [17]
- Frame rate: 60 frames/sec (60 Hz),[24] 30 frames/sec (30 Hz)
- Pixel clock rate: 19.523 MHz (656×496, 60 Hz)
- Color depth: 16,777,216 (24-bit), 65,536 (16-bit)
- Graphical features: Flat shading, texture mapping, perspective correction, texture filtering, texture anti-aliasing, microtexture, diffuse reflection, specular reflection, alpha blending, transparency, rasterization, mipmapping, LOD,[17] trilinear filtering [3]
- Texture map resolution: Up to 1024×2048 pixels
- Microtexture size: Up to 128×128 pixels
- Geometric performance:
- Fillrate performance:
Memory
Bandwidth
- System RAM bandwidth: 974 MB/sec
- Internal processor bandwidth: 484 MB/sec
- CPU cache: 100 MB/sec (32-bit, 25 MHz)
- TGP internal RAM: 384 MB/sec (6× 32-bit, 16 MHz)
- Game ROM bandwidth: 933–1000 MB/sec (5× 32-bit) [12][11]
Model 2A-CRX Specifications
Model 2A-CRX, released in 1994, featured upgraded sound capabilities and increased ROM capacity:
- Sound CPU: Motorola 68000 @ 12 MHz (16/32-bit instructions @ 2.1 MIPS)
- Sound chip: Yamaha SCSP
- Memory: Up to 142 MB (35,969 KB main, 90,244 KB video, 16,960 KB audio, 2064 KB other)
- System RAM: 9776 KB (9.546875 MB)
- Main RAM: 1152 KB (1.125 MB)
- VRAM: 5984 KB (5.84375 MB)
- Audio RAM: 576 KB
- Other RAM: 2064 KB (2.015625 MB)
- Internal processor memory: 36.75 KB
- CPU cache: 768 bytes
- TGP internal RAM: 36 KB
- Game ROM: Up to 132.25 MB (34 MB main, 82.25 MB video,[33] 16 MB audio)
- System RAM: 9776 KB (9.546875 MB)
Model 2B-CRX Specifications
Model 2A-CRX, released in 1995, featured upgraded geometry engine DSP coprocessors and increased VRAM:
- GPU: [17]
- Geometry Engine DSP coprocessors: 2× ADSP-21062 SHARC [34]
- Coprocessor abilities: Floating decimal point operation function, axis rotation operation function, 3D matrix operation function, SOC, ALU, T&L
- Floating-point units: 32/40-bit operations @ 240 MFLOPS (120 MFLOPS each)
- Fixed-point arithmetic: 32-bit instructions @ 80 MIPS (40 MIPS each)
- Data bus width: 96-bit (48-bit each)
- DMA controllers: 20 DMA channels (10 channels each), 480 MB/sec transfer rate (240 MB/sec each)
- Sega Z-sort & clipping chipset
- Lockheed Martin rasterization & texture mapping renderer units
- Sega System 24 tilemap engine
- Geometry Engine DSP coprocessors: 2× ADSP-21062 SHARC [34]
- Rendering fillrate: 120 million pixels/sec (2 million pixels per frame)
- Memory: Up to 150.21 MB (35.125 MB main, 99,332 KB video, 16,960 KB audio, 18 KB other)
Model 2C-CRX Specifications
Model 2A-CRX, released in 1996, featured an upgraded GPU chipset and optional MPEG sound boards:
- GPU:
- GPU coprocessors: 2× Fujitsu TGPx4 MB86235 [17][35]
- Coprocessor abilities: Geometry Engine DSP, Z-sorters, clipping, hardware renderers, floating decimal point operation function, axis rotation operation function, 3D matrix operation function, ALU, DMA controllers, T&L
- Floating-point units: 32/40-bit operations @ 160 MFLOPS (80 MFLOPS each)
- Fixed-point arithmetic: 32/64-bit instructions @ 240 MIPS (120 MIPS each)
- Bus width: 192-bit (96-bit each; 64-bit SDRAM, 32-bit SRAM)
- Tilemap engine: Sega System 24 tilemap engine
- GPU coprocessors: 2× Fujitsu TGPx4 MB86235 [17][35]
- Graphical features: Gouraud shading, hidden surface, Z-buffering, point sampling, bilinear filtering, trilinear filtering [36]
- Geometric performance: [35]
- 800,000 textured polygons/sec, with lighting and flat shading (400,000 per GPU)
- 490,000 textured polygons/sec, with lighting and Gouraud shading (245,000 per GPU)
- Fillrate performance: [35]
- Rendering fillrate: 190 million pixels/sec (95 million pixels/sec per GPU)
- Texture fillrate: 190 million texels/sec (95 million texels/sec per GPU)
- Optional MPEG sound boards:
- DSB1:
- Sound CPU: Zilog Z80 (8/16-bit instructions)
- Sound chip: NEC µD65654GF102
- DSB2:
- Sound CPU: Motorola 68000 (16/32-bit instructions)
- Sound chip: NEC µD65654GF102
- DSB1:
List of Games
Model 2
- Daytona USA (1993)
- Daytona USA Deluxe '93 (1993)
- Desert Tank (1994)
- Virtua Cop (1994)
Model 2A-CRX
- Virtua Fighter 2 (1994)
- Manx TT Superbike (1995)
- Sega Rally Championship (1995)
- Sega Rally Pro Drivin' (1995?)
- Sky Target (1995)
- Virtua Cop 2 (1995)
- Dead or Alive (1996)
- Dynamite Baseball (1996)
- Dynamite Cop (1996)
- Pilot Kids (1999)
- Virtua Fighter 2.1 (1996)
- Motor Raid (1997)
- Zero Gunner (1997)
Model 2B-CRX
- Fighting Vipers (1995)
- Gunblade NY (1995)
- Indy 500 (1995)
- Rail Chase 2 (1995)
- Virtua Striker (1995)
- Dead or Alive (1996)
- Dynamite Baseball (1996)
- Dynamite Cop (1996)
- Last Bronx (1996)
- Pilot Kids (1999)
- Sonic the Fighters (1996)
- Super GT 24H (1996)
- Cyber Troopers Virtual-On (1996)
- Dynamite Baseball 97 (1997)
- Zero Gunner (1997)
Model 2C-CRX
- Dynamite Cop (1996)
- Over Rev (1997)
- Power Sled (1996)
- Sega Ski Super G (1996)
- Sega Touring Car Championship (1996)
- Sega Water Ski (1996)
- Wave Runner (1996)
- The House of the Dead (1997)
- Top Skater (1997)
- Behind Enemy Lines (1998)
Other
- Ultimate Domain (unreleased) - Developed by Atlus. Previewed in Mean Machines Sega #51.
Gallery
A typical ROM (Virtua Cop)
Model 2A ROM (Dead or Alive)
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