Difference between revisions of "Sega Hikaru"

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The '''Sega Hikaru''' is a successor of the [[Sega NAOMI]] and [[Sega Model 3]] [[arcade]] systems that was developed in 1998 and debuted in 1999. The Hikaru was used for a handful of deluxe dedicated-cabinet games, beginning with 1999's ''[[Brave Fire Fighters]]'', in which the flame and water effects were largely a showpiece for the hardware.
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The '''Sega Hikaru''' is a successor of the [[Sega NAOMI]] and [[Sega Model 3]] [[arcade]] systems that was developed in 1998, most likely by Hard Ware R&D Team 3{{intref|Brave Firefighters#Production_credits}} and debuted in 1999. The Hikaru was used for a handful of deluxe dedicated-cabinet games, beginning with 1999's ''[[Brave Fire Fighters]]'', in which the flame and water effects were largely a showpiece for the hardware.
  
 
It was significantly more powerful and expensive than the NAOMI. The Hikaru featured a custom Sega GPU with advanced graphical capabilities, additional CPU and sound processors, various custom processors, increased memory, and faster bandwidth. It was the first game platform capable of effective hardware [http://www.giantbomb.com/phong-shading/3015-7940/ Phong shading], the most intensive form of shading at the time, and was capable of the most complex lighting and particle effects of its time.
 
It was significantly more powerful and expensive than the NAOMI. The Hikaru featured a custom Sega GPU with advanced graphical capabilities, additional CPU and sound processors, various custom processors, increased memory, and faster bandwidth. It was the first game platform capable of effective hardware [http://www.giantbomb.com/phong-shading/3015-7940/ Phong shading], the most intensive form of shading at the time, and was capable of the most complex lighting and particle effects of its time.
  
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It was the most powerful game system of its time (''[[Planet Harriers]]'' in particular was regarded as having the best video game graphics at the time), but it was very expensive and difficult to program. Since it was comparatively expensive to produce, [[Sega]] soon abandoned the Hikaru in favor of continued NAOMI development. It was succeeded by the [[Sega NAOMI 2|NAOMI 2]], which was quite not as powerful but more affordable.{{fileref|NextGeneration US 76.pdf|page=37}}
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It was the most powerful game system of its time (''[[Planet Harriers]]'', for example, was regarded as having the best video game graphics at the time), but it was very expensive and difficult to program. Since it was comparatively expensive to produce, [[Sega]] soon abandoned the Hikaru in favor of continued NAOMI development. It was succeeded by the more affordable [[Sega NAOMI 2|NAOMI 2]].{{magref|nextgeneration|76|37}}
  
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==Development==
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==Technical specifications==
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According to Sega in 1999:{{ref|[http://www.goodcowfilms.com/farm/games/news-archive/Sega%20Confirms%20Hikaru%20DOES%20Exist....htm Sega Confirms Hikaru Does Exist (November 24, 1999)]}}
 
−
 
 
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{{quote|Brave Firefighters utilizes a slightly modified Naomi Hardware system called Hikaru. Hikaru incorporates a custom Sega graphics chip and possesses larger memory capacity then standard Naomi systems. "These modifications were necessary because in Brave Firefighters, our engineers were faced with the daunting challenge of creating 3d images of flames and sprayed water," stated Sega's Vice President of Sales and Marketing, Barbara Joyiens. "If you stop and think about it, both have an almost infinite number of shapes, sizes, colors, levels of opaqueness, shadings and shadows. And, when you combine the two by simulating the spraying of water on a flame, you create an entirely different set of challenges for our game designers and engineers to overcome; challenges that would be extremely difficult, if not impossible to overcome utilizing existing 3D computers. Hikaru has the horsepower to handle these demanding graphic challenges with clarity, depth and precision."}}
 
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In addition, the Hikaru also uses two Hitachi SH-4 CPU processors, two Yamaha AICA sound engine processors, a Motorola 68000 network CPU, and a dual GPU setup. The Hikaru hardware was largely complete in 1998, before it was released to the public in 1999.{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}} The word "Hikaru" (ひかる) means "to shine" in Japanese.
 
−
 
 
−
==Specifications==
 
 
{{multicol|
 
{{multicol|
 
* Board composition: Main Board, ROM Board, AICA Sound Board, I/O Board, Filter Board, Network Board{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
 
* Board composition: Main Board, ROM Board, AICA Sound Board, I/O Board, Filter Board, Network Board{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
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** Optional: Sound Board 2{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-memctl.c Sega Hikaru Memory Controller (Valkyrie)]}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-aica.c Sega Hikaru AICA Sound Boards (Valkyrie)]}}
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:* Optional: Sound Board 2{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-memctl.c Sega Hikaru Memory Controller (Valkyrie)]}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-aica.c Sega Hikaru AICA Sound Boards (Valkyrie)]}}
 
* [[wikipedia:Operating system|Operating systems]]:
 
* [[wikipedia:Operating system|Operating systems]]:
−
**Sega native operating system
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:*Sega native operating system
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**Custom [[Windows CE]], with [[wikipedia:DirectX|DirectX 6.0]], [[wikipedia:Direct3D|Direct3D]] and [[wikipedia:OpenGL|OpenGL]] support
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:*Custom [[Windows CE]], with [[wikipedia:DirectX|DirectX 6.0]], [[wikipedia:Direct3D|Direct3D]] and [[wikipedia:OpenGL|OpenGL]] support
 
* Extensions: communication, 4‑channel surround audio, PCI, [[wikipedia:MIDI|MIDI]], RS‑232C
 
* Extensions: communication, 4‑channel surround audio, PCI, [[wikipedia:MIDI|MIDI]], RS‑232C
 
* Connection: [[JAMMA Show|JAMMA]] Video compliant, [[Dreamcast VGA Adapter|VGA]]
 
* Connection: [[JAMMA Show|JAMMA]] Video compliant, [[Dreamcast VGA Adapter|VGA]]
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===Main===
 
===Main===
 
{{multicol|
 
{{multicol|
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* Main CPU: 2× [[SuperH|Hitachi SH‑4]] @ 200 MHz{{fileref|SH-4 Software Manual.pdf}}
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* Main CPU: 2× [[Hitachi]] [[SH‑4]] @ 200 MHz{{fileref|SH-4 Software Manual.pdf}}
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** Units: 2× [[wikipedia:128-bit|128‑bit]] [[wikipedia:SIMD|SIMD]] vector units with graphic functions, 2× 64‑bit [[wikipedia:Floating-point unit|floating‑point units]], 2× 32‑bit fixed‑point units
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:* Units: 2× [[wikipedia:128-bit|128‑bit]] [[wikipedia:SIMD|SIMD]] vector units with graphic functions, 2× 64‑bit [[wikipedia:Floating-point unit|floating‑point units]], 2× 32‑bit fixed‑point units
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** Bus width: 256‑bit (2× 128‑bit) internal, 128‑bit (2× 64‑bit) external
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:* Bus width: 256‑bit (2× 128‑bit) internal, 128‑bit (2× 64‑bit) external
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** Fixed‑point performance: 720 [[wikipedia:Instructions per second|MIPS]]
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:* Fixed‑point performance: 720 [[wikipedia:Instructions per second|MIPS]]
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** Floating‑point performance: 2.8 [[wikipedia:FLOPS|GFLOPS]]
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:* Floating‑point performance: 2.8 [[wikipedia:FLOPS|GFLOPS]]
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** Note: With Sega Custom 3D GPU, the SH‑4's 128‑bit SIMD matrix unit can be dedicated to game physics, artificial intelligence, collision detection, overall game code, or additional graphical performance.
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:* Note: With Sega Custom 3D GPU, the SH‑4's 128‑bit SIMD matrix unit can be dedicated to game physics, artificial intelligence, collision detection, overall game code, or additional graphical performance.
 
* MIE bridge MCU: Sega 315‑6146 Maple‑JVS MCU ([[Zilog]] [[Z80]]){{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-mie.c Sega Hikaru MIE (Valkyrie)]}}{{ref|[http://demul.emulation64.com Demul 0.56 (1 September 2010)]}} @ 14.7456 MHz{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}} (8/16‑bit instructions, 8‑bit bus, 2.14 MIPS)
 
* MIE bridge MCU: Sega 315‑6146 Maple‑JVS MCU ([[Zilog]] [[Z80]]){{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-mie.c Sega Hikaru MIE (Valkyrie)]}}{{ref|[http://demul.emulation64.com Demul 0.56 (1 September 2010)]}} @ 14.7456 MHz{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}} (8/16‑bit instructions, 8‑bit bus, 2.14 MIPS)
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* Memory controllers: 2× Sega 315‑6154 Memory Controller @ 200 MHz (2× 32‑bit, DMA capabilities){{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-memctl.c Sega Hikaru Memory Controller (Valkyrie)]}}{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru.c Sega Hikaru (Valkyrie)]}}
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* Memory controllers: 2× Sega 315‑6154 Memory Controller @ 200 MHz (2× 32‑bit, DMA capabilities){{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-memctl.c Sega Hikaru Memory Controller (Valkyrie)]}}{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru.c Sega Hikaru (Valkyrie)]}}
 
* Main Board [[wikipedia:Programmable logic device|PLD]]: 27 units, 928‑bit (25 GB/sec) internal, 640‑bit (21 GB/sec) external{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{fileref|Hikaru rombd upright.jpg}}
 
* Main Board [[wikipedia:Programmable logic device|PLD]]: 27 units, 928‑bit (25 GB/sec) internal, 640‑bit (21 GB/sec) external{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{fileref|Hikaru rombd upright.jpg}}
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** 2× Sega PAL (Lattice GAL16V8) [[wikipedia:Generic array logic|GAL]] @ 250 MHz: 16 units (2× 8 units), 128‑bit (2× 64‑bit), DMA control, graphics processing,{{fileref|GAL16V8 datasheet.pdf}} 4 GB/sec
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:* 2× Sega PAL (Lattice GAL16V8) [[wikipedia:Generic array logic|GAL]] @ 250 MHz: 16 units (2× 8 units), 128‑bit (2× 64‑bit), DMA control, graphics processing,{{fileref|GAL16V8 datasheet.pdf}} 4 GB/sec
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** Sega 315‑6083A, 315‑6085, 315‑6086 @ 250 MHz: 3 units, 384‑bit (3× 128‑bit), 12 GB/sec
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:* Sega 315‑6083A, 315‑6085, 315‑6086 @ 250 MHz: 3 units, 384‑bit (3× 128‑bit), 12 GB/sec
−
** Sega 315‑6202 (Lattice CY37128) [[wikipedia:Complex programmable logic device|CPLD]] @ 167 MHz: 8 units, 416‑bit (8× 52‑bit) internal (9 GB/sec), 128‑bit (8× 16‑bit) external (3 GB/sec){{fileref|CY37 datasheet.pdf}}
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:* Sega 315‑6202 (Lattice CY37128) [[wikipedia:Complex programmable logic device|CPLD]] @ 167 MHz: 8 units, 416‑bit (8× 52‑bit) internal (9 GB/sec), 128‑bit (8× 16‑bit) external (3 GB/sec){{fileref|CY37 datasheet.pdf}}
 
* Network Board processors:{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
 
* Network Board processors:{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
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** Network CPU: [[Motorola 68000]] @ 40 MHz (16/32‑bit instructions, 16‑bit bus, 7 MIPS){{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
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:* Network CPU: [[Motorola 68000]] @ 40 MHz (16/32‑bit instructions, 16‑bit bus, 7 MIPS){{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
−
** Network PLD: [[wikipedia:Field-programmable gate array|FPGA]] @ 180 MHz (32‑bit),{{fileref|PLSI2032 datasheet.pdf}} 3× [[wikipedia:Programmable Array Logic|PAL]] @ 40 MHz, Sega 315‑5804 [[wikipedia:Complex programmable logic device|CPLD]] @ 40 MHz
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:* Network PLD: [[wikipedia:Field-programmable gate array|FPGA]] @ 180 MHz (32‑bit),{{fileref|PLSI2032 datasheet.pdf}} 3× [[wikipedia:Programmable Array Logic|PAL]] @ 40 MHz, Sega 315‑5804 [[wikipedia:Complex programmable logic device|CPLD]] @ 40 MHz
−
** Network processors: 2× Sega 315‑5917 @ 40 MHz
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:* Network processors: 2× Sega 315‑5917 @ 40 MHz
 
* ROM Board processors:{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
 
* ROM Board processors:{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
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** ROM Board [[wikipedia:Programmable logic device|PLD]]: [[wikipedia:Field-programmable gate array|FPGA]] @ 180 MHz (32‑bit),{{fileref|PLSI2032 datasheet.pdf}} CPLD/[[wikipedia:Programmable Array Logic|PAL]] @ 182 MHz (32‑bit){{fileref|M4A3 datasheet.pdf}}{{fileref|MACH111 datasheet.pdf}}
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:* ROM Board [[wikipedia:Programmable logic device|PLD]]: [[wikipedia:Field-programmable gate array|FPGA]] @ 180 MHz (32‑bit),{{fileref|PLSI2032 datasheet.pdf}} CPLD/[[wikipedia:Programmable Array Logic|PAL]] @ 182 MHz (32‑bit){{fileref|M4A3 datasheet.pdf}}{{fileref|MACH111 datasheet.pdf}}
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** Security [[wikipedia:Integrated circuit|IC]]: Sega 315-5881 @ 28 MHz
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:* Security [[wikipedia:Integrated circuit|IC]]: Sega 315-5881 @ 28 MHz
 
}}
 
}}
  
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{{multicol|
 
{{multicol|
 
* [[wikipedia:Sound chip|Sound engine]]: 2× [[Yamaha Super Intelligent Sound Processor|Yamaha AICA Super Intelligent Sound Processor]] (315‑6232) @ 67 MHz
 
* [[wikipedia:Sound chip|Sound engine]]: 2× [[Yamaha Super Intelligent Sound Processor|Yamaha AICA Super Intelligent Sound Processor]] (315‑6232) @ 67 MHz
−
** Internal CPU: 2× 32‑bit [[wikipedia:ARM7|ARM7]] RISC CPU @ 45 MHz
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:* Internal CPU: 2× 32‑bit [[wikipedia:ARM7|ARM7]] RISC CPU @ 45 MHz
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** CPU performance: 34 MIPS (2× 17 MIPS)
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:* CPU performance: 34 MIPS (2× 17 MIPS)
−
** [[Pulse-code modulation|PCM/ADPCM]]: 16‑bit [[wikipedia:Audio bit depth|depth]], 48 kHz [[wikipedia:Sampling rate|sampling rate]] ([[wikipedia:DVD-Audio|DVD quality]]), 128 channels
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:* [[Pulse-code modulation|PCM/ADPCM]]: 16‑bit [[wikipedia:Audio bit depth|depth]], 48 kHz [[wikipedia:Sampling rate|sampling rate]] ([[wikipedia:DVD-Audio|DVD quality]]), 128 channels
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** Bus width: 32‑bit (2× 16‑bit)
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:* Bus width: 32‑bit (2× 16‑bit)
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** Other features: DSP, sound [[wikipedia:Synthesizer|synthesizer]]
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:* Other features: DSP, sound [[wikipedia:Synthesizer|synthesizer]]
 
}}
 
}}
  
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* Graphics Engine GPU: [[Sega]] Custom 3D GPU @ 250 MHz
 
* Graphics Engine GPU: [[Sega]] Custom 3D GPU @ 250 MHz
 
* GPU core processors: 7 processors{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{fileref|Hikaru rombd upright.jpg}}
 
* GPU core processors: 7 processors{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{fileref|Hikaru rombd upright.jpg}}
−
** 2× Sega GPU 15 CP Command Processors (315‑6197) @ 250 MHz: 512‑bit (2× 256‑bit), Geometry Processor
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:* 2× Sega GPU 15 CP Command Processors (315‑6197) @ 250 MHz: 512‑bit (2× 256‑bit), Geometry Processor
−
** Sega GPU 1A Image Generator (315‑6087) @ 250 MHz: 128‑bit, rasterizer/renderer{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-renderer.c Sega Hikaru Renderer (Valkyrie)]}}
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:* Sega GPU 1A Image Generator (315‑6087) @ 250 MHz: 128‑bit, rasterizer/renderer{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-renderer.c Sega Hikaru Renderer (Valkyrie)]}}
−
** 2× Sega GPU DMA controllers (315‑6084) @ 250 MHz: 256‑bit (2× 128‑bit)
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:* 2× Sega GPU DMA controllers (315‑6084) @ 250 MHz: 256‑bit (2× 128‑bit)
−
** 2× Analog Devices ADV7120 Video [[wikipedia:Digital-to-analog converter|DAC]] @ 80 MHz: 48‑bit (2× 24‑bit){{fileref|ADV7120 datasheet.pdf}}
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:* 2× Analog Devices ADV7120 Video [[wikipedia:Digital-to-analog converter|DAC]] @ 80 MHz: 48‑bit (2× 24‑bit){{fileref|ADV7120 datasheet.pdf}}
 
* GPU Geometry Processors: 2× Sega GPU 15 CP Command Processors
 
* GPU Geometry Processors: 2× Sega GPU 15 CP Command Processors
−
** Hardware T&L: Transform, clipping, lighting
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:* Hardware T&L: Transform, clipping, lighting
−
** Materials: [[wikipedia:Flat shading|Flat shading]], [[wikipedia:Gouraud shading|Gouraud shading]], [[wikipedia:Phong shading|Phong shading]], diffuse, ambient, specular, unlit
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:* Materials: [[wikipedia:Flat shading|Flat shading]], [[wikipedia:Gouraud shading|Gouraud shading]], [[wikipedia:Phong shading|Phong shading]], diffuse, ambient, specular, unlit
−
** Fog: Color, transparency, density, depth blend, translucency
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:* Fog: Color, transparency, density, depth blend, translucency
−
** Rendering: Double‑buffered 3D rendering (odd & even frames), [[wikipedia:Depth perception|depth cueing]], depth buffer, depth bias, [[wikipedia:Back-face culling|face culling]], static meshes, dynamic meshes
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:* Rendering: Double‑buffered 3D rendering (odd & even frames), [[wikipedia:Depth perception|depth cueing]], depth buffer, depth bias, [[wikipedia:Back-face culling|face culling]], static meshes, dynamic meshes
−
** Shading: Flat shading, Gouraud shading, [http://www.giantbomb.com/phong-shading/3015-7940/ Phong shading], diffuse, ambient, specular, linear
+
:* Shading: Flat shading, Gouraud shading, [http://www.giantbomb.com/phong-shading/3015-7940/ Phong shading], diffuse, ambient, specular, linear
−
** Modelview matrix: Instanced drawing, multiple instances, shared attributes between models,{{ref|[http://ogldev.atspace.co.uk/www/tutorial33/tutorial33.html Instanced Rendering]}} modelview stack
+
:* Modelview matrix: Instanced drawing, multiple instances, shared attributes between models,{{ref|[http://ogldev.atspace.co.uk/www/tutorial33/tutorial33.html Instanced Rendering]}} modelview stack
−
** Object memory: 8 viewports, 256 modelviews, 16,384 materials (256 [[wikipedia:Level of detail|LOD]] levels), 16,384 textures/texheads (256 LOD levels), 1024 lights (256 light sets)
+
:* Object memory: 8 viewports, 256 modelviews, 16,384 materials (256 [[wikipedia:Level of detail|LOD]] levels), 16,384 textures/texheads (256 LOD levels), 1024 lights (256 light sets)
 
* GPU [[wikipedia:Direct memory access|DMA]] controllers: 2× Sega GPU DMA controllers
 
* GPU [[wikipedia:Direct memory access|DMA]] controllers: 2× Sega GPU DMA controllers
−
** GPU IDMA (Indirect DMA) controller: Loads texture data from MaskROM (via external bus) into texture banks (with metadata), allows CPU access to texture banks
+
:* GPU IDMA (Indirect DMA) controller: Loads texture data from MaskROM (via external bus) into texture banks (with metadata), allows CPU access to texture banks
−
** DMA controller: Moves textures around in framebuffer, transfers bitmap data to bitmap layers, allows CPU access to framebuffer
+
:* DMA controller: Moves textures around in framebuffer, transfers bitmap data to bitmap layers, allows CPU access to framebuffer
 
* [[Palette|Color depth]]: [[wikipedia:32-bit color|32‑bit]] [[wikipedia:RGBA color space|ARGB]], 16,777,216 colors ([[wikipedia:24-bit color|24‑bit color]]) with 8‑bit (256 levels) [[wikipedia:Alpha compositing|alpha blending]], [[wikipedia:YUV|YUV]] and RGB color space, [[wikipedia:Chroma key|color key]] overlay
 
* [[Palette|Color depth]]: [[wikipedia:32-bit color|32‑bit]] [[wikipedia:RGBA color space|ARGB]], 16,777,216 colors ([[wikipedia:24-bit color|24‑bit color]]) with 8‑bit (256 levels) [[wikipedia:Alpha compositing|alpha blending]], [[wikipedia:YUV|YUV]] and RGB color space, [[wikipedia:Chroma key|color key]] overlay
 
* Display [[resolution]]: 31 kHz [[wikipedia:Horizontal scan rate|horizontal sync]], 60 Hz [[wikipedia:Refresh rate|refresh rate]], 80 MHz Video DAC, [[JAMMA Show|JAMMA]]/[[Dreamcast VGA Adapter|VGA]] output, [[wikipedia:Progressive scan|progressive scan]]{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{fileref|ADV7120 datasheet.pdf}}
 
* Display [[resolution]]: 31 kHz [[wikipedia:Horizontal scan rate|horizontal sync]], 60 Hz [[wikipedia:Refresh rate|refresh rate]], 80 MHz Video DAC, [[JAMMA Show|JAMMA]]/[[Dreamcast VGA Adapter|VGA]] output, [[wikipedia:Progressive scan|progressive scan]]{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{fileref|ADV7120 datasheet.pdf}}
−
** Single monitor display: 496×384 to 800×608 (default 640×480)
+
:* Single monitor display: 496×384 to 800×608 (default 640×480)
−
** [[wikipedia:Multi-monitor|Dual monitor]] display: 992×384 to 1600×608 (default 1280×480)
+
:* [[wikipedia:Multi-monitor|Dual monitor]] display: 992×384 to 1600×608 (default 1280×480)
−
** Video output: 496×384 to 1968×1080 (default 640×480)
+
:* Video output: 496×384 to 1968×1080 (default 640×480)
−
** Framebuffer: 496×384 to 2048×2048 (default 2048×2048){{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
+
:* Framebuffer: 496×384 to 2048×2048 (default 2048×2048){{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
 
* [[wikipedia:Computer graphics lighting|Lighting]]: 1024 lights per scene, 4 lights per polygon, 256 light sets per scene (4 lights per set), 8 window surfaces
 
* [[wikipedia:Computer graphics lighting|Lighting]]: 1024 lights per scene, 4 lights per polygon, 256 light sets per scene (4 lights per set), 8 window surfaces
−
** Light types: Diffuse, ambient, specular, horizontal, spot
+
:* Light types: Diffuse, ambient, specular, horizontal, spot
−
** Emission types: Constant, linear, infinite linear, square, reciprocal, reciprocal squared
+
:* Emission types: Constant, linear, infinite linear, square, reciprocal, reciprocal squared
−
** Object types: Lights (with individual position, direction and emission properties), lightsets (a set of up to 4 lights that share a mesh)
+
:* Object types: Lights (with individual position, direction and emission properties), lightsets (a set of up to 4 lights that share a mesh)
 
* GPU capabilities: 2 [[wikipedia:Bitmap|bitmap]] layers, calendar, 16,384 vertices per mesh,{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu-private.h Sega Hikaru GPU Private (Valkyrie)]}} hidden surface removal, deferred rendering
 
* GPU capabilities: 2 [[wikipedia:Bitmap|bitmap]] layers, calendar, 16,384 vertices per mesh,{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu-private.h Sega Hikaru GPU Private (Valkyrie)]}} hidden surface removal, deferred rendering
−
** [[wikipedia:Framebuffer|Framebuffer]]: 2048×2048 sheet (can be partitioned into framebuffer, tile data, and/or 1‑2 bitmap layers), handled by 2 GPU 1A Image Generator rasterizers/renderers (double‑buffering), accessible by DMA controller
+
:* [[wikipedia:Framebuffer|Framebuffer]]: 2048×2048 sheet (can be partitioned into framebuffer, tile data, and/or 1‑2 bitmap layers), handled by 2 GPU 1A Image Generator rasterizers/renderers (double‑buffering), accessible by DMA controller
−
** Effects: [[wikipedia:Stencil buffer|Stencil]], shadows, motion blur, particle effects, fire effects, [[wikipedia:Fluid simulation|water effects]],{{ref|[http://www.goodcowfilms.com/farm/games/news-archive/Sega%20Confirms%20Hikaru%20DOES%20Exist....htm Sega Confirms Hikaru Does Exist (November 24, 1999)]}} fog, alpha blending, anti‑aliasing, specular effects,{{fileref|NAOMI 1998 Press Release JP.pdf}}
+
:* Effects: [[wikipedia:Stencil buffer|Stencil]], shadows, motion blur, particle effects, fire effects, [[wikipedia:Fluid simulation|water effects]],{{ref|http://archive.is/nyrP3|http://www.goodcowfilms.com/farm/games/news-archive/Sega%20Confirms%20Hikaru%20DOES%20Exist....htm}} fog, alpha blending, anti‑aliasing, specular effects,{{fileref|NAOMI 1998 Press Release JP.pdf}}
−
** Features: [[wikipedia:Tiled rendering|Tiled rendering]], [[wikipedia:Deferred shading|deferred rendering]], [[wikipedia:Back-face culling|back‑face culling]], [[wikipedia:Hidden surface determination|hidden surface removal]]
+
:* Features: [[wikipedia:Tiled rendering|Tiled rendering]], [[wikipedia:Deferred shading|deferred rendering]], [[wikipedia:Back-face culling|back‑face culling]], [[wikipedia:Hidden surface determination|hidden surface removal]]
−
** [[wikipedia:Phong shading|Phong shading]]: Per‑pixel lighting/shading computation processed by rasterization pipeline,{{ref|1=[https://books.google.co.uk/books?id=-4ngT05gmAQC&pg=PA871 Computer Graphics: Principles and Practice (Page 871)]}} deferred rendering can prevent shading of overdrawn [[pixel]]s to maximize rendering bandwidth,{{ref|1=[https://books.google.co.uk/books?id=-4ngT05gmAQC&pg=PA900 Computer Graphics: Principles and Practice (Page 900)]}} all compute units could be used as shader units to maximize Phong shading performance
+
:* [[wikipedia:Phong shading|Phong shading]]: Per‑[[pixel]] lighting/shading computation processed by rasterization pipeline,{{ref|1=[https://books.google.co.uk/books?id=-4ngT05gmAQC&pg=PA871 ''Computer Graphics: Principles and Practice'' (page 871)]}} deferred rendering can prevent shading of overdrawn pixels to maximize rendering bandwidth,{{ref|1=[https://books.google.co.uk/books?id=-4ngT05gmAQC&pg=PA900 ''Computer Graphics: Principles and Practice'' (page 900)]}} all compute units could be used as shader units to maximize Phong shading performance
−
* Texture capabilities: 16×16 to 512×512 texture sizes, [[wikipedia:Mipmap|mipmapping]], mipmap trees, texture panning, multi‑texturing, [[wikipedia:Bump mapping|bump mapping]], [[wikipedia:Normal mapping|normal mapping]], texture filtering, bilinear filtering, trilinear filtering, [[wikipedia:Reflection mapping|environment mapping]]{{fileref|NAOMI 1998 Press Release JP.pdf}}
+
* Texture capabilities: 1×1 to 2048×2048 texture sizes, [[wikipedia:Mipmap|mipmapping]], mipmap trees, texture panning, multi‑texturing, [[wikipedia:Bump mapping|bump mapping]], [[wikipedia:Normal mapping|normal mapping]], texture filtering, bilinear filtering, trilinear filtering, [[wikipedia:Reflection mapping|environment mapping]]{{fileref|NAOMI 1998 Press Release JP.pdf}}
−
** Texture banks: 2 texture banks (stored as 2× 2048×1024 sheets), stores textures from MaskROM (with 16‑byte metadata per texture in Command RAM)
+
:* Texture banks: 2 texture banks (stored as 2× 2048×1024 sheets), stores textures from MaskROM (with 16‑byte metadata per texture in Command RAM)
−
* Floating-point performance: 32 GFLOPS{{ref|2 million polygons/sec, 4 lights/polygon, 16.339 kFLOPS per 100-pixel polygon, 32.678 GFLOPS|group=n}}
+
* Floating-point performance: 15 GFLOPS (estimate){{ref|Phong shading: 2 million polygons/sec, 4 light sources per polygon, 7,898–15,796 floating-point operations per 100-pixel polygon.|group=n}}
 
* Rendering [[fillrate]]:
 
* Rendering [[fillrate]]:
−
** Opaque polygons: 8 [[Pixel|GPixels/s]]{{ref|32 pixels per cycle,{{intref|Sega NAOMI}} 250 MHz|group=n}}
+
:* Opaque polygons: 8 [[Pixel|GPixels/s]]{{ref|32 pixels per cycle,{{intref|Sega NAOMI}} 250 MHz|group=n}}
−
** Translucent polygons: 1.6 GPixels/s (8bpp), 800 [[Pixel|MPixels/s]] (16bpp), 533 MPixels/s (24bpp){{ref|3.2 GB/s framebuffer SDRAM bandwidth (double-buffered)|group=n}}
+
:* Translucent polygons: 1.6 GPixels/s (8bpp), 800 [[Pixel|MPixels/s]] (16bpp), 530 MPixels/s (24bpp){{ref|3.2 GB/s framebuffer SDRAM bandwidth (double-buffered)|group=n}}
 
* Texture fillrate:
 
* Texture fillrate:
−
** Opaque polygons: 8 [[Texel|GTexels/s]]
+
:* Opaque polygons: 8 [[Texel|GTexels/s]]
−
** Translucent polygons: 4 GTexels/s (8bpp), 2 GTexels/s (16bpp), 1.333 GTexels/s (24bpp){{ref|8 GB/s texture bank RAM bandwidth (double-buffered)|group=n}}
+
:* Translucent polygons: 4 GTexels/s (8bpp), 2 GTexels/s (16bpp), 1.3 GTexels/s (24bpp){{ref|8 GB/s texture bank RAM bandwidth (double-buffered)|group=n}}
 
* Phong shading performance:
 
* Phong shading performance:
−
** 2 million polygons/sec: 4 lights/polygon, 100-pixel polygons{{ref|16.339 kFLOPS per 100-pixel polygon, 32.678 GFLOPS
+
:* 2 million polygons/sec: 4 lights/polygon, 50-100-pixel polygons{{ref|7,898–15,796 floating-point operations per 50-100-pixel polygon for 4 light sources (196 operations setup, 156 operations per pixel),{{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 ''Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings'' (page 78)]}} 15–30 GFLOPS|group=n}}
−
*T&L: 543 FLOPS per polygon (339 FLOPS transformation, 204 FLOPS lighting){{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}
+
:* 3-6 million polygons/sec: 4 lights/polygon, 32-pixel polygons{{ref|5188 floating-point operations per 32-pixel polygon for 4 light sources (113 operations setup, 156 operations per pixel ){{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 ''Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings'' (page 78)]}}|group=n}}
−
*Shading: 15.796 kFLOPS per 100-pixel polygon (196 FLOPS per polygon, 156 FLOPS per pixel){{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (Page 78)]}}|group=n}}
+
:* 10-20 million polygons/sec: 1 light/polygon, 32-pixel polygons{{ref|1297 floating-point operations per 32-pixel polygon for 1 light source (49 operations setup, 39 operations per pixel){{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 ''Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings'' (page 78)]}}|group=n}}
−
** 6 million polygons/sec: 4 lights/polygon, 32-pixel polygons{{ref|5.535 kFLOPS per 32-pixel polygon, 32.678 GFLOPS
 
−
*T&L: 543 FLOPS per polygon (339 FLOPS transformation, 204 FLOPS lighting){{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}
 
−
*Shading: 4.992 kFLOPS per 100-pixel polygon (196 FLOPS per polygon, 156 FLOPS per pixel){{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (Page 78)]}}|group=n}}
 
−
** 21 million polygons/sec: 1 light/polygon, 32-pixel polygons{{ref|1.561 kFLOPS per 32-pixel polygon, 32.762 GFLOPS
 
−
*T&L: 264 FLOPS per polygon (213 FLOPS transformation, 51 FLOPS lighting){{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}
 
−
*Shading: 1.297 kFLOPS per 32-pixel polygon (49 FLOPS per polygon, 39 FLOPS per pixel){{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (Page 78)]}}|group=n}}
 
 
* Gouraud shading performance:
 
* Gouraud shading performance:
−
** 62 million polygons/sec: 4 lights/polygon,{{ref|417 FLOPS per polygon: 213 FLOPS transformation, 204 FLOPS lighting{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}|group=n}} 32-pixel polygons
+
:* 30-60 million polygons/sec: 4 lights/polygon,{{ref|181 floating-point operations per vertex/polygon: 113 operations for transformation, 68 operations for 4 light sources (17 operations per light source){{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}|group=n}} 32-pixel polygons
−
** 160 million polygons/sec: 1 light/polygon,{{ref|201 FLOPS per polygon: 150 FLOPS transformation, 51 FLOPS lighting{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}|group=n}} 50-pixel polygons
+
:* 100-200 million polygons/sec: 1 light/polygon,{{ref|130 floating-point operations per vertex/polygon: 113 operations for transformation, 17 operations for 1 light source{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}|group=n}} 32-pixel polygons
−
* Flat shading performance: 190 million polygons/sec,{{ref|167 FLOPS per polygon: 150 FLOPS transformation, 17 FLOPS lighting{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}|group=n}} 400 million vertices/sec{{ref|67 FLOPS per vertex: 50 FLOPS transformation, 17 FLOPS lighting{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}|group=n}}
 
 
* Texture mapping performance:
 
* Texture mapping performance:
−
** 190 million polygons/sec: 40-texel polygons
+
:* 80 million polygons/sec: 50-100-[[texel]] polygons
−
** 80 million polygons/sec: 100-texel polygons
+
:* 100-200 million polygons/sec: 32-texel polygons
 
}}
 
}}
  
Line 139: Line 125:
 
{{multicol|
 
{{multicol|
 
* Memory: Up to 465 [[Byte|MB]]{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
 
* Memory: Up to 465 [[Byte|MB]]{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
−
** Main memory: 130 MB{{ref|64 MB RAM, 66 MB ROM|group=n}}
+
:* Main memory: 130 MB{{ref|64 MB RAM, 66 MB ROM|group=n}}
−
** Video memory: 286.25 MB{{ref|30.25 MB RAM, 256 MB ROM|group=n}}
+
:* Video memory: 286.25 MB{{ref|30.25 MB RAM, 256 MB ROM|group=n}}
−
** Sound memory: 48 MB{{ref|16 MB RAM, 32 MB ROM|group=n}}
+
:* Sound memory: 48 MB{{ref|16 MB RAM, 32 MB ROM|group=n}}
−
** Other memory: 480 [[Byte|KB]]{{ref|384 KB RAM, 96 KB cache|group=n}}
+
:* Other memory: 480 [[Byte|KB]]{{ref|384 KB RAM, 96 KB cache|group=n}}
 
* [[RAM]]: 110.625 MB{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru.c Sega Hikaru (Valkyrie)]}}{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
 
* [[RAM]]: 110.625 MB{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru.c Sega Hikaru (Valkyrie)]}}{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
−
** Main RAM: 64 MB [[wikipedia:Synchronous dynamic random-access memory|SDRAM]]{{fileref|HM5264 datasheet.pdf}}{{ref|32 MB per SH‑4|group=n}}
+
:* Main RAM: 64 MB [[wikipedia:Synchronous dynamic random-access memory|SDRAM]]{{fileref|HM5264 datasheet.pdf}}{{ref|32 MB per SH‑4|group=n}}
−
** [[VRAM]]: 30.25 MB{{fileref|HY57V161610D datasheet.pdf}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu.c Sega Hikaru GPU (Valkyrie)]}}
+
:* [[VRAM]]: 30.25 MB{{fileref|HY57V161610D datasheet.pdf}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu.c Sega Hikaru GPU (Valkyrie)]}}
−
*** 4 MB Command RAM{{ref|2× 315‑6197|group=n}}
+
::* 4 MB Command RAM{{ref|2× 315‑6197|group=n}}
−
*** 8 MB texture banks{{ref|2× 315‑6084|group=n}}
+
::* 8 MB texture banks{{ref|2× 315‑6084|group=n}}
−
*** 8 MB framebuffer SDRAM{{ref|IC 44‑47{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}|group=n}}
+
::* 8 MB framebuffer SDRAM{{ref|IC 44‑47{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}|group=n}}
−
*** 10 MB other SDRAM{{ref|1 MB Geometry Processor, 1 MB Image Generator|group=n}}
+
::* 10 MB other SDRAM{{ref|1 MB Geometry Processor, 1 MB Image Generator|group=n}}
−
*** 256 KB Synchronous [[SRAM]]{{fileref|UPD432232 datasheet.pdf}}
+
::* 256 KB Synchronous [[SRAM]]{{fileref|UPD432232 datasheet.pdf}}
−
** Sound RAM: 16 MB SDRAM{{ref|8 MB per AICA|group=n}}
+
:* Sound RAM: 16 MB SDRAM{{ref|8 MB per AICA|group=n}}
−
** Other Main Board RAM: 128 KB [[SRAM]]{{fileref|HM62256B datasheet.pdf}}
+
:* Other Main Board RAM: 128 KB [[SRAM]]{{fileref|HM62256B datasheet.pdf}}
−
*** MIE RAM: 64 KB{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-mie.c Sega Hikaru MIE (Valkyrie)]}}
+
::* MIE RAM: 64 KB{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-mie.c Sega Hikaru MIE (Valkyrie)]}}
−
*** [[SRAM|Backup RAM]]: 64 KB
+
::* [[SRAM|Backup RAM]]: 64 KB
−
** Network Board RAM: 192 KB SRAM{{fileref|HM62256B datasheet.pdf}}
+
:* Network Board RAM: 192 KB SRAM{{fileref|HM62256B datasheet.pdf}}
−
** ROM Board RAM: 64 KB SRAM{{fileref|CY7C199 datasheet.pdf}}
+
:* ROM Board RAM: 64 KB SRAM{{fileref|CY7C199 datasheet.pdf}}
 
* [[ROM]]: Up to 354 MB
 
* [[ROM]]: Up to 354 MB
−
** [[BIOS|Boot ROM]]: 2 MB [[EPROM]]{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
+
:* [[BIOS|Boot ROM]]: 2 MB [[EPROM]]{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
−
** Game [[Cartridge|ROM Board]]: Up to 352 MB (64 MB main ROM, 256 MB video [[wikipedia:Mask ROM|MaskROM]],{{ref|[http://www.mamedb.com/game/pharrier Planet Harriers (MAME)]}} 32 MB sound ROM){{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-memctl.c Sega Hikaru Memory Controller (Valkyrie)]}}
+
:* Game [[Cartridge|ROM Board]]: Up to 352 MB (64 MB main ROM, 256 MB video [[wikipedia:Mask ROM|MaskROM]],{{ref|[http://www.mamedb.com/game/pharrier.html Planet Harriers (MAME)]}} 32 MB sound ROM){{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-memctl.c Sega Hikaru Memory Controller (Valkyrie)]}}
−
** Note: High‑speed access allows ROM to effectively be used as RAM, with polygons and textures streamed directly from game ROM Board.{{ref|[http://farm6.staticflickr.com/5471/12172411045_18bfc5912f_c.jpg Hideki Sato Sega Interview (Edge)]}}
+
:* Note: High‑speed access allows ROM to effectively be used as RAM, with polygons and textures streamed directly from game ROM Board.{{ref|[http://farm6.staticflickr.com/5471/12172411045_18bfc5912f_c.jpg Hideki Sato Sega Interview (Edge)]}}
 
* Cache: 96 KB{{ref|48 KB per SH‑4 CPU{{fileref|SH-4 32-bit CPU Core Architecture.pdf}}|group=n}}
 
* Cache: 96 KB{{ref|48 KB per SH‑4 CPU{{fileref|SH-4 32-bit CPU Core Architecture.pdf}}|group=n}}
 
}}
 
}}
Line 167: Line 153:
 
{{multicol|
 
{{multicol|
 
* Internal processor cache bandwidth:{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
 
* Internal processor cache bandwidth:{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
−
** SH‑4 cache: 6.4 GB/s{{ref|256‑bit, 200 MHz|group=n}}
+
:* SH‑4 cache: 6.4 GB/s{{ref|256‑bit, 200 MHz|group=n}}
−
** Sega Custom 3D GPU: 32 GB/s
+
:* Sega Custom 3D GPU: 32 GB/s
−
** AICA Sound Processor: 536 MB/s{{ref|2× 32‑bit, 67 MHz|group=n}}
+
:* AICA Sound Processor: 536 MB/s{{ref|2× 32‑bit, 67 MHz|group=n}}
−
** Z80 MIE MCU: 15 MB/s{{ref|8‑bit, 14.7456 MHz|group=n}}
+
:* Z80 MIE MCU: 15 MB/s{{ref|8‑bit, 14.7456 MHz|group=n}}
−
** 315‑6154 Memory Controllers: 1.6 GB/s{{ref|64‑bit, 200 MHz|group=n}}
+
:* 315‑6154 Memory Controllers: 1.6 GB/s{{ref|64‑bit, 200 MHz|group=n}}
−
** Main Board PLD: 25 GB/sec{{ref|928‑bit, 250 MHz|group=n}}
+
:* Main Board PLD: 25 GB/sec{{ref|928‑bit, 250 MHz|group=n}}
−
** ROM Board PLD: 1.45 GB/s{{ref|2× 32‑bit, 180/182 MHz|group=n}}
+
:* ROM Board PLD: 1.45 GB/s{{ref|2× 32‑bit, 180/182 MHz|group=n}}
−
** Network Board 68000: 80 MB/s{{ref|16‑bit, 40 MHz|group=n}}
+
:* Network Board 68000: 80 MB/s{{ref|16‑bit, 40 MHz|group=n}}
−
** Network Board FPGA: 720 MB/s{{ref|32‑bit, 180 MHz{{fileref|PLSI2032 datasheet.pdf}}|group=n}}
+
:* Network Board FPGA: 720 MB/s{{ref|32‑bit, 180 MHz{{fileref|PLSI2032 datasheet.pdf}}|group=n}}
 
* RAM bandwidth: 35.111 GB/s{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
 
* RAM bandwidth: 35.111 GB/s{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
−
** Main RAM: 2.4 GB/s{{ref|192‑bit, 100 MHz, 6 [[wikipedia:Nanosecond|ns]]{{fileref|HM5264 datasheet.pdf}}|group=n}}
+
:* Main RAM: 2.4 GB/s{{ref|192‑bit, 100 MHz, 6 [[wikipedia:Nanosecond|ns]]{{fileref|HM5264 datasheet.pdf}}|group=n}}
−
*** SH‑4: 1.6 GB/s{{ref|128‑bit|group=n}}
+
::* SH‑4: 1.6 GB/s{{ref|128‑bit|group=n}}
−
*** Memory Controllers: 800 MB/s{{ref|64‑bit|group=n}}
+
::* Memory Controllers: 800 MB/s{{ref|64‑bit|group=n}}
−
** VRAM: 32 GB/s{{ref|1088‑bit, 4.5 ns|group=n}}
+
:* VRAM: 32 GB/s{{ref|1088‑bit, 4.5 ns|group=n}}
−
*** Command RAM: 16 GB/s{{ref|315‑6197, 512‑bit, 250 MHz|group=n}}
+
::* Command RAM: 16 GB/s{{ref|315‑6197, 512‑bit, 250 MHz|group=n}}
−
*** Texture banks: 8 GB/s{{ref|315‑6084, 256‑bit, 250 MHz|group=n}}
+
::* Texture banks: 8 GB/s{{ref|315‑6084, 256‑bit, 250 MHz|group=n}}
−
*** SDRAM: 7.2 GB/s{{ref|9× 32‑bit, 200 MHz, 4.5 ns{{fileref|HY57V161610D datasheet.pdf}}
+
::* SDRAM: 7.2 GB/s{{ref|9× 32‑bit, 200 MHz, 4.5 ns{{fileref|HY57V161610D datasheet.pdf}}
 
*Framebuffer: 3.2 GB/s (4x 32‑bit,{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}} 200 MHz)
 
*Framebuffer: 3.2 GB/s (4x 32‑bit,{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}} 200 MHz)
 
|group=n}}
 
|group=n}}
−
*** Synchronous SRAM: 400 MB/s{{ref|32‑bit, 100 MHz, 5 ns{{fileref|UPD432232 datasheet.pdf}}|group=n}}
+
::* Synchronous SRAM: 400 MB/s{{ref|32‑bit, 100 MHz, 5 ns{{fileref|UPD432232 datasheet.pdf}}|group=n}}
−
** Sound RAM: 268 MB/s{{ref|32‑bit, 67 MHz, 6 ns{{fileref|K4S641632 datasheet.pdf}}|group=n}}
+
:* Sound RAM: 268 MB/s{{ref|32‑bit, 67 MHz, 6 ns{{fileref|K4S641632 datasheet.pdf}}|group=n}}
−
** HM62256 SRAM: 193 MB/s{{ref|72‑bit, 45 ns{{fileref|HM62256B datasheet.pdf}}|group=n}}
+
:* HM62256 SRAM: 193 MB/s{{ref|72‑bit, 45 ns{{fileref|HM62256B datasheet.pdf}}|group=n}}
−
*** MIE RAM: 15 MB/s{{ref|8‑bit, 14.7456 MHz|group=n}}
+
::* MIE RAM: 15 MB/s{{ref|8‑bit, 14.7456 MHz|group=n}}
−
*** Backup RAM: 44.444444 MB/s{{ref|16‑bit, 22.222222 MHz|group=n}}
+
::* Backup RAM: 44.444444 MB/s{{ref|16‑bit, 22.222222 MHz|group=n}}
−
*** Network Board RAM: 133.333333 MB/s{{ref|48‑bit, 22.222222 MHz|group=n}}
+
::* Network Board RAM: 133.333333 MB/s{{ref|48‑bit, 22.222222 MHz|group=n}}
−
** ROM Board RAM: 250 MB/s{{ref|16‑bit, 125 MHz, 8 ns{{fileref|CY7C199 datasheet.pdf}}|group=n}}
+
:* ROM Board RAM: 250 MB/s{{ref|16‑bit, 125 MHz, 8 ns{{fileref|CY7C199 datasheet.pdf}}|group=n}}
 
* ROM bandwidth: 4 GB/s{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
 
* ROM bandwidth: 4 GB/s{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
−
** Boot ROM: 800 MB/s{{ref|64‑bit, 100 MHz{{fileref|CY2292 datasheet.pdf}}|group=n}}
+
:* Boot ROM: 800 MB/s{{ref|64‑bit, 100 MHz{{fileref|CY2292 datasheet.pdf}}|group=n}}
−
** ROM Board PLD: 1.45 GB/s{{ref|2× 32‑bit, 180/182 MHz{{fileref|PLSI2032 datasheet.pdf}}{{fileref|M4A3 datasheet.pdf}}{{fileref|MACH111 datasheet.pdf}}|group=n}}
+
:* ROM Board PLD: 1.45 GB/s{{ref|2× 32‑bit, 180/182 MHz{{fileref|PLSI2032 datasheet.pdf}}{{fileref|M4A3 datasheet.pdf}}{{fileref|MACH111 datasheet.pdf}}|group=n}}
−
** ROM Board Connectors: 1.5 GB/s{{ref|[https://web.archive.org/web/20160228172702/members.iinet.net.au/~lantra9jp1/gurudumps/wip/hikaru1.jpg 2x] [https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu.c 32‑bit], 182 MHz|group=n}}
+
:* ROM Board Connectors: 1.5 GB/s{{ref|2x 32‑bit, 182 MHz{{ref|https://web.archive.org/web/20160228172702/http://members.iinet.net.au/~lantra9jp1/gurudumps/wip/hikaru1.jpg}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu.c Sega Hikaru GPU (Valkyrie)]}}|group=n}}
 
}}
 
}}
  
−
==Hardware Images==
+
==List of games==
 +
{{CargoReleaseList
 +
| table=releases
 +
| query=console="HIKARU"
 +
| orderby=date
 +
}}
 +
 
 +
==History==
 +
According to Sega in 1999:{{ref|http://archive.is/nyrP3|http://www.goodcowfilms.com/farm/games/news-archive/Sega%20Confirms%20Hikaru%20DOES%20Exist....htm}}
 +
 
 +
{{quote|Brave Firefighters utilizes a slightly modified Naomi Hardware system called Hikaru. Hikaru incorporates a custom Sega graphics chip and possesses larger memory capacity then standard Naomi systems. "These modifications were necessary because in Brave Firefighters, our engineers were faced with the daunting challenge of creating 3d images of flames and sprayed water," stated Sega's Vice President of Sales and Marketing, Barbara Joyiens. "If you stop and think about it, both have an almost infinite number of shapes, sizes, colors, levels of opaqueness, shadings and shadows. And, when you combine the two by simulating the spraying of water on a flame, you create an entirely different set of challenges for our game designers and engineers to overcome; challenges that would be extremely difficult, if not impossible to overcome utilizing existing 3D computers. Hikaru has the horsepower to handle these demanding graphic challenges with clarity, depth and precision."}}
 +
 
 +
In addition, the Hikaru also uses two Hitachi SH-4 CPU processors, two Yamaha AICA sound engine processors, a Motorola 68000 network CPU, and a dual GPU setup. The Hikaru hardware was largely complete in 1998, before it was released to the public in 1999.{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}} The system was very expensive, and difficult to program.{{magref|nextgeneration|76|37}} The word "Hikaru" (ひかる) means "to shine" in Japanese.
 +
 
 +
==Photo gallery==
 
<gallery>
 
<gallery>
−
File:Hikaru mainPCB.jpg|Main PCB board
+
Hikaru mainPCB.jpg|Main PCB board
−
File:Hikaru soundboard.jpg|Sound board
+
Hikaru soundboard.jpg|Sound board
−
File:Hikaru commboard.jpg|Comm board
+
Hikaru commboard.jpg|Comm board
−
File:Hikaru rombd left.jpg|ROM board (left side)
+
Hikaru rombd left.jpg|ROM board (left side)
−
File:Hikaru rombd right.jpg|ROM board (right side)
+
Hikaru rombd right.jpg|ROM board (right side)
−
File:Hikaru rombd upleft.jpg|Main board (Up Left view)
+
Hikaru rombd upleft.jpg|Main board (Up Left view)
−
File:Hikaru rombd upright.jpg|Main board (Up Right view)
+
Hikaru rombd upright.jpg|Main board (Up Right view)
−
File:Hikaru rombd dnleft.jpg|Main board (Down Left view)
+
Hikaru rombd dnleft.jpg|Main board (Down Left view)
−
File:Hikaru rombd dnright.jpg|Main board (Down Right view)
+
Hikaru rombd dnright.jpg|Main board (Down Right view)
−
File:Hikaru customa.jpg|Custom board A
+
Hikaru customa.jpg|Custom board A
−
File:Hikaru customb.jpg|Custom board B
+
Hikaru customb.jpg|Custom board B
−
File:Hikaru Case JP Photo1.jpg|Outer Case
+
Hikaru Case JP Photo1.jpg|Outer Case
−
File:Hikaru Case JP Photo2.jpg|Inside, assembled
+
Hikaru Case JP Photo2.jpg|Inside, assembled
 
</gallery>
 
</gallery>
−
 
−
==List of Games==
 
−
*''[[Brave FireFighters]]'' (1999)
 
−
*''[[NASCAR Arcade]]'' (2000)
 
−
*''[[Planet Harriers]]'' (2000)
 
−
*''[[Star Wars Racer Arcade]]'' (2000)
 
−
*''[[Air Trix]]'' (2001)
 
−
*''[[Virtual-On: Force|Cyber Troopers Virtual-On Force]]'' (2001)
 
−
*''[[Virtual-On: Force|Cyber Troopers Virtual-On Force Ver.7.7]]'' (2002)
 
  
 
==Notes==
 
==Notes==
 
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<references group="n"/>
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}}
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|cols=3}}
  
 
==References==
 
==References==
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{{multicol|
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<references/>
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<references />
 
−
}}
 
  
 
{{Sega Arcade Boards}}
 
{{Sega Arcade Boards}}
 
[[Category:Post-NAOMI arcade systems]]
 
[[Category:Post-NAOMI arcade systems]]
 
[[Category:Sega NAOMI]]
 
[[Category:Sega NAOMI]]

Latest revision as of 08:06, 16 November 2024

Hikaru mainPCB.jpg
Sega Hikaru
Manufacturer: Sega Enterprises, Ltd.
Release Date RRP Code
Arcade
World		 ? 837-13402





































The Sega Hikaru is a successor of the Sega NAOMI and Sega Model 3 arcade systems that was developed in 1998, most likely by Hard Ware R&D Team 3[1] and debuted in 1999. The Hikaru was used for a handful of deluxe dedicated-cabinet games, beginning with 1999's Brave Fire Fighters, in which the flame and water effects were largely a showpiece for the hardware.

It was significantly more powerful and expensive than the NAOMI. The Hikaru featured a custom Sega GPU with advanced graphical capabilities, additional CPU and sound processors, various custom processors, increased memory, and faster bandwidth. It was the first game platform capable of effective hardware Phong shading, the most intensive form of shading at the time, and was capable of the most complex lighting and particle effects of its time.

It was the most powerful game system of its time (Planet Harriers, for example, was regarded as having the best video game graphics at the time), but it was very expensive and difficult to program. Since it was comparatively expensive to produce, Sega soon abandoned the Hikaru in favor of continued NAOMI development. It was succeeded by the more affordable NAOMI 2.[2]

Technical specifications

  • Board composition: Main Board, ROM Board, AICA Sound Board, I/O Board, Filter Board, Network Board[3]
  • Extensions: communication, 4‑channel surround audio, PCI, MIDI, RS‑232C
  • Connection: JAMMA Video compliant, VGA

Main

  • Units: 2× 128‑bit SIMD vector units with graphic functions, 2× 64‑bit floating‑point units, 2× 32‑bit fixed‑point units
  • Bus width: 256‑bit (2× 128‑bit) internal, 128‑bit (2× 64‑bit) external
  • Fixed‑point performance: 720 MIPS
  • Floating‑point performance: 2.8 GFLOPS
  • Note: With Sega Custom 3D GPU, the SH‑4's 128‑bit SIMD matrix unit can be dedicated to game physics, artificial intelligence, collision detection, overall game code, or additional graphical performance.
  • MIE bridge MCU: Sega 315‑6146 Maple‑JVS MCU (Zilog Z80)[7][8] @ 14.7456 MHz[3] (8/16‑bit instructions, 8‑bit bus, 2.14 MIPS)
  • Memory controllers: 2× Sega 315‑6154 Memory Controller @ 200 MHz (2× 32‑bit, DMA capabilities)[4][3][9]
  • Main Board PLD: 27 units, 928‑bit (25 GB/sec) internal, 640‑bit (21 GB/sec) external[3][10]
  • 2× Sega PAL (Lattice GAL16V8) GAL @ 250 MHz: 16 units (2× 8 units), 128‑bit (2× 64‑bit), DMA control, graphics processing,[11] 4 GB/sec
  • Sega 315‑6083A, 315‑6085, 315‑6086 @ 250 MHz: 3 units, 384‑bit (3× 128‑bit), 12 GB/sec
  • Sega 315‑6202 (Lattice CY37128) CPLD @ 167 MHz: 8 units, 416‑bit (8× 52‑bit) internal (9 GB/sec), 128‑bit (8× 16‑bit) external (3 GB/sec)[12]
  • Network Board processors:[3]
  • Network CPU: Motorola 68000 @ 40 MHz (16/32‑bit instructions, 16‑bit bus, 7 MIPS)[3]
  • Network PLD: FPGA @ 180 MHz (32‑bit),[13] 3× PAL @ 40 MHz, Sega 315‑5804 CPLD @ 40 MHz
  • Network processors: 2× Sega 315‑5917 @ 40 MHz
  • ROM Board processors:[3]
  • ROM Board PLD: FPGA @ 180 MHz (32‑bit),[13] CPLD/PAL @ 182 MHz (32‑bit)[14][15]
  • Security IC: Sega 315-5881 @ 28 MHz

Sound

Graphics

The Sega Hikaru uses custom 3D graphics hardware, which include the following specifications:[16][17][4]

  • Graphics Engine GPU: Sega Custom 3D GPU @ 250 MHz
  • GPU core processors: 7 processors[3][10]
  • 2× Sega GPU 15 CP Command Processors (315‑6197) @ 250 MHz: 512‑bit (2× 256‑bit), Geometry Processor
  • Sega GPU 1A Image Generator (315‑6087) @ 250 MHz: 128‑bit, rasterizer/renderer[18]
  • 2× Sega GPU DMA controllers (315‑6084) @ 250 MHz: 256‑bit (2× 128‑bit)
  • 2× Analog Devices ADV7120 Video DAC @ 80 MHz: 48‑bit (2× 24‑bit)[19]
  • GPU Geometry Processors: 2× Sega GPU 15 CP Command Processors
  • Hardware T&L: Transform, clipping, lighting
  • Materials: Flat shading, Gouraud shading, Phong shading, diffuse, ambient, specular, unlit
  • Fog: Color, transparency, density, depth blend, translucency
  • Rendering: Double‑buffered 3D rendering (odd & even frames), depth cueing, depth buffer, depth bias, face culling, static meshes, dynamic meshes
  • Shading: Flat shading, Gouraud shading, Phong shading, diffuse, ambient, specular, linear
  • Modelview matrix: Instanced drawing, multiple instances, shared attributes between models,[20] modelview stack
  • Object memory: 8 viewports, 256 modelviews, 16,384 materials (256 LOD levels), 16,384 textures/texheads (256 LOD levels), 1024 lights (256 light sets)
  • GPU DMA controllers: 2× Sega GPU DMA controllers
  • GPU IDMA (Indirect DMA) controller: Loads texture data from MaskROM (via external bus) into texture banks (with metadata), allows CPU access to texture banks
  • DMA controller: Moves textures around in framebuffer, transfers bitmap data to bitmap layers, allows CPU access to framebuffer
  • Single monitor display: 496×384 to 800×608 (default 640×480)
  • Dual monitor display: 992×384 to 1600×608 (default 1280×480)
  • Video output: 496×384 to 1968×1080 (default 640×480)
  • Framebuffer: 496×384 to 2048×2048 (default 2048×2048)[3]
  • Lighting: 1024 lights per scene, 4 lights per polygon, 256 light sets per scene (4 lights per set), 8 window surfaces
  • Light types: Diffuse, ambient, specular, horizontal, spot
  • Emission types: Constant, linear, infinite linear, square, reciprocal, reciprocal squared
  • Object types: Lights (with individual position, direction and emission properties), lightsets (a set of up to 4 lights that share a mesh)
  • GPU capabilities: 2 bitmap layers, calendar, 16,384 vertices per mesh,[21] hidden surface removal, deferred rendering
  • Framebuffer: 2048×2048 sheet (can be partitioned into framebuffer, tile data, and/or 1‑2 bitmap layers), handled by 2 GPU 1A Image Generator rasterizers/renderers (double‑buffering), accessible by DMA controller
  • Effects: Stencil, shadows, motion blur, particle effects, fire effects, water effects,[22] fog, alpha blending, anti‑aliasing, specular effects,[23]
  • Features: Tiled rendering, deferred rendering, back‑face culling, hidden surface removal
  • Phong shading: Per‑pixel lighting/shading computation processed by rasterization pipeline,[24] deferred rendering can prevent shading of overdrawn pixels to maximize rendering bandwidth,[25] all compute units could be used as shader units to maximize Phong shading performance
  • Texture banks: 2 texture banks (stored as 2× 2048×1024 sheets), stores textures from MaskROM (with 16‑byte metadata per texture in Command RAM)
  • Floating-point performance: 15 GFLOPS (estimate)[n 1]
  • Rendering fillrate:
  • Texture fillrate:
  • Opaque polygons: 8 GTexels/s
  • Translucent polygons: 4 GTexels/s (8bpp), 2 GTexels/s (16bpp), 1.3 GTexels/s (24bpp)[n 4]
  • Phong shading performance:
  • 2 million polygons/sec: 4 lights/polygon, 50-100-pixel polygons[n 5]
  • 3-6 million polygons/sec: 4 lights/polygon, 32-pixel polygons[n 6]
  • 10-20 million polygons/sec: 1 light/polygon, 32-pixel polygons[n 7]
  • Gouraud shading performance:
  • 30-60 million polygons/sec: 4 lights/polygon,[n 8] 32-pixel polygons
  • 100-200 million polygons/sec: 1 light/polygon,[n 9] 32-pixel polygons
  • Texture mapping performance:
  • 80 million polygons/sec: 50-100-texel polygons
  • 100-200 million polygons/sec: 32-texel polygons

Memory

  • Network Board RAM: 192 KB SRAM[32]
  • ROM Board RAM: 64 KB SRAM[33]
  • ROM: Up to 354 MB
  • Boot ROM: 2 MB EPROM[3]
  • Game ROM Board: Up to 352 MB (64 MB main ROM, 256 MB video MaskROM,[34] 32 MB sound ROM)[4]
  • Note: High‑speed access allows ROM to effectively be used as RAM, with polygons and textures streamed directly from game ROM Board.[35]

Bandwidth

  • Internal processor cache bandwidth:[3]
  • SH‑4 cache: 6.4 GB/s[n 21]
  • Sega Custom 3D GPU: 32 GB/s
  • AICA Sound Processor: 536 MB/s[n 22]
  • Z80 MIE MCU: 15 MB/s[n 23]
  • 315‑6154 Memory Controllers: 1.6 GB/s[n 24]
  • Main Board PLD: 25 GB/sec[n 25]
  • ROM Board PLD: 1.45 GB/s[n 26]
  • Network Board 68000: 80 MB/s[n 27]
  • Network Board FPGA: 720 MB/s[n 28]
  • RAM bandwidth: 35.111 GB/s[3]
  • MIE RAM: 15 MB/s[n 23]
  • Backup RAM: 44.444444 MB/s[n 39]
  • Network Board RAM: 133.333333 MB/s[n 40]
  • ROM Board RAM: 250 MB/s[n 41]
  • ROM bandwidth: 4 GB/s[3]
  • Boot ROM: 800 MB/s[n 42]
  • ROM Board PLD: 1.45 GB/s[n 43]
  • ROM Board Connectors: 1.5 GB/s[n 44]

List of games

History

According to Sega in 1999:[22]


“ Brave Firefighters utilizes a slightly modified Naomi Hardware system called Hikaru. Hikaru incorporates a custom Sega graphics chip and possesses larger memory capacity then standard Naomi systems. "These modifications were necessary because in Brave Firefighters, our engineers were faced with the daunting challenge of creating 3d images of flames and sprayed water," stated Sega's Vice President of Sales and Marketing, Barbara Joyiens. "If you stop and think about it, both have an almost infinite number of shapes, sizes, colors, levels of opaqueness, shadings and shadows. And, when you combine the two by simulating the spraying of water on a flame, you create an entirely different set of challenges for our game designers and engineers to overcome; challenges that would be extremely difficult, if not impossible to overcome utilizing existing 3D computers. Hikaru has the horsepower to handle these demanding graphic challenges with clarity, depth and precision." „


In addition, the Hikaru also uses two Hitachi SH-4 CPU processors, two Yamaha AICA sound engine processors, a Motorola 68000 network CPU, and a dual GPU setup. The Hikaru hardware was largely complete in 1998, before it was released to the public in 1999.[3] The system was very expensive, and difficult to program.[2] The word "Hikaru" (ひかる) means "to shine" in Japanese.

Photo gallery

  • Main PCB board

  • Sound board

  • Comm board

  • ROM board (left side)

  • ROM board (right side)

  • Main board (Up Left view)

  • Main board (Up Right view)

  • Main board (Down Left view)

  • Main board (Down Right view)

  • Custom board A

  • Custom board B

  • Outer Case

  • Inside, assembled

Notes

  1. ↑ [Phong shading: 2 million polygons/sec, 4 light sources per polygon, 7,898–15,796 floating-point operations per 100-pixel polygon. Phong shading: 2 million polygons/sec, 4 light sources per polygon, 7,898–15,796 floating-point operations per 100-pixel polygon.]
  2. ↑ [32 pixels per cycle,[26] 250 MHz 32 pixels per cycle,[26] 250 MHz]
  3. ↑ [3.2 GB/s framebuffer SDRAM bandwidth (double-buffered) 3.2 GB/s framebuffer SDRAM bandwidth (double-buffered)]
  4. ↑ [8 GB/s texture bank RAM bandwidth (double-buffered) 8 GB/s texture bank RAM bandwidth (double-buffered)]
  5. ↑ [7,898–15,796 floating-point operations per 50-100-pixel polygon for 4 light sources (196 operations setup, 156 operations per pixel),[27] 15–30 GFLOPS 7,898–15,796 floating-point operations per 50-100-pixel polygon for 4 light sources (196 operations setup, 156 operations per pixel),[27] 15–30 GFLOPS]
  6. ↑ [5188 floating-point operations per 32-pixel polygon for 4 light sources (113 operations setup, 156 operations per pixel )[27] 5188 floating-point operations per 32-pixel polygon for 4 light sources (113 operations setup, 156 operations per pixel )[27]]
  7. ↑ [1297 floating-point operations per 32-pixel polygon for 1 light source (49 operations setup, 39 operations per pixel)[27] 1297 floating-point operations per 32-pixel polygon for 1 light source (49 operations setup, 39 operations per pixel)[27]]
  8. ↑ [181 floating-point operations per vertex/polygon: 113 operations for transformation, 68 operations for 4 light sources (17 operations per light source)[28] 181 floating-point operations per vertex/polygon: 113 operations for transformation, 68 operations for 4 light sources (17 operations per light source)[28]]
  9. ↑ [130 floating-point operations per vertex/polygon: 113 operations for transformation, 17 operations for 1 light source[28] 130 floating-point operations per vertex/polygon: 113 operations for transformation, 17 operations for 1 light source[28]]
  10. ↑ [64 MB RAM, 66 MB ROM 64 MB RAM, 66 MB ROM]
  11. ↑ [30.25 MB RAM, 256 MB ROM 30.25 MB RAM, 256 MB ROM]
  12. ↑ [16 MB RAM, 32 MB ROM 16 MB RAM, 32 MB ROM]
  13. ↑ [384 KB RAM, 96 KB cache 384 KB RAM, 96 KB cache]
  14. ↑ [32 MB per SH‑4 32 MB per SH‑4]
  15. ↑ [2× 315‑6197 2× 315‑6197]
  16. ↑ [2× 315‑6084 2× 315‑6084]
  17. ↑ [IC 44‑47[3] IC 44‑47[3]]
  18. ↑ [1 MB Geometry Processor, 1 MB Image Generator 1 MB Geometry Processor, 1 MB Image Generator]
  19. ↑ [8 MB per AICA 8 MB per AICA]
  20. ↑ [48 KB per SH‑4 CPU[36] 48 KB per SH‑4 CPU[36]]
  21. ↑ [256‑bit, 200 MHz 256‑bit, 200 MHz]
  22. ↑ [2× 32‑bit, 67 MHz 2× 32‑bit, 67 MHz]
  23. ↑ 23.0 23.1 [8‑bit, 14.7456 MHz 8‑bit, 14.7456 MHz]
  24. ↑ [64‑bit, 200 MHz 64‑bit, 200 MHz]
  25. ↑ [928‑bit, 250 MHz 928‑bit, 250 MHz]
  26. ↑ [2× 32‑bit, 180/182 MHz 2× 32‑bit, 180/182 MHz]
  27. ↑ [16‑bit, 40 MHz 16‑bit, 40 MHz]
  28. ↑ [32‑bit, 180 MHz[13] 32‑bit, 180 MHz[13]]
  29. ↑ [192‑bit, 100 MHz, 6 ns[29] 192‑bit, 100 MHz, 6 ns[29]]
  30. ↑ [128‑bit 128‑bit]
  31. ↑ [64‑bit 64‑bit]
  32. ↑ [1088‑bit, 4.5 ns 1088‑bit, 4.5 ns]
  33. ↑ [315‑6197, 512‑bit, 250 MHz 315‑6197, 512‑bit, 250 MHz]
  34. ↑ [315‑6084, 256‑bit, 250 MHz 315‑6084, 256‑bit, 250 MHz]
  35. ↑ [9× 32‑bit, 200 MHz, 4.5 ns[30]
    • Framebuffer: 3.2 GB/s (4x 32‑bit,[3] 200 MHz)
    9× 32‑bit, 200 MHz, 4.5 ns[30]
    • Framebuffer: 3.2 GB/s (4x 32‑bit,[3] 200 MHz)]
  36. ↑ [32‑bit, 100 MHz, 5 ns[31] 32‑bit, 100 MHz, 5 ns[31]]
  37. ↑ [32‑bit, 67 MHz, 6 ns[37] 32‑bit, 67 MHz, 6 ns[37]]
  38. ↑ [72‑bit, 45 ns[32] 72‑bit, 45 ns[32]]
  39. ↑ [16‑bit, 22.222222 MHz 16‑bit, 22.222222 MHz]
  40. ↑ [48‑bit, 22.222222 MHz 48‑bit, 22.222222 MHz]
  41. ↑ [16‑bit, 125 MHz, 8 ns[33] 16‑bit, 125 MHz, 8 ns[33]]
  42. ↑ [64‑bit, 100 MHz[38] 64‑bit, 100 MHz[38]]
  43. ↑ [2× 32‑bit, 180/182 MHz[13][14][15] 2× 32‑bit, 180/182 MHz[13][14][15]]
  44. ↑ [2x 32‑bit, 182 MHz[39][16] 2x 32‑bit, 182 MHz[39][16]]

References

  1. ↑ Brave Firefighters#Production_credits
  2. ↑ 2.0 2.1 Next Generation, "April 2001" (US; 2001-03-20), page 37
  3. ↑ 3.00 3.01 3.02 3.03 3.04 3.05 3.06 3.07 3.08 3.09 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 Sega Hikaru (MAME)
  4. ↑ 4.0 4.1 4.2 4.3 Sega Hikaru Memory Controller (Valkyrie)
  5. ↑ Sega Hikaru AICA Sound Boards (Valkyrie)
  6. ↑ File:SH-4 Software Manual.pdf
  7. ↑ 7.0 7.1 Sega Hikaru MIE (Valkyrie)
  8. ↑ Demul 0.56 (1 September 2010)
  9. ↑ 9.0 9.1 Sega Hikaru (Valkyrie)
  10. ↑ 10.0 10.1 File:Hikaru rombd upright.jpg
  11. ↑ File:GAL16V8 datasheet.pdf
  12. ↑ File:CY37 datasheet.pdf
  13. ↑ 13.0 13.1 13.2 13.3 File:PLSI2032 datasheet.pdf
  14. ↑ 14.0 14.1 File:M4A3 datasheet.pdf
  15. ↑ 15.0 15.1 File:MACH111 datasheet.pdf
  16. ↑ 16.0 16.1 16.2 Sega Hikaru GPU (Valkyrie)
  17. ↑ Sega Hikaru GPU CP (Valkyrie)
  18. ↑ Sega Hikaru Renderer (Valkyrie)
  19. ↑ 19.0 19.1 File:ADV7120 datasheet.pdf
  20. ↑ Instanced Rendering
  21. ↑ Sega Hikaru GPU Private (Valkyrie)
  22. ↑ 22.0 22.1 http://www.goodcowfilms.com/farm/games/news-archive/Sega%20Confirms%20Hikaru%20DOES%20Exist....htm (archive.today)
  23. ↑ 23.0 23.1 File:NAOMI 1998 Press Release JP.pdf
  24. ↑ Computer Graphics: Principles and Practice (page 871)
  25. ↑ Computer Graphics: Principles and Practice (page 900)
  26. ↑ Sega NAOMI
  27. ↑ 27.0 27.1 27.2 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (page 78)
  28. ↑ 28.0 28.1 Design of Digital Systems and Devices (pages 95-97)
  29. ↑ 29.0 29.1 File:HM5264 datasheet.pdf
  30. ↑ 30.0 30.1 File:HY57V161610D datasheet.pdf
  31. ↑ 31.0 31.1 File:UPD432232 datasheet.pdf
  32. ↑ 32.0 32.1 32.2 File:HM62256B datasheet.pdf
  33. ↑ 33.0 33.1 File:CY7C199 datasheet.pdf
  34. ↑ Planet Harriers (MAME)
  35. ↑ Hideki Sato Sega Interview (Edge)
  36. ↑ File:SH-4 32-bit CPU Core Architecture.pdf
  37. ↑ File:K4S641632 datasheet.pdf
  38. ↑ File:CY2292 datasheet.pdf
  39. ↑ http://members.iinet.net.au/~lantra9jp1/gurudumps/wip/hikaru1.jpg (Wayback Machine: 2016-02-28 17:27)


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