Difference between revisions of "SuperH"
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* http://www.superh.com/ | * http://www.superh.com/ | ||
* http://www.renesas.com/ | * http://www.renesas.com/ | ||
− | Linux for SuperH | + | Linux for SuperH |
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* http://www.sh-linux.org/ | * http://www.sh-linux.org/ | ||
* http://linuxdc.sourceforge.net/ | * http://linuxdc.sourceforge.net/ |
Revision as of 11:23, 1 June 2008
The SuperH (or SH) is a microprocessor architecture. The SuperH core is RISC based and found in a large number of embedded systems.
The SuperH family was first developed by Hitachi as the successor to the H8 Family and was outsourced to the newly-formed SuperH Inc., owned by Hitachi and ST Microelectronics. SuperH Inc now sells the designs of the CPU cores.
The SH-5 design added a SIMD Instuction Set called SHmedia and also supports the SHcompact instruction set, equivalent to the user-mode parts of the SH-4 instruction set. This is similar to the Thumb Instruction Set of ARM architecture.
The older designs are now supported and sold by Renesas.
The family includes:
- SH-1 - 32-bit with maximum of 20MHz (As used on Sega Saturn to control the CD-drive and to check the Copy Protection on the game's CD)
- SH-2 - 32-bit with up to 28.7MHz (As used in the Sega Saturn)
- SH-3 - 32-bit with up to 200MHz. This spring introduced a Memory_management_unit to the SH Family (As used in many Windows CE devices)
- SH-4 - 32-bit dual-issue core with a 128-bit vector FPU (As used in the Dreamcast and on some Sega Arcade Machines such as the Naomi and Naomi 2)
- SH-5 - 64-bit core with a 128-bit vector FPU (64 32-bit registers) and an integer unit which includes the SIMD support and 63 64-bit registers. (The 64th register is hard-wired to zero.)
Examples include ST Microelectronics's ST40 or Hitachi's SH-4.
Distinctions
- Low price
- Low power consumption
External links
Linux for SuperH
- http://www.sh-linux.org/
- http://linuxdc.sourceforge.net/
- http://www.shlinux.com/ MPC Data SHLinux support
NetBSD on SuperH