Difference between revisions of "Sega 32X/Technical specifications"

From Sega Retro

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* Main CPU: Twin [[Hitachi]] [[SH-2]] (SH7095) 32-bit RISC processors
 
* Main CPU: Twin [[Hitachi]] [[SH-2]] (SH7095) 32-bit RISC processors
** Clock speed: 23.01136 MHz (NTSC), 22.801467 MHz (PAL){{fileref|32XUSHardwareManual.pdf|page=54}}
+
:* Clock speed: 23.01136 MHz (NTSC), 22.801467 MHz (PAL){{fileref|32XUSHardwareManual.pdf|page=54}}
** Clock cycles: 46.022721 MHz (NTSC, 23.01136 MHz per SH-2), 45.602934 MHz (PAL, 22.801467 MHz per SH-2)
+
:* Clock cycles: 46.022721 MHz (NTSC, 23.01136 MHz per SH-2), 45.602934 MHz (PAL, 22.801467 MHz per SH-2)
** 2x CPU cores: 32‑bit [[wikipedia:Reduced instruction set computing|RISC]] instructions/[[wikipedia:Processor register|registers]], up to 4 instructions/cycle (2 instructions/cycle per SH-2),{{fileref|Hitachi SuperH Programming Manual.pdf|page=390}} 1.3 MIPS per MHz,{{fileref|SH-2A.pdf|page=2}} 59.829537 [[wikipedia:Instructions per second|MIPS]] (NTSC, 29.914768 MIPS per SH-2), 59.283814 MIPS (PAL, 29.641907 MIPS per SH-2)
+
:* 2x CPU cores: 32‑bit [[wikipedia:Reduced instruction set computing|RISC]] instructions/[[wikipedia:Processor register|registers]], up to 4 instructions/cycle (2 instructions/cycle per SH-2),{{fileref|Hitachi SuperH Programming Manual.pdf|page=390}} 1.3 MIPS per MHz,{{fileref|SH-2A.pdf|page=2}} 59.829537 [[wikipedia:Instructions per second|MIPS]] (NTSC, 29.914768 MIPS per SH-2), 59.283814 MIPS (PAL, 29.641907 MIPS per SH-2)
** 4x internal [[wikipedia:Fixed-point arithmetic|fixed‑point]] math processors:{{fileref|Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf}} 2x MULT multiplier DSP,{{fileref|SH7604 Hardware Manual.pdf|page=3}}{{fileref|SH7604 Hardware Manual.pdf|page=22}}{{fileref|ST-103-R1-040194.pdf|page=23}} 2x DIVU division units,{{fileref|SH7604 Hardware Manual.pdf|page=3}}{{fileref|SH7604 Hardware Manual.pdf|page=22}} parallel processing{{fileref|SH7604 Hardware Manual.pdf|page=303}}
+
:* 4x internal [[wikipedia:Fixed-point arithmetic|fixed‑point]] math processors:{{fileref|Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf}} 2x MULT multiplier DSP,{{fileref|SH7604 Hardware Manual.pdf|page=3}}{{fileref|SH7604 Hardware Manual.pdf|page=22}}{{fileref|ST-103-R1-040194.pdf|page=23}} 2x DIVU division units,{{fileref|SH7604 Hardware Manual.pdf|page=3}}{{fileref|SH7604 Hardware Manual.pdf|page=22}} parallel processing{{fileref|SH7604 Hardware Manual.pdf|page=303}}
*** 2x MULT multiplier DSP: 46.022721 MOPS (NTSC, 23.01136 MOPS per SH-2), 45.602934 MOPS (PAL, 22.801467 MOPS per SH-2){{ref|1 operation per cycle{{fileref|Hitachi SuperH Programming Manual.pdf|page=31}}|group=fn}}
+
::* 2x MULT multiplier DSP: 46.022721 MOPS (NTSC, 23.01136 MOPS per SH-2), 45.602934 MOPS (PAL, 22.801467 MOPS per SH-2){{ref|1 operation per cycle{{fileref|Hitachi SuperH Programming Manual.pdf|page=31}}|group=fn}}
*** 2x DIVU division units: 16/32/64-bit division,{{fileref|SH7604 Hardware Manual.pdf|page=303}} 1,180,069 divides/sec{{ref|39 cycles per divide{{fileref|Hitachi SuperH Programming Manual.pdf|page=155}}|group=fn}}
+
::* 2x DIVU division units: 16/32/64-bit division,{{fileref|SH7604 Hardware Manual.pdf|page=303}} 1,180,069 divides/sec{{ref|39 cycles per divide{{fileref|Hitachi SuperH Programming Manual.pdf|page=155}}|group=fn}}
** 2x DMA units: 2x DMAC (Direct Memory Access Controller),{{fileref|SH7604 Hardware Manual.pdf|page=3}} parallel processing{{fileref|SH7604 Hardware Manual.pdf|page=219}}
+
:* 2x DMA units: 2x DMAC (Direct Memory Access Controller),{{fileref|SH7604 Hardware Manual.pdf|page=3}} parallel processing{{fileref|SH7604 Hardware Manual.pdf|page=219}}
** [[wikipedia:Bus (computing)|Bus]] width: 64‑bit (2× 32‑bit) internal, 32‑bit external{{fileref|ST-103-R1-040194.pdf}}
+
:* [[wikipedia:Bus (computing)|Bus]] width: 64‑bit (2× 32‑bit) internal, 32‑bit external{{fileref|ST-103-R1-040194.pdf}}
 
* CPU co-processors: Overlay/Underlay processors
 
* CPU co-processors: Overlay/Underlay processors
** [[Mega Drive]] CPU:
+
:* [[Mega Drive]] CPU:
*** [[Motorola]] [[M68000]] — 7.670453 MHz (NTSC), 7.600489 MHz (PAL),{{fileref|32XUSHardwareManual.pdf|page=54}} 16/32-bit instructions, 32-bit internal data bus, 16-bit external data bus, 1.342329 MIPS (NTSC), 1.330085 MIPS (PAL)
+
::* [[Motorola]] [[M68000]] — 7.670453 MHz (NTSC), 7.600489 MHz (PAL),{{fileref|32XUSHardwareManual.pdf|page=54}} 16/32-bit instructions, 32-bit internal data bus, 16-bit external data bus, 1.342329 MIPS (NTSC), 1.330085 MIPS (PAL)
*** [[Zilog Z80]] — 3.579545 MHz (NTSC), 3.546894 MHz (PAL), 8/16-bit instructions, 8-bit data bus, 0.519034 MIPS (NTSC), 0.514299 MIPS (PAL)
+
::* [[Zilog Z80]] — 3.579545 MHz (NTSC), 3.546894 MHz (PAL), 8/16-bit instructions, 8-bit data bus, 0.519034 MIPS (NTSC), 0.514299 MIPS (PAL)
** [[Sega CD]] CPU: Motorola M68000 — 12.5 MHz, 2.1875 MIPS
+
:* [[Sega CD]] CPU: Motorola M68000 — 12.5 MHz, 2.1875 MIPS
 
}}
 
}}
  
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* 32X graphics chip: Sega 32X [[VDP]] ([[Sega]] Custom [[wikipedia:Large scale integration|LSI]]) @ 23.01136 MHz (NTSC), 22.801467 MHz (PAL){{fileref|Genesis32XUSManual.pdf|page=7}}{{fileref|32XUSHardwareManual.pdf|page=54}}
 
* 32X graphics chip: Sega 32X [[VDP]] ([[Sega]] Custom [[wikipedia:Large scale integration|LSI]]) @ 23.01136 MHz (NTSC), 22.801467 MHz (PAL){{fileref|Genesis32XUSManual.pdf|page=7}}{{fileref|32XUSHardwareManual.pdf|page=54}}
** Data bus width: 32-bit (16-bit per framebuffer)
+
:* Data bus width: 32-bit (16-bit per framebuffer)
** Word length: 16-bit
+
:* Word length: 16-bit
 
* Features: 3D polygon graphics, Gouraud shading, texture mapping, more [[sprite]]s, quicker animation{{fileref|Genesis32XUSOverview.pdf}}
 
* Features: 3D polygon graphics, Gouraud shading, texture mapping, more [[sprite]]s, quicker animation{{fileref|Genesis32XUSOverview.pdf}}
 
* Color [[palette]]: 32,768 colors{{fileref|32XUSHardwareManual.pdf}}
 
* Color [[palette]]: 32,768 colors{{fileref|32XUSHardwareManual.pdf}}
 
* Double-buffered framebuffer with three modes:{{fileref|Genesis32XUSOverview.pdf|page=7}}
 
* Double-buffered framebuffer with three modes:{{fileref|Genesis32XUSOverview.pdf|page=7}}
** 8bpp "packed pixel" mode: 256 simultaneous colors on screen; each pixel is an index into CRAM (can use full screen)
+
:* 8bpp "packed pixel" mode: 256 simultaneous colors on screen; each pixel is an index into CRAM (can use full screen)
** 16bpp "run length" mode: 256 simultaneous colors on screen; each pixel is both a number of pixels to display and the index of CRAM (limits screen size)
+
:* 16bpp "run length" mode: 256 simultaneous colors on screen; each pixel is both a number of pixels to display and the index of CRAM (limits screen size)
** 16bpp "direct color" mode: 32,768 simultaneous colors on screen; each pixel is the color value (limits screen size)
+
:* 16bpp "direct color" mode: 32,768 simultaneous colors on screen; each pixel is the color value (limits screen size)
 
* [[VRAM]]: 256 [[Byte|KB]], split into two 128 KB segments for each framebuffer. A priority system allows partial overlaying/underlaying of Mega Drive/Mega-CD graphics.
 
* [[VRAM]]: 256 [[Byte|KB]], split into two 128 KB segments for each framebuffer. A priority system allows partial overlaying/underlaying of Mega Drive/Mega-CD graphics.
** Sprites, polygons and textures accessed from 256 KB main SDRAM and 4–8 MB ROM cartridge.
+
:* Sprites, polygons and textures accessed from 256 KB main SDRAM and 4–8 MB ROM cartridge.
 
* Resolutions: 320×224, 320×240,{{fileref|Genesis32XUSOverview.pdf|page=7}} 320×204 (direct color),{{fileref|32XUSHardwareManual.pdf|page=49}} 320×408 (8bpp){{fileref|32XUSHardwareManual.pdf|page=50}}
 
* Resolutions: 320×224, 320×240,{{fileref|Genesis32XUSOverview.pdf|page=7}} 320×204 (direct color),{{fileref|32XUSHardwareManual.pdf|page=49}} 320×408 (8bpp){{fileref|32XUSHardwareManual.pdf|page=50}}
** Overscan: 450×262 (NTSC), 450×313 (PAL){{fileref|32XUSHardwareManual.pdf|page=55}}
+
:* Overscan: 450×262 (NTSC), 450×313 (PAL){{fileref|32XUSHardwareManual.pdf|page=55}}
 
* Refresh rate: 60 Hz (NTSC), 50 Hz (PAL)
 
* Refresh rate: 60 Hz (NTSC), 50 Hz (PAL)
** Maximum frame rate: 60 FPS (NTSC), 50 FPS (PAL)
+
:* Maximum frame rate: 60 FPS (NTSC), 50 FPS (PAL)
 
* Framebuffer [[Byte|bandwidth]]: 72.727272 [[Byte|MB/s]] (36.363636 MB/s per framebuffer){{fileref|TC511664B datasheet.pdf}}{{fileref|32XUSHardwareManual.pdf|page=76}}
 
* Framebuffer [[Byte|bandwidth]]: 72.727272 [[Byte|MB/s]] (36.363636 MB/s per framebuffer){{fileref|TC511664B datasheet.pdf}}{{fileref|32XUSHardwareManual.pdf|page=76}}
** SH-2: 36.363636 MB/s (read/write, 1 byte/cycle per SH-2){{fileref|Genesis32XUSOverview.pdf|page=9}}
+
:* SH-2: 36.363636 MB/s (read/write, 1 byte/cycle per SH-2){{fileref|Genesis32XUSOverview.pdf|page=9}}
** 32X VDP: 29.488906 MB/s (14.148 MB/s read,{{fileref|32XUSHardwareManual.pdf|page=55}} 15.340906 MB/s write){{fileref|32XUSHardwareManual.pdf|page=53}}{{fileref|Genesis32XUSOverview.pdf|page=51}}
+
:* 32X VDP: 29.488906 MB/s (14.148 MB/s read,{{fileref|32XUSHardwareManual.pdf|page=55}} 15.340906 MB/s write){{fileref|32XUSHardwareManual.pdf|page=53}}{{fileref|Genesis32XUSOverview.pdf|page=51}}
** 68000: 1.917613 MB/s (read/write, 4 cycles/byte){{fileref|Genesis32XUSOverview.pdf|page=53}}
+
:* 68000: 1.917613 MB/s (read/write, 4 cycles/byte){{fileref|Genesis32XUSOverview.pdf|page=53}}
 
* Framebuffer [[fillrate]]: 18.181818 [[Pixel|MPixels/s]] (16bpp), 36.363636 MPixels/s (8bpp){{fileref|32XUSHardwareManual.pdf|page=50}}{{fileref|32XUSHardwareManual.pdf|page=42}}
 
* Framebuffer [[fillrate]]: 18.181818 [[Pixel|MPixels/s]] (16bpp), 36.363636 MPixels/s (8bpp){{fileref|32XUSHardwareManual.pdf|page=50}}{{fileref|32XUSHardwareManual.pdf|page=42}}
** SH-2: 18.181818 MPixels/s <small>(16bpp)</small>,{{fileref|Genesis32XUSOverview.pdf|page=9}}{{fileref|32XUSHardwareManual.pdf|page=76}} 36.363636 MPixels/s <small>(8bpp)</small>
+
:* SH-2: 18.181818 MPixels/s <small>(16bpp)</small>,{{fileref|Genesis32XUSOverview.pdf|page=9}}{{fileref|32XUSHardwareManual.pdf|page=76}} 36.363636 MPixels/s <small>(8bpp)</small>
** 32X VDP: 7.670453 MPixels/s <small>(16bpp)</small>, 15.340906 MPixels/s <small>(8bpp)</small>
+
:* 32X VDP: 7.670453 MPixels/s <small>(16bpp)</small>, 15.340906 MPixels/s <small>(8bpp)</small>
** 68000: 958,806 [[Pixel|pixels/s]] (16bpp), 1.917613 MPixels/s (8bpp)
+
:* 68000: 958,806 [[Pixel|pixels/s]] (16bpp), 1.917613 MPixels/s (8bpp)
 
* 3D polygon geometry calculations:{{ref|46,022,720 DSP operations/sec, 1,180,069 DIVU divides/sec|group=fn}}
 
* 3D polygon geometry calculations:{{ref|46,022,720 DSP operations/sec, 1,180,069 DIVU divides/sec|group=fn}}
** Polygon transformations: 260,000 polygons/sec{{ref|96 adds/multiplies and 9 divides per polygon:{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}
+
:* Polygon transformations: 260,000 polygons/sec{{ref|96 adds/multiplies and 9 divides per polygon:{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}
 
*131,118 polygons/sec: 12,587,328 DSP operations, 1,180,069 DIVU divides
 
*131,118 polygons/sec: 12,587,328 DSP operations, 1,180,069 DIVU divides
 
*134,397 polygons/sec: 32,255,280 SH-2 cycles (96 adds/multiplies, 144 divide cycles){{fileref|Hitachi SuperH Programming Manual.pdf|page=155}}
 
*134,397 polygons/sec: 32,255,280 SH-2 cycles (96 adds/multiplies, 144 divide cycles){{fileref|Hitachi SuperH Programming Manual.pdf|page=155}}
 
|group=fn}}
 
|group=fn}}
** [[wikipedia:Transform and lighting|Lighting calculations]]: 230,000 polygons/sec (flat),{{ref|128 adds/multiplies and 9 divides per polygon:{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}
+
:* [[wikipedia:Transform and lighting|Lighting calculations]]: 230,000 polygons/sec (flat),{{ref|128 adds/multiplies and 9 divides per polygon:{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}
 
*131,118 polygons/sec: 16,783,104 DSP operations, 1,180,069 DIVU divides
 
*131,118 polygons/sec: 16,783,104 DSP operations, 1,180,069 DIVU divides
 
*103,160 polygons/sec: 28,059,520 SH-2 cycles (128 adds/multiplies, 144 divide cycles)
 
*103,160 polygons/sec: 28,059,520 SH-2 cycles (128 adds/multiplies, 144 divide cycles)
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|group=fn}}
 
|group=fn}}
 
* 3D polygon rendering:
 
* 3D polygon rendering:
** [[wikipedia:Flat shading|Flat shading]]: 160,000 polygons/sec{{ref|46,022,720 SH-2 cycles/ops per sec <small>(23.01136 MHz per SH-2)</small>, 1,180,069 DIVU divides/sec, 23.01136 MHz 32X VDP
+
:* [[wikipedia:Flat shading|Flat shading]]: 160,000 polygons/sec{{ref|46,022,720 SH-2 cycles/ops per sec <small>(23.01136 MHz per SH-2)</small>, 1,180,069 DIVU divides/sec, 23.01136 MHz 32X VDP
 
* SH-2: 215 cycles <small>(128 geometry adds/multiplies, 30 SDRAM cycles for 40 bytes,{{fileref|32XUSHardwareManual.pdf|page=77}} 30 raster ops,{{ref|1=[https://books.google.co.uk/books?id=yiVRHrxFj2wC&pg=PA33 ''Algorithms for Parallel Polygon Rendering'' (pages 33-36)]}}{{ref|1=[http://sirkan.iit.bme.hu/~szirmay/abbas.pdf#page=53 Transformation Of Rendering Algorithms For Hardware Implementation (page 53)]}} 27 cycles 32X VDP command)</small>{{fileref|32XUSHardwareManual.pdf|page=53}} and 9 divides per polygon, 1 add per pixel,{{ref|1=[https://books.google.co.uk/books?id=yiVRHrxFj2wC&pg=PA35 ''Algorithms for Parallel Polygon Rendering'' (page 35)]}} 247 cycles and 9 divides per 32-pixel polygon:
 
* SH-2: 215 cycles <small>(128 geometry adds/multiplies, 30 SDRAM cycles for 40 bytes,{{fileref|32XUSHardwareManual.pdf|page=77}} 30 raster ops,{{ref|1=[https://books.google.co.uk/books?id=yiVRHrxFj2wC&pg=PA33 ''Algorithms for Parallel Polygon Rendering'' (pages 33-36)]}}{{ref|1=[http://sirkan.iit.bme.hu/~szirmay/abbas.pdf#page=53 Transformation Of Rendering Algorithms For Hardware Implementation (page 53)]}} 27 cycles 32X VDP command)</small>{{fileref|32XUSHardwareManual.pdf|page=53}} and 9 divides per polygon, 1 add per pixel,{{ref|1=[https://books.google.co.uk/books?id=yiVRHrxFj2wC&pg=PA35 ''Algorithms for Parallel Polygon Rendering'' (page 35)]}} 247 cycles and 9 divides per 32-pixel polygon:
** 131,118 polygons/sec: 32,386,146 SH-2 cycles, 1,180,069 DIVU divides
+
:* 131,118 polygons/sec: 32,386,146 SH-2 cycles, 1,180,069 DIVU divides
** 31,858 polygons/sec: 12,456,478 SH-2 cycles (247 cycles, 144 divide cycles)
+
:* 31,858 polygons/sec: 12,456,478 SH-2 cycles (247 cycles, 144 divide cycles)
 
* 32X VDP: 7 cycles/poly, 3 cycles/pixel <small>(16bpp)</small>,{{fileref|32XUSHardwareManual.pdf|page=53}}{{fileref|Genesis32XUSOverview.pdf|page=51}} 1.5 cycles/pixel <small>(8bpp)</small>,{{fileref|32XUSHardwareManual.pdf|page=50}} 103 cycles per 32-pixel 16bpp polygon, 55 cycles per 32-pixel 8bpp polygon
 
* 32X VDP: 7 cycles/poly, 3 cycles/pixel <small>(16bpp)</small>,{{fileref|32XUSHardwareManual.pdf|page=53}}{{fileref|Genesis32XUSOverview.pdf|page=51}} 1.5 cycles/pixel <small>(8bpp)</small>,{{fileref|32XUSHardwareManual.pdf|page=50}} 103 cycles per 32-pixel 16bpp polygon, 55 cycles per 32-pixel 8bpp polygon
 
|group=fn}}
 
|group=fn}}
** [[wikipedia:Gouraud shading|Gouraud shading]]: 100,000 polygons/sec{{ref|252 cycles <small>(192 geometry adds/multiplies,{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}} 30 SDRAM cycles, 30 raster ops)</small> and 9 divides per polygon, 3 operations/scanline per polygon,{{ref|1=[http://sirkan.iit.bme.hu/~szirmay/abbas.pdf#page=53 Transformation Of Rendering Algorithms For Hardware Implementation (page 53)]}}{{fileref|32XUSHardwareManual.pdf|page=76}} 264 cycles and 9 divides per 4-scanline polygon
+
:* [[wikipedia:Gouraud shading|Gouraud shading]]: 100,000 polygons/sec{{ref|252 cycles <small>(192 geometry adds/multiplies,{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}} 30 SDRAM cycles, 30 raster ops)</small> and 9 divides per polygon, 3 operations/scanline per polygon,{{ref|1=[http://sirkan.iit.bme.hu/~szirmay/abbas.pdf#page=53 Transformation Of Rendering Algorithms For Hardware Implementation (page 53)]}}{{fileref|32XUSHardwareManual.pdf|page=76}} 264 cycles and 9 divides per 4-scanline polygon
 
* 16bpp: 3 cycles per pixel, 369 SH-2 cycles and 9 DIVU divides per 32-pixel polygon
 
* 16bpp: 3 cycles per pixel, 369 SH-2 cycles and 9 DIVU divides per 32-pixel polygon
 
|group=fn}}
 
|group=fn}}
** Texture mapping: 50,000 polygons/sec{{ref|1=[https://books.google.co.uk/books?id=DbFxAgAAQBAJ&pg=PA154 ''Service Games: The Rise and Fall of SEGA'', page 154]}}{{ref|1=Texture mapping:
+
:* Texture mapping: 50,000 polygons/sec{{ref|1=[https://books.google.co.uk/books?id=DbFxAgAAQBAJ&pg=PA154 ''Service Games: The Rise and Fall of SEGA'', page 154]}}{{ref|1=Texture mapping:
 
*Flat shading: 188 SH-2 cycles <small>(128 geometry adds/multiplies, 30 SDRAM cycles for 40 bytes,{{fileref|32XUSHardwareManual.pdf|page=77}} 30 raster ops)</small>{{ref|1=[https://books.google.co.uk/books?id=yiVRHrxFj2wC&pg=PA33 ''Algorithms for Parallel Polygon Rendering'' (pages 33-36)]}}{{ref|1=[http://sirkan.iit.bme.hu/~szirmay/abbas.pdf#page=53 Transformation Of Rendering Algorithms For Hardware Implementation (page 53)]}} and 9 divides per polygon, 1 add per pixel,{{ref|1=[https://books.google.co.uk/books?id=yiVRHrxFj2wC&pg=PA35 ''Algorithms for Parallel Polygon Rendering'' (page 35)]}} 220 SH-2 cycles and 9 divides per 32-pixel polygon
 
*Flat shading: 188 SH-2 cycles <small>(128 geometry adds/multiplies, 30 SDRAM cycles for 40 bytes,{{fileref|32XUSHardwareManual.pdf|page=77}} 30 raster ops)</small>{{ref|1=[https://books.google.co.uk/books?id=yiVRHrxFj2wC&pg=PA33 ''Algorithms for Parallel Polygon Rendering'' (pages 33-36)]}}{{ref|1=[http://sirkan.iit.bme.hu/~szirmay/abbas.pdf#page=53 Transformation Of Rendering Algorithms For Hardware Implementation (page 53)]}} and 9 divides per polygon, 1 add per pixel,{{ref|1=[https://books.google.co.uk/books?id=yiVRHrxFj2wC&pg=PA35 ''Algorithms for Parallel Polygon Rendering'' (page 35)]}} 220 SH-2 cycles and 9 divides per 32-pixel polygon
 
*Texture mapping: 132 SH-2 cycles and 41 divides per 32-texel polygon
 
*Texture mapping: 132 SH-2 cycles and 41 divides per 32-texel polygon
**132 SH-2 cycles per 32-texel texture: 2 block moves, 2 cycles per texel (2 bytes per texel), 2 cycles access
+
:*132 SH-2 cycles per 32-texel texture: 2 block moves, 2 cycles per texel (2 bytes per texel), 2 cycles access
**41 divides per 32-texel polygon, 9 divides per polygon, 32 divides per 32-texel polygon (1 divide per texel){{ref|1=[https://books.google.co.uk/books?id=teMHqC2BnuYC&pg=PA110 ''State of the Art in Computer Graphics: Visualization and Modeling'' (page 110)]}}
+
:*41 divides per 32-texel polygon, 9 divides per polygon, 32 divides per 32-texel polygon (1 divide per texel){{ref|1=[https://books.google.co.uk/books?id=teMHqC2BnuYC&pg=PA110 ''State of the Art in Computer Graphics: Visualization and Modeling'' (page 110)]}}
 
*Texture mapping: 352 SH-2 cycles and 50 divides per 32-texel polygon
 
*Texture mapping: 352 SH-2 cycles and 50 divides per 32-texel polygon
**23,601 polygons/sec: 9,487,602 SH-2 cycles, 1,180,069 DIVU divides
+
:*23,601 polygons/sec: 9,487,602 SH-2 cycles, 1,180,069 DIVU divides
**31,714 polygons/sec: 36,535,118 SH-2 cycles (1152 cycles per polygon)
+
:*31,714 polygons/sec: 36,535,118 SH-2 cycles (1152 cycles per polygon)
 
|group=fn}}
 
|group=fn}}
** Texture Gouraud shading: 40,000 polygons/sec{{ref|1=Texture Gouraud shading:
+
:* Texture Gouraud shading: 40,000 polygons/sec{{ref|1=Texture Gouraud shading:
 
*Gouraud shading: 369 SH-2 cycles and 9 divides per 32-pixel polygon
 
*Gouraud shading: 369 SH-2 cycles and 9 divides per 32-pixel polygon
 
*Texture mapping: 132 SH-2 cycles and 41 divides per 32-texel polygon
 
*Texture mapping: 132 SH-2 cycles and 41 divides per 32-texel polygon
 
*Texture Gouraud shading: 501 SH-2 cycles and 50 divides per 32-texel polygon
 
*Texture Gouraud shading: 501 SH-2 cycles and 50 divides per 32-texel polygon
**23,601 polygons/sec: 11,824,101 SH-2 cycles, 1,180,069 DIVU divides
+
:*23,601 polygons/sec: 11,824,101 SH-2 cycles, 1,180,069 DIVU divides
**25,379 polygons/sec: 33,018,079 SH-2 cycles (1301 cycles per polygon)
+
:*25,379 polygons/sec: 33,018,079 SH-2 cycles (1301 cycles per polygon)
 
|group=fn}}
 
|group=fn}}
 
* 2D [[sprite]]/[[wikipedia:Tile-based video game|tile]] capabilities: Scrolling,{{fileref|32XUSHardwareManual.pdf|page=51}} scaling, rotation, [[wikipedia:Alpha blending|alpha blending]]{{ref|[https://github.com/ehaliewicz/sprite-engine Sprite engine for the Sega 32X]}}{{fileref|32XUSHardwareManual.pdf|page=76}}
 
* 2D [[sprite]]/[[wikipedia:Tile-based video game|tile]] capabilities: Scrolling,{{fileref|32XUSHardwareManual.pdf|page=51}} scaling, rotation, [[wikipedia:Alpha blending|alpha blending]]{{ref|[https://github.com/ehaliewicz/sprite-engine Sprite engine for the Sega 32X]}}{{fileref|32XUSHardwareManual.pdf|page=76}}
** Colors per sprite/tile: 128 (8bpp), 256 (8bpp), 8192 (16bpp), 32,768 (16bpp)
+
:* Colors per sprite/tile: 128 (8bpp), 256 (8bpp), 8192 (16bpp), 32,768 (16bpp)
** Tile size: 8×8 [[texel]]s, 64 bytes (8bpp), 128 bytes (16bpp)
+
:* Tile size: 8×8 [[texel]]s, 64 bytes (8bpp), 128 bytes (16bpp)
** Sprite sizes: 8×8 to 320×240 texels, 64 [[byte]]s to 150 KB
+
:* Sprite sizes: 8×8 to 320×240 texels, 64 [[byte]]s to 150 KB
** Maximum sprites/tiles per frame: 3800 sprites/tiles <small>(8bpp, 8×8, 237.5 KB)</small>, 1900 sprites/tiles <small>(16bpp, 8×8, 237.5 KB)</small>
+
:* Maximum sprites/tiles per frame: 3800 sprites/tiles <small>(8bpp, 8×8, 237.5 KB)</small>, 1900 sprites/tiles <small>(16bpp, 8×8, 237.5 KB)</small>
** Maximum sprites/tiles per scanline: 1463 texels, 182 sprites/tiles (8×8)
+
:* Maximum sprites/tiles per scanline: 1463 texels, 182 sprites/tiles (8×8)
 
}}
 
}}
  
Line 98: Line 98:
 
{{multicol|
 
{{multicol|
 
* Overlay/Underlay graphics processors:
 
* Overlay/Underlay graphics processors:
** Mega Drive [[VDP]] — 13.423294 MHz (NTSC), 13.300856 MHz (PAL), 8/16-bit data bus
+
:* Mega Drive [[VDP]] — 13.423294 MHz (NTSC), 13.300856 MHz (PAL), 8/16-bit data bus
** Sega CD [[Sega Mega-CD#Technical specifications|ASIC]] — 12.5 MHz, 32-bit (2x 16-bit) data bus
+
:* Sega CD [[Sega Mega-CD#Technical specifications|ASIC]] — 12.5 MHz, 32-bit (2x 16-bit) data bus
 
* Overlay/Underlay [[Mega Drive]] [[VDP]] planes: 512–1536 color palette, 61–512 colors on screen
 
* Overlay/Underlay [[Mega Drive]] [[VDP]] planes: 512–1536 color palette, 61–512 colors on screen
** Sprite plane: 80 sprites/frame, 8×8 to 32×32 pixels/sprite, 16 colors/sprite, maximum 1280 sprite tiles/frame
+
:* Sprite plane: 80 sprites/frame, 8×8 to 32×32 pixels/sprite, 16 colors/sprite, maximum 1280 sprite tiles/frame
** Background planes: 2 tiled scrolling background layers, 8×8 pixels/tile, 16&nbsp;colors/tile, 320×224 tilemaps, maximum 1808 tiles/frame
+
:* Background planes: 2 tiled scrolling background layers, 8×8 pixels/tile, 16&nbsp;colors/tile, 320×224 tilemaps, maximum 1808 tiles/frame
** Fillrate: 6.934358 MPixels/s (read), 6.41376 MPixels/s (write), 6.934358–36.325644 MPixels/s (effective tile fillrate)
+
:* Fillrate: 6.934358 MPixels/s (read), 6.41376 MPixels/s (write), 6.934358–36.325644 MPixels/s (effective tile fillrate)
 
* Overlay/Underlay [[Sega CD]] ASIC planes: Enhanced Mega Drive VDP planes, enhanced FMV plane
 
* Overlay/Underlay [[Sega CD]] ASIC planes: Enhanced Mega Drive VDP planes, enhanced FMV plane
** Sprite/Tile planes: 128–1536 colors on screen, sprite/tile scaling and rotation
+
:* Sprite/Tile planes: 128–1536 colors on screen, sprite/tile scaling and rotation
** FMV plane: Full motion video, 32,768 colors on screen
+
:* FMV plane: Full motion video, 32,768 colors on screen
** Fillrate: 6.934358 MPixels/s (read/write), 6.934358–36.325644 MPixels/s (effective tile fillrate)
+
:* Fillrate: 6.934358 MPixels/s (read/write), 6.934358–36.325644 MPixels/s (effective tile fillrate)
 
}}
 
}}
  
 
==Audio==
 
==Audio==
 
* Sound chip: [[QSound]] PWM @ 23.01136&nbsp;MHz (NTSC), 22.801467&nbsp;MHz (PAL){{fileref|Genesis32XUSManual.pdf}}
 
* Sound chip: [[QSound]] PWM @ 23.01136&nbsp;MHz (NTSC), 22.801467&nbsp;MHz (PAL){{fileref|Genesis32XUSManual.pdf}}
** Stereo [[wikipedia:Pulse-width modulation|PWM]] (Pulse Wave Modulation) mixing with Mega Drive sound; additional 2 channels (12 channels in total)
+
:* Stereo [[wikipedia:Pulse-width modulation|PWM]] (Pulse Wave Modulation) mixing with Mega Drive sound; additional 2 channels (12 channels in total)
** 11-bit PWM, stereo [[PCM]] output,{{fileref|32XUSHardwareManual.pdf}} [[wikipedia:Surround sound|surround sound]]
+
:* 11-bit PWM, stereo [[PCM]] output,{{fileref|32XUSHardwareManual.pdf}} [[wikipedia:Surround sound|surround sound]]
  
 
==Memory==
 
==Memory==
 
{{multicol|
 
{{multicol|
 
* System [[RAM]]: 648.5–1368.5 [[Byte|KB]] total, 512&nbsp;KB (4&nbsp;[[Bit|MBit]]) additional RAM to Mega Drive or Sega CD memory{{fileref|Genesis32XUSOverview.pdf}}
 
* System [[RAM]]: 648.5–1368.5 [[Byte|KB]] total, 512&nbsp;KB (4&nbsp;[[Bit|MBit]]) additional RAM to Mega Drive or Sega CD memory{{fileref|Genesis32XUSOverview.pdf}}
** Main RAM: 256 KB [[wikipedia:SDRAM|SDRAM]]
+
:* Main RAM: 256 KB [[wikipedia:SDRAM|SDRAM]]
** [[VRAM]]: 256 KB [[wikipedia:FPM DRAM|FPM DRAM]] (dual 128 KB framebuffers){{fileref|Genesis32XUSManual.pdf}}
+
:* [[VRAM]]: 256 KB [[wikipedia:FPM DRAM|FPM DRAM]] (dual 128 KB framebuffers){{fileref|Genesis32XUSManual.pdf}}
** Mega Drive RAM: 136&nbsp;KB (64&nbsp;KB main, 64&nbsp;KB video, 8&nbsp;KB sound)
+
:* Mega Drive RAM: 136&nbsp;KB (64&nbsp;KB main, 64&nbsp;KB video, 8&nbsp;KB sound)
** Sega CD RAM: 856&nbsp;KB (512&nbsp;KB main, 256&nbsp;KB video, 64&nbsp;KB audio)
+
:* Sega CD RAM: 856&nbsp;KB (512&nbsp;KB main, 256&nbsp;KB video, 64&nbsp;KB audio)
 
* RAM Clear Hardware: 512 [[byte]]s (used for flat-shaded polygons){{fileref|Genesis32XUSOverview.pdf|page=9}}
 
* RAM Clear Hardware: 512 [[byte]]s (used for flat-shaded polygons){{fileref|Genesis32XUSOverview.pdf|page=9}}
 
* Internal processor cache: 5 KB
 
* Internal processor cache: 5 KB
** SH-2: 4 KB (2 KB per CPU){{fileref|Genesis32XUSOverview.pdf}}
+
:* SH-2: 4 KB (2 KB per CPU){{fileref|Genesis32XUSOverview.pdf}}
** 32X VDP: 1 KB,{{fileref|32XUSHardwareManual.pdf|page=41}} including 512 [[byte]]s (256 words) color palette RAM (CRAM){{fileref|32XUSHardwareManual|page=13}}
+
:* 32X VDP: 1 KB,{{fileref|32XUSHardwareManual.pdf|page=41}} including 512 [[byte]]s (256 words) color palette RAM (CRAM){{fileref|32XUSHardwareManual|page=13}}
 
* [[Cartridge]] [[ROM]]: 4–8 MB{{ref|[http://devster.monkeeh.com/sega/32xguide1.txt Dr. DevSter's Guide to The Sega 32X]}}
 
* [[Cartridge]] [[ROM]]: 4–8 MB{{ref|[http://devster.monkeeh.com/sega/32xguide1.txt Dr. DevSter's Guide to The Sega 32X]}}
 
}}
 
}}
Line 132: Line 132:
 
{{multicol|
 
{{multicol|
 
* System RAM bandwidth: 118.749992 [[Byte|MB/s]] (NTSC), 118.330206 MB/s (PAL), 3 data buses, 48-bit data bus width{{fileref|Genesis32XUSManual.pdf|page=7}}{{fileref|32XUSHardwareManual.pdf|page=76}}
 
* System RAM bandwidth: 118.749992 [[Byte|MB/s]] (NTSC), 118.330206 MB/s (PAL), 3 data buses, 48-bit data bus width{{fileref|Genesis32XUSManual.pdf|page=7}}{{fileref|32XUSHardwareManual.pdf|page=76}}
** SDRAM: 46.02272 MB/s (NTSC, 16-bit, 23.01136&nbsp;MHz, 43ns), 45.602934 MB/s (PAL, 16-bit, 22.801467 MHz, 43ns){{fileref|Genesis32XUSManual.pdf|page=17}}{{fileref|UPD4504161 datasheet.pdf}}
+
:* SDRAM: 46.02272 MB/s (NTSC, 16-bit, 23.01136&nbsp;MHz, 43ns), 45.602934 MB/s (PAL, 16-bit, 22.801467 MHz, 43ns){{fileref|Genesis32XUSManual.pdf|page=17}}{{fileref|UPD4504161 datasheet.pdf}}
** VRAM: 72.727272&nbsp;MB/s (32-bit, 18.181818&nbsp;MHz, 55&nbsp;[[wikipedia:Nanosecond|ns]], 16-bit per framebuffer, 36.363636 MB/s per framebuffer, 55ns cycles, 80ns access){{fileref|Genesis32XUSManual.pdf|page=22}}{{fileref|TC511664B datasheet.pdf}}
+
:* VRAM: 72.727272&nbsp;MB/s (32-bit, 18.181818&nbsp;MHz, 55&nbsp;[[wikipedia:Nanosecond|ns]], 16-bit per framebuffer, 36.363636 MB/s per framebuffer, 55ns cycles, 80ns access){{fileref|Genesis32XUSManual.pdf|page=22}}{{fileref|TC511664B datasheet.pdf}}
 
* [[Cartridge]] bandwidth:{{ref|[http://devster.monkeeh.com/sega/32xguide1.txt Dr. DevSter's Guide to The Sega 32X]}}{{fileref|32XUSHardwareManual.pdf|page=76}}
 
* [[Cartridge]] bandwidth:{{ref|[http://devster.monkeeh.com/sega/32xguide1.txt Dr. DevSter's Guide to The Sega 32X]}}{{fileref|32XUSHardwareManual.pdf|page=76}}
** Game ROM: 13.333333&nbsp;MB/s (16-bit, 6.666666&nbsp;MHz, 150&nbsp;ns) to 28.571428&nbsp;MB/s (16-bit, 14.285714&nbsp;MHz, 70&nbsp;ns)
+
:* Game ROM: 13.333333&nbsp;MB/s (16-bit, 6.666666&nbsp;MHz, 150&nbsp;ns) to 28.571428&nbsp;MB/s (16-bit, 14.285714&nbsp;MHz, 70&nbsp;ns)
** Non-volatile [[SRAM]]: 6.666666&nbsp;MB/s (6.666666&nbsp;MHz, 150&nbsp;ns) to 14.285714&nbsp;MB/s (14.285714&nbsp;MHz, 70&nbsp;ns)
+
:* Non-volatile [[SRAM]]: 6.666666&nbsp;MB/s (6.666666&nbsp;MHz, 150&nbsp;ns) to 14.285714&nbsp;MB/s (14.285714&nbsp;MHz, 70&nbsp;ns)
 
* Internal processor cache bandwidth:
 
* Internal processor cache bandwidth:
** SH-2: 184.09088&nbsp;MB/s (92.04544&nbsp;MB/s per SH-2, 32-bit per SH-2)
+
:* SH-2: 184.09088&nbsp;MB/s (92.04544&nbsp;MB/s per SH-2, 32-bit per SH-2)
** 32X VDP: 92.04544&nbsp;MB/s (32-bit, 23.01136&nbsp;MHz), including 46.02272&nbsp;MB/s (16-bit, 23.01136&nbsp;MHz) color palette RAM{{fileref|Genesis32XUSManual|page=7}}
+
:* 32X VDP: 92.04544&nbsp;MB/s (32-bit, 23.01136&nbsp;MHz), including 46.02272&nbsp;MB/s (16-bit, 23.01136&nbsp;MHz) color palette RAM{{fileref|Genesis32XUSManual|page=7}}
 
}}
 
}}
  
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[[Category:Sega 32X|Technical specifications]]
 
[[Category:Sega 32X|Technical specifications]]
 +
[[Category:32X hardware|Technical specifications]]
 +
[[Category:Technical specifications|32X]]

Revision as of 23:03, 16 October 2018

Back to: Sega 32X.

Technical specifications for the Sega 32X.

  • System master clock rate: 53.693175 MHz (NTSC), 53.203424 MHz (PAL)[1]

CPU

  • Main CPU: Twin Hitachi SH-2 (SH7095) 32-bit RISC processors
  • Clock speed: 23.01136 MHz (NTSC), 22.801467 MHz (PAL)[1]
  • Clock cycles: 46.022721 MHz (NTSC, 23.01136 MHz per SH-2), 45.602934 MHz (PAL, 22.801467 MHz per SH-2)
  • 2x CPU cores: 32‑bit RISC instructions/registers, up to 4 instructions/cycle (2 instructions/cycle per SH-2),[2] 1.3 MIPS per MHz,[3] 59.829537 MIPS (NTSC, 29.914768 MIPS per SH-2), 59.283814 MIPS (PAL, 29.641907 MIPS per SH-2)
  • 4x internal fixed‑point math processors:[4] 2x MULT multiplier DSP,[5][6][7] 2x DIVU division units,[5][6] parallel processing[8]
  • 2x MULT multiplier DSP: 46.022721 MOPS (NTSC, 23.01136 MOPS per SH-2), 45.602934 MOPS (PAL, 22.801467 MOPS per SH-2)[fn 1]
  • 2x DIVU division units: 16/32/64-bit division,[8] 1,180,069 divides/sec[fn 2]
  • 2x DMA units: 2x DMAC (Direct Memory Access Controller),[5] parallel processing[11]
  • Bus width: 64‑bit (2× 32‑bit) internal, 32‑bit external[12]
  • CPU co-processors: Overlay/Underlay processors
  • Motorola M68000 — 7.670453 MHz (NTSC), 7.600489 MHz (PAL),[1] 16/32-bit instructions, 32-bit internal data bus, 16-bit external data bus, 1.342329 MIPS (NTSC), 1.330085 MIPS (PAL)
  • Zilog Z80 — 3.579545 MHz (NTSC), 3.546894 MHz (PAL), 8/16-bit instructions, 8-bit data bus, 0.519034 MIPS (NTSC), 0.514299 MIPS (PAL)
  • Sega CD CPU: Motorola M68000 — 12.5 MHz, 2.1875 MIPS

Graphics

  • 32X graphics chip: Sega 32X VDP (Sega Custom LSI) @ 23.01136 MHz (NTSC), 22.801467 MHz (PAL)[13][1]
  • Data bus width: 32-bit (16-bit per framebuffer)
  • Word length: 16-bit
  • Features: 3D polygon graphics, Gouraud shading, texture mapping, more sprites, quicker animation[14]
  • Color palette: 32,768 colors[15]
  • Double-buffered framebuffer with three modes:[16]
  • 8bpp "packed pixel" mode: 256 simultaneous colors on screen; each pixel is an index into CRAM (can use full screen)
  • 16bpp "run length" mode: 256 simultaneous colors on screen; each pixel is both a number of pixels to display and the index of CRAM (limits screen size)
  • 16bpp "direct color" mode: 32,768 simultaneous colors on screen; each pixel is the color value (limits screen size)
  • VRAM: 256 KB, split into two 128 KB segments for each framebuffer. A priority system allows partial overlaying/underlaying of Mega Drive/Mega-CD graphics.
  • Sprites, polygons and textures accessed from 256 KB main SDRAM and 4–8 MB ROM cartridge.
  • Resolutions: 320×224, 320×240,[16] 320×204 (direct color),[17] 320×408 (8bpp)[18]
  • Overscan: 450×262 (NTSC), 450×313 (PAL)[19]
  • Refresh rate: 60 Hz (NTSC), 50 Hz (PAL)
  • Maximum frame rate: 60 FPS (NTSC), 50 FPS (PAL)
  • SH-2: 36.363636 MB/s (read/write, 1 byte/cycle per SH-2)[22]
  • 32X VDP: 29.488906 MB/s (14.148 MB/s read,[19] 15.340906 MB/s write)[23][24]
  • 68000: 1.917613 MB/s (read/write, 4 cycles/byte)[25]
  • SH-2: 18.181818 MPixels/s (16bpp),[22][21] 36.363636 MPixels/s (8bpp)
  • 32X VDP: 7.670453 MPixels/s (16bpp), 15.340906 MPixels/s (8bpp)
  • 68000: 958,806 pixels/s (16bpp), 1.917613 MPixels/s (8bpp)
  • 3D polygon geometry calculations:[fn 3]
  • 3D polygon rendering:
  • Colors per sprite/tile: 128 (8bpp), 256 (8bpp), 8192 (16bpp), 32,768 (16bpp)
  • Tile size: 8×8 texels, 64 bytes (8bpp), 128 bytes (16bpp)
  • Sprite sizes: 8×8 to 320×240 texels, 64 bytes to 150 KB
  • Maximum sprites/tiles per frame: 3800 sprites/tiles (8bpp, 8×8, 237.5 KB), 1900 sprites/tiles (16bpp, 8×8, 237.5 KB)
  • Maximum sprites/tiles per scanline: 1463 texels, 182 sprites/tiles (8×8)

Overlay/Underlay

  • Overlay/Underlay graphics processors:
  • Mega Drive VDP — 13.423294 MHz (NTSC), 13.300856 MHz (PAL), 8/16-bit data bus
  • Sega CD ASIC — 12.5 MHz, 32-bit (2x 16-bit) data bus
  • Overlay/Underlay Mega Drive VDP planes: 512–1536 color palette, 61–512 colors on screen
  • Sprite plane: 80 sprites/frame, 8×8 to 32×32 pixels/sprite, 16 colors/sprite, maximum 1280 sprite tiles/frame
  • Background planes: 2 tiled scrolling background layers, 8×8 pixels/tile, 16 colors/tile, 320×224 tilemaps, maximum 1808 tiles/frame
  • Fillrate: 6.934358 MPixels/s (read), 6.41376 MPixels/s (write), 6.934358–36.325644 MPixels/s (effective tile fillrate)
  • Overlay/Underlay Sega CD ASIC planes: Enhanced Mega Drive VDP planes, enhanced FMV plane
  • Sprite/Tile planes: 128–1536 colors on screen, sprite/tile scaling and rotation
  • FMV plane: Full motion video, 32,768 colors on screen
  • Fillrate: 6.934358 MPixels/s (read/write), 6.934358–36.325644 MPixels/s (effective tile fillrate)

Audio

  • Sound chip: QSound PWM @ 23.01136 MHz (NTSC), 22.801467 MHz (PAL)[36]
  • Stereo PWM (Pulse Wave Modulation) mixing with Mega Drive sound; additional 2 channels (12 channels in total)
  • 11-bit PWM, stereo PCM output,[15] surround sound

Memory

  • System RAM: 648.5–1368.5 KB total, 512 KB (4 MBit) additional RAM to Mega Drive or Sega CD memory[14]
  • Main RAM: 256 KB SDRAM
  • VRAM: 256 KB FPM DRAM (dual 128 KB framebuffers)[36]
  • Mega Drive RAM: 136 KB (64 KB main, 64 KB video, 8 KB sound)
  • Sega CD RAM: 856 KB (512 KB main, 256 KB video, 64 KB audio)
  • RAM Clear Hardware: 512 bytes (used for flat-shaded polygons)[22]
  • Internal processor cache: 5 KB
  • SH-2: 4 KB (2 KB per CPU)[14]
  • 32X VDP: 1 KB,[37] including 512 bytes (256 words) color palette RAM (CRAM)[38]

Bandwidth

  • System RAM bandwidth: 118.749992 MB/s (NTSC), 118.330206 MB/s (PAL), 3 data buses, 48-bit data bus width[13][21]
  • SDRAM: 46.02272 MB/s (NTSC, 16-bit, 23.01136 MHz, 43ns), 45.602934 MB/s (PAL, 16-bit, 22.801467 MHz, 43ns)[40][41]
  • VRAM: 72.727272 MB/s (32-bit, 18.181818 MHz, 55 ns, 16-bit per framebuffer, 36.363636 MB/s per framebuffer, 55ns cycles, 80ns access)[42][20]
  • Game ROM: 13.333333 MB/s (16-bit, 6.666666 MHz, 150 ns) to 28.571428 MB/s (16-bit, 14.285714 MHz, 70 ns)
  • Non-volatile SRAM: 6.666666 MB/s (6.666666 MHz, 150 ns) to 14.285714 MB/s (14.285714 MHz, 70 ns)
  • Internal processor cache bandwidth:
  • SH-2: 184.09088 MB/s (92.04544 MB/s per SH-2, 32-bit per SH-2)
  • 32X VDP: 92.04544 MB/s (32-bit, 23.01136 MHz), including 46.02272 MB/s (16-bit, 23.01136 MHz) color palette RAM[43]

Storage

  • Cartridge: Compatible with all Mega Drive models, JVC Wondermega can store save game/score information.
  • CD-ROM: If you have a Sega Mega-CD; speed same as Sega Mega-CD compatible with audio CD, CD&G, SegaCD and JVC WonderMega

Input/Output

  • I/O: Same as Mega Drive; 32X upgradable; can upgrade the 32X

Notes

  1. [1 operation per cycle[9] 1 operation per cycle[9]]
  2. [39 cycles per divide[10] 39 cycles per divide[10]]
  3. [46,022,720 DSP operations/sec, 1,180,069 DIVU divides/sec 46,022,720 DSP operations/sec, 1,180,069 DIVU divides/sec]
  4. [96 adds/multiplies and 9 divides per polygon:[27]
    • 131,118 polygons/sec: 12,587,328 DSP operations, 1,180,069 DIVU divides
    • 134,397 polygons/sec: 32,255,280 SH-2 cycles (96 adds/multiplies, 144 divide cycles)[10]
    96 adds/multiplies and 9 divides per polygon:[27]
    • 131,118 polygons/sec: 12,587,328 DSP operations, 1,180,069 DIVU divides
    • 134,397 polygons/sec: 32,255,280 SH-2 cycles (96 adds/multiplies, 144 divide cycles)[10]]
  5. [128 adds/multiplies and 9 divides per polygon:[27]
    • 131,118 polygons/sec: 16,783,104 DSP operations, 1,180,069 DIVU divides
    • 103,160 polygons/sec: 28,059,520 SH-2 cycles (128 adds/multiplies, 144 divide cycles)
    128 adds/multiplies and 9 divides per polygon:[27]
    • 131,118 polygons/sec: 16,783,104 DSP operations, 1,180,069 DIVU divides
    • 103,160 polygons/sec: 28,059,520 SH-2 cycles (128 adds/multiplies, 144 divide cycles)]
  6. [192 adds/multiplies and 9 divides per polygon:[27]
    • 131,118 polygons/sec: 25,174,656 SH-2 DSP operations, 1,180,069 DIVU divides
    • 58,535 polygons/sec: 19,667,760 SH-2 cycles (192 adds/multiplies, 144 divide cycles)
    192 adds/multiplies and 9 divides per polygon:[27]
    • 131,118 polygons/sec: 25,174,656 SH-2 DSP operations, 1,180,069 DIVU divides
    • 58,535 polygons/sec: 19,667,760 SH-2 cycles (192 adds/multiplies, 144 divide cycles)]
  7. [46,022,720 SH-2 cycles/ops per sec (23.01136 MHz per SH-2), 1,180,069 DIVU divides/sec, 23.01136 MHz 32X VDP
    • SH-2: 215 cycles (128 geometry adds/multiplies, 30 SDRAM cycles for 40 bytes,[28] 30 raster ops,[29][30] 27 cycles 32X VDP command)[23] and 9 divides per polygon, 1 add per pixel,[31] 247 cycles and 9 divides per 32-pixel polygon:
    • 131,118 polygons/sec: 32,386,146 SH-2 cycles, 1,180,069 DIVU divides
    • 31,858 polygons/sec: 12,456,478 SH-2 cycles (247 cycles, 144 divide cycles)
    • 32X VDP: 7 cycles/poly, 3 cycles/pixel (16bpp),[23][24] 1.5 cycles/pixel (8bpp),[18] 103 cycles per 32-pixel 16bpp polygon, 55 cycles per 32-pixel 8bpp polygon
    46,022,720 SH-2 cycles/ops per sec (23.01136 MHz per SH-2), 1,180,069 DIVU divides/sec, 23.01136 MHz 32X VDP
    • SH-2: 215 cycles (128 geometry adds/multiplies, 30 SDRAM cycles for 40 bytes,[28] 30 raster ops,[29][30] 27 cycles 32X VDP command)[23] and 9 divides per polygon, 1 add per pixel,[31] 247 cycles and 9 divides per 32-pixel polygon:
    • 131,118 polygons/sec: 32,386,146 SH-2 cycles, 1,180,069 DIVU divides
    • 31,858 polygons/sec: 12,456,478 SH-2 cycles (247 cycles, 144 divide cycles)
    • 32X VDP: 7 cycles/poly, 3 cycles/pixel (16bpp),[23][24] 1.5 cycles/pixel (8bpp),[18] 103 cycles per 32-pixel 16bpp polygon, 55 cycles per 32-pixel 8bpp polygon]
  8. [252 cycles (192 geometry adds/multiplies,[27] 30 SDRAM cycles, 30 raster ops) and 9 divides per polygon, 3 operations/scanline per polygon,[30][21] 264 cycles and 9 divides per 4-scanline polygon
    • 16bpp: 3 cycles per pixel, 369 SH-2 cycles and 9 DIVU divides per 32-pixel polygon
    252 cycles (192 geometry adds/multiplies,[27] 30 SDRAM cycles, 30 raster ops) and 9 divides per polygon, 3 operations/scanline per polygon,[30][21] 264 cycles and 9 divides per 4-scanline polygon
    • 16bpp: 3 cycles per pixel, 369 SH-2 cycles and 9 DIVU divides per 32-pixel polygon]
  9. [Texture mapping:
    • Flat shading: 188 SH-2 cycles (128 geometry adds/multiplies, 30 SDRAM cycles for 40 bytes,[28] 30 raster ops)[29][30] and 9 divides per polygon, 1 add per pixel,[31] 220 SH-2 cycles and 9 divides per 32-pixel polygon
    • Texture mapping: 132 SH-2 cycles and 41 divides per 32-texel polygon
    • 132 SH-2 cycles per 32-texel texture: 2 block moves, 2 cycles per texel (2 bytes per texel), 2 cycles access
    • 41 divides per 32-texel polygon, 9 divides per polygon, 32 divides per 32-texel polygon (1 divide per texel)[33]
    • Texture mapping: 352 SH-2 cycles and 50 divides per 32-texel polygon
    • 23,601 polygons/sec: 9,487,602 SH-2 cycles, 1,180,069 DIVU divides
    • 31,714 polygons/sec: 36,535,118 SH-2 cycles (1152 cycles per polygon) Texture mapping:
    • Flat shading: 188 SH-2 cycles (128 geometry adds/multiplies, 30 SDRAM cycles for 40 bytes,[28] 30 raster ops)[29][30] and 9 divides per polygon, 1 add per pixel,[31] 220 SH-2 cycles and 9 divides per 32-pixel polygon
    • Texture mapping: 132 SH-2 cycles and 41 divides per 32-texel polygon
    • 132 SH-2 cycles per 32-texel texture: 2 block moves, 2 cycles per texel (2 bytes per texel), 2 cycles access
    • 41 divides per 32-texel polygon, 9 divides per polygon, 32 divides per 32-texel polygon (1 divide per texel)[33]
    • Texture mapping: 352 SH-2 cycles and 50 divides per 32-texel polygon
    • 23,601 polygons/sec: 9,487,602 SH-2 cycles, 1,180,069 DIVU divides
    • 31,714 polygons/sec: 36,535,118 SH-2 cycles (1152 cycles per polygon)]
  10. [Texture Gouraud shading:
    • Gouraud shading: 369 SH-2 cycles and 9 divides per 32-pixel polygon
    • Texture mapping: 132 SH-2 cycles and 41 divides per 32-texel polygon
    • Texture Gouraud shading: 501 SH-2 cycles and 50 divides per 32-texel polygon
    • 23,601 polygons/sec: 11,824,101 SH-2 cycles, 1,180,069 DIVU divides
    • 25,379 polygons/sec: 33,018,079 SH-2 cycles (1301 cycles per polygon) Texture Gouraud shading:
    • Gouraud shading: 369 SH-2 cycles and 9 divides per 32-pixel polygon
    • Texture mapping: 132 SH-2 cycles and 41 divides per 32-texel polygon
    • Texture Gouraud shading: 501 SH-2 cycles and 50 divides per 32-texel polygon
    • 23,601 polygons/sec: 11,824,101 SH-2 cycles, 1,180,069 DIVU divides
    • 25,379 polygons/sec: 33,018,079 SH-2 cycles (1301 cycles per polygon)]

References

  1. 1.0 1.1 1.2 1.3 File:32XUSHardwareManual.pdf, page 54
  2. File:Hitachi SuperH Programming Manual.pdf, page 390
  3. File:SH-2A.pdf, page 2
  4. File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf
  5. 5.0 5.1 5.2 File:SH7604 Hardware Manual.pdf, page 3
  6. 6.0 6.1 File:SH7604 Hardware Manual.pdf, page 22
  7. File:ST-103-R1-040194.pdf, page 23
  8. 8.0 8.1 File:SH7604 Hardware Manual.pdf, page 303
  9. File:Hitachi SuperH Programming Manual.pdf, page 31
  10. 10.0 10.1 File:Hitachi SuperH Programming Manual.pdf, page 155
  11. File:SH7604 Hardware Manual.pdf, page 219
  12. File:ST-103-R1-040194.pdf
  13. 13.0 13.1 File:Genesis32XUSManual.pdf, page 7
  14. 14.0 14.1 14.2 File:Genesis32XUSOverview.pdf
  15. 15.0 15.1 File:32XUSHardwareManual.pdf
  16. 16.0 16.1 File:Genesis32XUSOverview.pdf, page 7
  17. File:32XUSHardwareManual.pdf, page 49
  18. 18.0 18.1 18.2 File:32XUSHardwareManual.pdf, page 50
  19. 19.0 19.1 File:32XUSHardwareManual.pdf, page 55
  20. 20.0 20.1 File:TC511664B datasheet.pdf
  21. 21.0 21.1 21.2 21.3 21.4 21.5 File:32XUSHardwareManual.pdf, page 76
  22. 22.0 22.1 22.2 File:Genesis32XUSOverview.pdf, page 9
  23. 23.0 23.1 23.2 File:32XUSHardwareManual.pdf, page 53
  24. 24.0 24.1 File:Genesis32XUSOverview.pdf, page 51
  25. File:Genesis32XUSOverview.pdf, page 53
  26. File:32XUSHardwareManual.pdf, page 42
  27. 27.0 27.1 27.2 27.3 Design of Digital Systems and Devices (pages 95-97)
  28. 28.0 28.1 File:32XUSHardwareManual.pdf, page 77
  29. 29.0 29.1 Algorithms for Parallel Polygon Rendering (pages 33-36)
  30. 30.0 30.1 30.2 Transformation Of Rendering Algorithms For Hardware Implementation (page 53)
  31. 31.0 31.1 Algorithms for Parallel Polygon Rendering (page 35)
  32. Service Games: The Rise and Fall of SEGA, page 154
  33. State of the Art in Computer Graphics: Visualization and Modeling (page 110)
  34. File:32XUSHardwareManual.pdf, page 51
  35. Sprite engine for the Sega 32X
  36. 36.0 36.1 File:Genesis32XUSManual.pdf
  37. File:32XUSHardwareManual.pdf, page 41
  38. File:32XUSHardwareManual, page 13
  39. 39.0 39.1 Dr. DevSter's Guide to The Sega 32X
  40. File:Genesis32XUSManual.pdf, page 17
  41. File:UPD4504161 datasheet.pdf
  42. File:Genesis32XUSManual.pdf, page 22
  43. File:Genesis32XUSManual, page 7