Difference between revisions of "Sega Model 1"
From Sega Retro
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| releases={{releases | | releases={{releases | ||
| arcade_date_jp=1992-08 | | arcade_date_jp=1992-08 | ||
+ | | arcade_code_jp=[https://github.com/mamedev/mame/blob/master/src/mame/drivers/model1.cpp 837-8886171] | ||
| arcade_date_eu=1992 | | arcade_date_eu=1992 | ||
| arcade_rrp_uk=6,000 {{fileref|MeanMachinesSega26UK.pdf|page=18}} | | arcade_rrp_uk=6,000 {{fileref|MeanMachinesSega26UK.pdf|page=18}} | ||
+ | | arcade_code_eu=837-8886171 | ||
| arcade_date_world=1992 | | arcade_date_world=1992 | ||
+ | | arcade_code_world=837-8886171 | ||
}} | }} | ||
}} | }} | ||
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==Technical Specifications== | ==Technical Specifications== | ||
+ | Technical specifications for Sega Model 1 hardware: {{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/model1.cpp}} | ||
+ | |||
{{multicol| | {{multicol| | ||
− | * Board composition: Main Board, Video Board, Memory Board, I/O Board, | + | * Board composition: Main Board, Video Board, Memory Board, I/O Board, Communication Board, Sound Board, Motor Board, Audio Mix Board, Amp Board |
+ | ** Board revisions: CPU Board 837-8886171-6298C (40 MHz), Video PCB 837-7894 (36 MHz), Memory Board 837-7893, I/O PCB 837-8950-01 (32 MHz), Motor PCB SJ25-0155-01 (8 MHz), Communication Board 837-8842, Sound Board 837-8679 (20 MHz), Audio Mix PCB 839-0542, Amp PCB 838-10018 | ||
* Main [[wikipedia:Central processing unit|CPU]]: [[NEC]] [[wikipedia:NEC V60|V60]] @ 16 MHz {{fileref|Overview of 32-bit V-Series Microprocessor.pdf}}{{fileref|UPD70616ProgrammersReferenceManual.pdf}} | * Main [[wikipedia:Central processing unit|CPU]]: [[NEC]] [[wikipedia:NEC V60|V60]] @ 16 MHz {{fileref|Overview of 32-bit V-Series Microprocessor.pdf}}{{fileref|UPD70616ProgrammersReferenceManual.pdf}} | ||
** [[wikipedia:Fixed-point arithmetic|Fixed-point arithmetic]]: 32-bit [[wikipedia:Reduced instruction set computing|RISC]] [[wikipedia:Instruction set|instructions]] @ 3.5 [[wikipedia:Instructions per second|MIPS]] | ** [[wikipedia:Fixed-point arithmetic|Fixed-point arithmetic]]: 32-bit [[wikipedia:Reduced instruction set computing|RISC]] [[wikipedia:Instruction set|instructions]] @ 3.5 [[wikipedia:Instructions per second|MIPS]] | ||
** [[wikipedia:Floating-point unit|Floating-point unit]]: [[wikipedia:Single-precision floating-point format|32-bit]] & [[wikipedia:Double-precision floating-point format|64-bit operations]] @ 16 MFLOPS | ** [[wikipedia:Floating-point unit|Floating-point unit]]: [[wikipedia:Single-precision floating-point format|32-bit]] & [[wikipedia:Double-precision floating-point format|64-bit operations]] @ 16 MFLOPS | ||
** Bus width: [[wikipedia:32-bit|32-bit]] | ** Bus width: [[wikipedia:32-bit|32-bit]] | ||
− | * Additional CPU: 3× [[Zilog Z80]] @ 4 MHz (8-bit & 16-bit instructions @ 1.74 MIPS) | + | * Additional CPU: 3× [[Zilog Z80]] @ 4 MHz (8-bit & 16-bit instructions @ 1.74 MIPS) |
** CPU for I/O Board, Comm Board and Motor Board | ** CPU for I/O Board, Comm Board and Motor Board | ||
− | * [[wikipedia:Direct memory access|DMA]] controllers: Fujitsu MB89237A DMAC, [[Fujitsu]] MB89374 Data Link Controller | + | * [[wikipedia:Direct memory access|DMA]] controllers: Fujitsu MB89237A DMAC, [[Fujitsu]] MB89374 Data Link Controller {{fileref|MB89396 datasheet.pdf}}{{fileref|MB89374 datasheet.pdf}} |
}} | }} | ||
===Sound=== | ===Sound=== | ||
− | * Sound CPU: [[wikipedia:Toshiba|Toshiba]] TMP68000N-10 ([[68000]]) @ 12 MHz | + | * Sound CPU: [[wikipedia:Toshiba|Toshiba]] TMP68000N-10 ([[68000]]) @ 12 MHz |
* Sound chips: 2× Sega 315-5560 Custom MultiPCM | * Sound chips: 2× Sega 315-5560 Custom MultiPCM | ||
** Audio capabilities: 28 [[Pulse-code modulation|PCM]] channels per chip (one for music, one for sound effects), 56 PCM channels total | ** Audio capabilities: 28 [[Pulse-code modulation|PCM]] channels per chip (one for music, one for sound effects), 56 PCM channels total | ||
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===Graphics=== | ===Graphics=== | ||
{{multicol| | {{multicol| | ||
− | * GPU: | + | * GPU: {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model1.cpp}} |
** [[wikipedia:Geometry pipelines|Geometrizer]] [[wikipedia:Coprocessor|coprocessors]]: 5× [[Fujitsu]] TGP MB86233 [[wikipedia:Digital signal processor|DSP]] @ 16 MHz {{ref|http://members.iinet.net.au/~lantra9jp1/gurudumps/m2status/index.html}}{{fileref|MB86232 datasheet.pdf}} | ** [[wikipedia:Geometry pipelines|Geometrizer]] [[wikipedia:Coprocessor|coprocessors]]: 5× [[Fujitsu]] TGP MB86233 [[wikipedia:Digital signal processor|DSP]] @ 16 MHz {{ref|http://members.iinet.net.au/~lantra9jp1/gurudumps/m2status/index.html}}{{fileref|MB86232 datasheet.pdf}} | ||
*** Coprocessor abilities: [[wikipedia:Decimal floating point|Floating decimal point]] operation function, axis rotation operation function, 3D [[wikipedia:Matrix (mathematics)|matrix operation]] function, [[wikipedia:Arithmetic logic unit|ALU]], DMA controller, T&L (transform, clipping, lighting) {{ref|http://wiki.mamedev.org/index.php/TGP:Index}} | *** Coprocessor abilities: [[wikipedia:Decimal floating point|Floating decimal point]] operation function, axis rotation operation function, 3D [[wikipedia:Matrix (mathematics)|matrix operation]] function, [[wikipedia:Arithmetic logic unit|ALU]], DMA controller, T&L (transform, clipping, lighting) {{ref|http://wiki.mamedev.org/index.php/TGP:Index}} | ||
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*** Sega Custom [[wikipedia:Rasterisation|rasterizer]] chipset: 315-5422 (31 MHz), 315-5423 (31 MHz), 315-5424 (36 MHz), 315-5425 (36 MHz) | *** Sega Custom [[wikipedia:Rasterisation|rasterizer]] chipset: 315-5422 (31 MHz), 315-5423 (31 MHz), 315-5424 (36 MHz), 315-5425 (36 MHz) | ||
*** [[Sega System 24]] tilemap engine: 315-5292 tilemap generator (32 MHz) {{ref|http://imame4all.googlecode.com/svn-history/r146/Reloaded/trunk/src/mame/video/segaic16.c}} | *** [[Sega System 24]] tilemap engine: 315-5292 tilemap generator (32 MHz) {{ref|http://imame4all.googlecode.com/svn-history/r146/Reloaded/trunk/src/mame/video/segaic16.c}} | ||
− | * Display resolution: 496×384 pixels, 24 kHz [[wikipedia:Horizontal scan rate|H-Sync]], [[wikipedia:Progressive scan|progressive scan]] (non-interlaced) | + | * Display resolution: 496×384 pixels, 24 kHz [[wikipedia:Horizontal scan rate|H-Sync]], [[wikipedia:Progressive scan|progressive scan]] (non-interlaced) |
** Overscan resolution: 656×496 pixels | ** Overscan resolution: 656×496 pixels | ||
* [[Palette|Color palette]]: 16,777,216 (16-bit color, 256 luminance levels),{{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model1.cpp}} 65,536 (16-bit color) | * [[Palette|Color palette]]: 16,777,216 (16-bit color, 256 luminance levels),{{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model1.cpp}} 65,536 (16-bit color) | ||
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{{multicol| | {{multicol| | ||
* Memory: Up to 39,166 [[Byte|KB]] (7008 KB main, 23,646 KB video, 8512 KB audio) | * Memory: Up to 39,166 [[Byte|KB]] (7008 KB main, 23,646 KB video, 8512 KB audio) | ||
− | * System [[RAM]]: 2776 KB (1896 KB high-speed [[SRAM]]) | + | * System [[RAM]]: 2776 KB (1896 KB high-speed [[SRAM]]) |
** Main RAM: 480 KB (at least 156 KB SRAM) | ** Main RAM: 480 KB (at least 156 KB SRAM) | ||
*** Main Board: 324 KB (320 KB main, 4 KB comm) | *** Main Board: 324 KB (320 KB main, 4 KB comm) | ||
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** Audio RAM: 64 KB (16 KB SRAM) | ** Audio RAM: 64 KB (16 KB SRAM) | ||
* Internal DSP [[wikipedia:Cache (computing)|cache]]: 30 KB (6 KB per DSP) {{fileref|MB86232 datasheet.pdf}} | * Internal DSP [[wikipedia:Cache (computing)|cache]]: 30 KB (6 KB per DSP) {{fileref|MB86232 datasheet.pdf}} | ||
− | * System [[ROM]]: 1 [[Byte|MB]] [[EPROM]] (768 KB Memory Board, 64 KB I/O Board, 64 KB Motor Board, 128 KB Comm Board) | + | * System [[ROM]]: 1 [[Byte|MB]] [[EPROM]] (768 KB Memory Board, 64 KB I/O Board, 64 KB Motor Board, 128 KB Comm Board) |
− | * Game ROM: Up to 35,336 KB [[wikipedia:Mask ROM|MROM]] | + | * Game ROM: Up to 35,336 KB (5504 KB main EPROM/[[wikipedia:Mask ROM|MROM]], 21,384 KB video MROM,{{ref|http://mamedb.com/game/vformula}} 8.25 MB audio MROM){{ref|http://mamedb.com/game/vf}} |
}} | }} | ||
===Bandwidth=== | ===Bandwidth=== | ||
{{multicol| | {{multicol| | ||
− | * System RAM bandwidth: 654.224 MB/sec | + | * System RAM bandwidth: 654.224 MB/sec |
** Main RAM: 76 MB/sec | ** Main RAM: 76 MB/sec | ||
*** V60: 64 MB/sec (32-bit, 16 MHz) {{fileref|M5M5178AP datasheet.pdf}} | *** V60: 64 MB/sec (32-bit, 16 MHz) {{fileref|M5M5178AP datasheet.pdf}} | ||
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** V60: 64 MB/sec (32-bit, 16 MHz) | ** V60: 64 MB/sec (32-bit, 16 MHz) | ||
** DSP cache: 320 MB/sec (5× 32-bit, 16 MHz) | ** DSP cache: 320 MB/sec (5× 32-bit, 16 MHz) | ||
− | * System ROM bandwidth: 64 MB/sec (32-bit, 16 MHz) {{ | + | * System ROM bandwidth: 64 MB/sec (32-bit, 16 MHz) {{fileref|HN27C1024 datasheet.pdf}} |
− | * | + | * Game ROM bandwidth: 211 MB/sec (3× 32-bit) |
+ | ** EPROM: 64 MB/sec (32-bit, 16 MHz) {{fileref|HN27C1024 datasheet.pdf}} | ||
+ | ** MROM: 147 MB/sec (2× 32-bit, 20 MHz & 16.666667 MHz, 50/60 [[wikipedia:Nanosecond|ns]]) {{fileref|MB8316200B datasheet.pdf}}{{fileref|MB834000 datasheet.pdf}} | ||
}} | }} | ||
Revision as of 16:12, 28 November 2015
Sega Model 1 | |||||
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Manufacturer: Sega | |||||
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The Sega Model 1 is an arcade system board that was released by Sega in 1992. It is the successor to the Sega System 32 (released in 1990), and was succeeded by the Sega Model 2 (released in 1993). While earlier Sega hardware was capable of handling 3D polygons (such as the Mega Drive, released in 1988), the Model 1 was Sega's first hardware specifically designed for 3D polygon graphics.
Originally, the Model 1 was simply known as the CG Board, but was retroactively given the Model 1 name after work on the Model 2 began.
Contents
Hardware
It began development in 1990,[1] with Yu Suzuki's Sega AM2 team involved in its development from the drawing board.[2] The Model 1 was intended to compete with Namco's System 21; Namco was then the market leader in polygonal 3D video games, with titles such as Galaxian³ and Starblade.[3] The Model 1 was eventually released in 1992, debuting with Virtua Racing. While it was a significant improvement over the System 21, the Model 1 hardware was expensive, and only a few games were developed for the platform.
Contrary to popular opinion, Lockheed Martin was not involved with the development of the Model 1, but it was developed internally at Sega, before Lockheed Martin became involved with the development of the Sega Model 2, according to former Lockheed Martin employee, Real3D's Jon Lenyo, in 1998. [1]
Technical Specifications
Technical specifications for Sega Model 1 hardware: [4]
- Board composition: Main Board, Video Board, Memory Board, I/O Board, Communication Board, Sound Board, Motor Board, Audio Mix Board, Amp Board
- Board revisions: CPU Board 837-8886171-6298C (40 MHz), Video PCB 837-7894 (36 MHz), Memory Board 837-7893, I/O PCB 837-8950-01 (32 MHz), Motor PCB SJ25-0155-01 (8 MHz), Communication Board 837-8842, Sound Board 837-8679 (20 MHz), Audio Mix PCB 839-0542, Amp PCB 838-10018
- Main CPU: NEC V60 @ 16 MHz [5][6]
- Fixed-point arithmetic: 32-bit RISC instructions @ 3.5 MIPS
- Floating-point unit: 32-bit & 64-bit operations @ 16 MFLOPS
- Bus width: 32-bit
- Additional CPU: 3× Zilog Z80 @ 4 MHz (8-bit & 16-bit instructions @ 1.74 MIPS)
- CPU for I/O Board, Comm Board and Motor Board
- DMA controllers: Fujitsu MB89237A DMAC, Fujitsu MB89374 Data Link Controller [7][8]
Sound
- Sound CPU: Toshiba TMP68000N-10 (68000) @ 12 MHz
- Sound chips: 2× Sega 315-5560 Custom MultiPCM
- Audio capabilities: 28 PCM channels per chip (one for music, one for sound effects), 56 PCM channels total
- Sound timer: Yamaha YM3834 @ 8 MHz
Graphics
- GPU: [9]
- Geometrizer coprocessors: 5× Fujitsu TGP MB86233 DSP @ 16 MHz [10][11]
- Coprocessor abilities: Floating decimal point operation function, axis rotation operation function, 3D matrix operation function, ALU, DMA controller, T&L (transform, clipping, lighting) [12]
- Fixed-point arithmetic: 32-bit instructions @ 80 MIPS (16 MIPS each)
- Floating-point unit: 32-bit operations @ 80 MFLOPS (16 MFLOPS each)
- Bus width: 32-bit
- DSP coprocessors located on Main Board
- Video Board: Sega 837-7894 171-6080D Video PCB @ 36 MHz
- Sega Custom rasterizer chipset: 315-5422 (31 MHz), 315-5423 (31 MHz), 315-5424 (36 MHz), 315-5425 (36 MHz)
- Sega System 24 tilemap engine: 315-5292 tilemap generator (32 MHz) [13]
- Geometrizer coprocessors: 5× Fujitsu TGP MB86233 DSP @ 16 MHz [10][11]
- Display resolution: 496×384 pixels, 24 kHz H-Sync, progressive scan (non-interlaced)
- Overscan resolution: 656×496 pixels
- Color palette: 16,777,216 (16-bit color, 256 luminance levels),[9] 65,536 (16-bit color)
- Graphical capabilities: Shading, flat shading, diffuse reflection, specular reflection, 2 layers of background scrolling, alpha blending, alpha channel, lighting [9]
- Geometric performance:
- 540,000 vectors/sec
- 180,000 polygons/sec, with all effects
- Rendering fillrate: 68 million pixels/sec
- Polygon fillrate: 36 million pixels/sec
- Tilemap fillrate: 32 million pixels/sec
Memory
- Memory: Up to 39,166 KB (7008 KB main, 23,646 KB video, 8512 KB audio)
- System RAM: 2776 KB (1896 KB high-speed SRAM)
- Main RAM: 480 KB (at least 156 KB SRAM)
- VRAM: 2232 KB (at least 1464 KB SRAM)
- Main Board: 768 KB (128 KB display lists, 576 KB tiles, 64 KB color)
- Video Board: 1464 KB SRAM
- Audio RAM: 64 KB (16 KB SRAM)
- Internal DSP cache: 30 KB (6 KB per DSP) [11]
- System ROM: 1 MB EPROM (768 KB Memory Board, 64 KB I/O Board, 64 KB Motor Board, 128 KB Comm Board)
- Game ROM: Up to 35,336 KB (5504 KB main EPROM/MROM, 21,384 KB video MROM,[16] 8.25 MB audio MROM)[17]
Bandwidth
- System RAM bandwidth: 654.224 MB/sec
- Main RAM: 76 MB/sec
- VRAM: 558.223776 MB/sec
- Audio RAM: 20 MB/sec (16-bit, 10 MHz) [19]
- Internal processor bandwidth: 384 MB/sec
- V60: 64 MB/sec (32-bit, 16 MHz)
- DSP cache: 320 MB/sec (5× 32-bit, 16 MHz)
- System ROM bandwidth: 64 MB/sec (32-bit, 16 MHz) [23]
- Game ROM bandwidth: 211 MB/sec (3× 32-bit)
List of Sega Model 1 Games
- Virtua Racing (1992)
- Star Wars Arcade (1993)
- Virtua Fighter (1993)
- Wing War (1994)
- Sega VR-1 (1994)
- Dennoo Senki Net Merc (1995)
- Tecwar / Netmerc (1994)
Gallery
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