View source for Sega Dreamcast/Technical specifications

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Technical specifications for the [[Sega Dreamcast]].

==CPU==
{{multicol|
* Main CPU: [[Hitachi]] [[SH-4]]{{fileref|SH-4 Software Manual.pdf}}{{fileref|SH-4 datasheet.pdf}}
** Operating frequency: 200 MHz
** Features: [[RISC]], 2-way [[wikipedia:Superscalar|Superscalar]],{{ref|[http://web.archive.org/web/20000823204755/computer.org/micro/articles/dreamcast_2.htm Sega Dreamcast: Implementation (IEEE)]}}{{fileref|SH-4 Software Manual.pdf}} parallel [[wikipedia:Instruction pipelining|pipelining]]{{fileref|SH-4 Software Manual.pdf|page=187}}
** Units: 128‑bit [[wikipedia:SIMD|SIMD]] vector unit with graphic functions, 64‑bit [[wikipedia:Floating-point unit|floating‑point unit]], 32‑bit fixed‑point unit, [[wikipedia:Direct memory access|DMA]] controller{{fileref|SH-4 datasheet.pdf}} (frees CPU for other tasks),{{fileref|GamersRepublic US 03.pdf|page=29}} interrupt controller{{fileref|SH-4 datasheet.pdf}}
** 128‑bit vector graphic computational engine ([[wikipedia:SIMD|SIMD]]) @ 200 MHz: Vector unit, geometry processor, [[wikipedia:Digital signal processor|DSP]], graphic functions,{{fileref|SH-4 datasheet.pdf}}{{fileref|SH-4 Next-Generation DSP Architecture.pdf}} 3D capabilities,{{fileref|GamersRepublic US 03.pdf|page=29}} calculates [[wikipedia:Transform and lighting|T&L]] geometry and lighting of polygons, creates [[wikipedia:Display list|display lists]] of polygons for tiling, DMA allows SH4 access to VRAM and PowerVR2 access to Main RAM, store queue mechanism (allowing high‑speed packet transfers between Main RAM and VRAM){{fileref|DreamcastDevBoxSystemArchitecture.pdf}}
** Bus width: 128‑bit internal, 64‑bit external
** Bandwidth: 3.2 GB/s internal, 1.6 GB/s external
* Performance:
** Fixed‑point performance: 360 [[wikipedia:Instructions per second|MIPS]]{{ref|2 instructions per cycle{{fileref|SH-4 Software Manual.pdf|page=5}}|group=gn}}
** Floating‑point performance: 1.4 [[wikipedia:FLOPS|GFLOPS]]{{ref|7 floating-point operations per cycle|group=gn}}
}}

==Graphics==
Graphical specifications of the Dreamcast:{{fileref|Dreamcast Hardware Specification Outline.pdf}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf}}{{fileref|PowerVR2DCFeaturesUnderWindowsCE.pdf}}

{{multicol|
* GPU: 2 graphics processors (SH‑4 SIMD, CLX2)
** Cores: 6 cores (SH‑4 SIMD, 5 CLX2 cores)
* GPU Geometry Processor: Hitachi SH‑4 SIMD @ 200 MHz (1.4 [[wikipedia:GFLOPS|GFLOPS]])
* GPU Rasterizer: [[NEC]]‑[[VideoLogic]] [[PowerVR CLX2]] (PVR2DC/HOLLY) @ 100 MHz (PowerVR2 series)
* CLX2 Cores: Tile Accelerator (TA), Image Synthesis Processor (ISP), Texture & Shading Processor (TSP), Triangle Setup [[wikipedia:Floating-point unit|FPU]], [[wikipedia:RAMDAC|RAMDAC]]{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=94}}
** CLX2 units: 50 rendering units (37 ISP units, 10 TSP units, 2 FPU units, 1 RAMDAC)
* TA Tile Accelerator: [[wikipedia:Tiled rendering|Tile renderer]], partitions infinite strip polygon data, divides polygons into tiles, performs tile clipping, generates object lists, retrieves display lists from SH4 (through store queues and DMA), generates ISP/TSP parameters
** Tile buffer: 600 tiles{{ref|32-bit,{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=165}} 2397 [[byte]]s{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=101}}|group=gn}}
* ISP Image Synthesis Processor: Rasterizer, depth‑sorting, parallel‑processing of tiles/pixels/polygons at high speeds, reduces bandwidth requirements{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=96}}
** 37 ISP units: ISP Precalc Unit, ISP PE Array (32 PE), Depth Accumulation Buffer, Span RLC, Span Sorter, ISP Parameter Cache{{ref|[http://www.cs.columbia.edu/~bm/3dcards/3d-cards1.html#CS11 PC 3D Graphics Accelerators FAQ: VideoLogic PowerVR]}}
** ISP PE Array: 32 processor elements (PE), on-chip depth sorting, on-chip Z-buffering, 3D processing of 32 [[pixel]]s/cycle per PE (1024-bit), 32-bit Z-buffer depth data processing{{ref|3 cycles/polygon, 1 tile/cycle{{fileref|PowerVR.pdf|page=3}}{{fileref|Patent US20030025695.pdf}}|group=gn}}
** ISP Parameter Cache: 12 KB
** Span RLC: [[wikipedia:Run-length encoding|RLE]] tile/polygon compression, 32 pixels/cycle, 32-bit{{ref|3.2 [[Pixel|GPixels/s]]|group=gn}}
* TSP Texture & Shading Processor: Shader and texture‑mapping unit{{ref|Avoids shading/texturing overdrawn [[pixel]]s/tiles and back‑facing polygons to maximize bandwidth for on‑screen pixels/tiles and front‑facing polygons, perspective correction for all texture/shading elements (including fog and alpha blending){{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=96}}|group=gn}}
** 10 TSP units: TSP Precalc, Parameter Cache, Texture Cache, Iterator Array, Pixel Processing Engine, Tile Accumulation Buffer, Secondary Accumulation Buffer, Combine & Bump Map Unit, Fog Unit, Alpha Blending Unit{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=110}}
** Pixel Processing Engine: Texturing/Shading for 32-pixel data processed by ISP{{fileref|PowerVR.pdf|page=3}}
** TSP Parameter Cache: 12 KB{{ref|[http://www.cs.columbia.edu/~bm/3dcards/3d-cards1.html#CS11 PC 3D Graphics Accelerators FAQ: VideoLogic PowerVR]}}
** Texture Cache: 1 KB (64-bit), VQ texture compression/decompression
** Tile Accumulation Buffer: 4 KB (32-bit),{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=111}} 32×32 pixels{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=127}}
** Secondary Accumulation Buffer: 4 KB (32-bit),{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=111}} 32×32 pixels
* Triangle Setup FPU: 2 FPU rendering units, 728 [[wikipedia:MFLOPS|MFLOPS]]
** ISP Setup FPU: 100 MHz, 364 MFLOPS, surface and [[wikipedia:Hidden surface determination|culling]] processing for polygons, 7,142,857 polygons/sec{{ref|14 cycles per polygon, 51 floating-point operations per polygon, 51 floating-point operations per 14 cycles{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=95}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=203}}|group=gn}}
** TSP Setup FPU: 100 MHz, 364 MFLOPS, shading and texture processing{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=95}} for tiles processed by ISP{{fileref|PowerVR.pdf|page=3}}
* [[wikipedia:RAMDAC|RAMDAC]]: 230 MHz{{ref|[http://segatech.com/technical/gpu/index.html VideoLogic's 100 MHz PowerVR Series2]}}
* CLX2 Capabilities:
** [[wikipedia:Texture mapping|Texture mapping]]: [[wikipedia:Texture mapping#Perspective correctness|Perspective‑correct]] texture mapping, perspective‑correct [[wikipedia:Mipmap|mipmapping]],{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=98}} [[wikipedia:Environment mapping|environment mapping]], 1×1 to 2048×2048 texture sizes,{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=144}} [[wikipedia:Vector quantization|VQ]] [[wikipedia:Texture compression|texture compression]],{{ref|[http://farm6.staticflickr.com/5471/12172411045_18bfc5912f_c.jpg Hideki Sato Sega Interview (Edge)]}} 12.52% (7.98:1){{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=144}} to 37.5% (2.67:1) texture compression ratios,{{fileref|PowerVR2DCFeaturesUnderWindowsCE.pdf|page=9}} [[wikipedia:Multitexturing|multi‑texturing]],{{ref|[http://yam.20to4.net/dreamcast/index_old.html SEGA Dreamcast: Programming Hints]}} texture clamping/wrapping/mirroring, [[wikipedia:Bump mapping|bump mapping]] (2‑pass),{{fileref|PowerVR2DCFeaturesUnderWindowsCE.pdf|page=11}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=120}} [[wikipedia:Normal mapping|normal mapping]] (Dot3 bump mapping)
** [[wikipedia:Texture filtering|Filtering]]: [[wikipedia:Nearest-neighbor interpolation|Point filtering]], [[wikipedia:Bilinear filtering|bilinear filtering]],{{ref|[http://web.archive.org/web/20000823204755/computer.org/micro/articles/dreamcast_2.htm Sega Dreamcast: Implementation (IEEE)]}} [[wikipedia:Trilinear filtering|trilinear filtering]] (2-pass),{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=116}} [[wikipedia:Anisotropic filtering|anisotropic filtering]]{{fileref|Dreamcast Hardware Specification Outline.pdf|page=22}}
** [[wikipedia:Spatial anti-aliasing|Anti‑aliasing]]: [[wikipedia:Supersampling|Super‑sample anti‑aliasing]] (up to 4× SSAA),{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=98}} [[wikipedia:FSAA|full‑scene anti‑aliasing]] (FSAA), edge anti‑aliasing{{fileref|Dreamcast Hardware Specification Outline.pdf|page=22}}
** [[wikipedia:Alpha blending|Alpha blending]]: 256 levels of transparency, multi‑pass blending, per‑pixel translucency sorting, [[wikipedia:Order-independent transparency|order-independent transparency]],{{ref|[http://msdn.microsoft.com/en-us/library/ms834190.aspx Optimizing Dreamcast Microsoft Direct3D Performance (1999-03-01)] ([[Microsoft]])}} translucent polygons/textures, realistic translucent effects (e.g. flames, water splashes, lens flare),{{fileref|PowerVR.pdf|page=3}} multiple layers of translucency{{ref|[http://www.cs.columbia.edu/~bm/3dcards/3d-cards1.html#CS11 PC 3D Graphics Accelerators FAQ: VideoLogic PowerVR]}}
** [[wikipedia:Shading|Shading]]: Perspective‑correct ARGB [[Gouraud shading]], flat shading, shadows, [[wikipedia:Shadow mapping|shadow volume generation]],{{fileref|PowerVR.pdf|page=4}} post-processing,{{ref|[http://yam.20to4.net/dreamcast/index_old.html SEGA Dreamcast: Programming Hints]}} [[wikipedia:Phong shading|Phong shading]]{{fileref|PowerVR.pdf|page=3}}
** [[wikipedia:Rendering (computer graphics)|Rendering]]: [[wikipedia:Render output unit|ROP]] (render output unit), on-chip 32‑bit floating‑point [[wikipedia:Z-buffering|Z‑buffering]],{{fileref|Patent US20030025695.pdf}} 256 [[wikipedia:Distance fog|fog effects]], vertex fog, per‑pixel table fog, darkness,{{fileref|PowerVR.pdf|page=3}} hardware clipping to viewport
** [[wikipedia:Computer graphics lighting|Lighting]]: [[wikipedia:Specular highlight|Specular highlighting]],{{fileref|Dreamcast Hardware Specification Outline.pdf|page=22}}{{ref|[http://www.ludd.luth.se/~jlo/dc/ta-intro.txt Tiling Accelerator Notes]}} [[wikipedia:Per-pixel lighting|per‑pixel lighting]],{{ref|[http://ign.com/articles/2000/01/22/zombie-revenge-3 Zombie Revenge (21 January 2000)]}} light volume generation,{{fileref|PowerVR.pdf|page=4}} parallel light source, point source, environmental light, illumination for circular and non-circular sections{{fileref|PowerVR.pdf|page=3}}
** [[wikipedia:Tiled rendering|Tiled rendering]]: Screen partitioning into 32×32 tiles, tile/strip/line buffer (framebuffer compression), each tile rendered in internal 32×32 buffer in register memory before being copied to main framebuffer, increases [[fillrate]] significantly{{ref|[http://mc.pp.se/dc/pvr.html PowerVR (Dreamcast Hardware)]}}
** [[wikipedia:Deferred shading|Deferred rendering]]: [[wikipedia:Hidden surface determination|Hidden surface removal]] (32‑bit floating‑point), [[wikipedia:Back-face culling|back‑face culling]], culling of tiny polygons
** Polygons: [[wikipedia:Triangle mesh|Triangle polygons]], [[wikipedia:Polygon mesh|quad polygons]], [[sprite]] polygons, opaque polygons drawn at high speed{{ref|32 pixels per cycle{{ref|[http://web.archive.org/web/20000823204755/computer.org/micro/articles/dreamcast_2.htm Sega Dreamcast: Implementation (IEEE)]}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=96}}|group=gn}}
** Depth sorting: Alpha test in tile buffer, hardware front-to-back translucency sorting, increases fillrate for opaque and translucent polygons, on-chip Z-buffering{{fileref|DreamcastDevBoxSystemArchitecture.pdf}}{{fileref|Patent US20030025695.pdf}}
** GMV (general modifier volumes): Light beams, shadows, lasers, glowing suns,{{ref|[http://www.gamepilgrimage.com/DCPScompare.htm Dreamcast Comparison]}} dynamic lighting, dynamic colored lighting,{{ref|[http://planetdc.segaretro.org/features/editorials/edit006/index.html Quake III Arena vs Unreal Tournament (IGN)]}} dynamic shadows, light bloom, [[wikipedia:Tessellation (computer graphics)|tessellation]],{{ref|1=[https://www.youtube.com/watch?v=pCLXIaVSQcw Dreamcast homebrew - winter terrain and light bloom]}}{{ref|1=[https://www.youtube.com/watch?v=p04FTA6izck Dreamcast homebrew engine: More dynamic shadows and lighting]}} motion blur,{{ref|1=[https://www.youtube.com/watch?v=c0blSBgpRUg DF Retro: Shenmue - A Game Ahead Of Its Time (Digital Foundry)]}} [[wikipedia:Volumetric lighting|volumetric]] effects (shadows, [[wikipedia:Lens flare|lens flare]], etc.),{{ref|[http://www.segatech.com/archives/february1998.html PowerVR: The Second Generation (February 21, 1998)]}} volumetric fog,{{fileref|GamersRepublic US 03.pdf|page=29}} [[wikipedia:Shadow volume|stencil volume shadows]].{{ref|[http://yam.20to4.net/dreamcast/index_old.html SEGA Dreamcast: Programming Hints]}}
** Other features: Flicker filtering,{{fileref|Dreamcast Hardware Specification Outline.pdf|page=23}} accurate collision detection, [[wikipedia:Level of detail|LOD]] (Level of detail){{fileref|PowerVR.pdf|page=3}}
* Display [[Resolution]]: 320×240 to 800×608 [[pixel]]s, interlaced and progressive scan, TV and [[Dreamcast VGA Adapter|VGA]]
** Internal resolution: 320×240 to 1600×1200 pixels{{ref|[http://segatech.com/technical/gpu/index.html VideoLogic's 100 MHz PowerVR Series2]}}
** Texture map resolutions: 8×8 to 2048×2048 [[texel]]s{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=144}}
* Refresh rate: 30–60 Hz (NTSC/PAL60), 25–50 Hz (PAL50){{fileref|Dreamcast Hardware Specification Outline.pdf|page=23}}
** Maximum frame rate: 60 FPS (NTSC/PAL60), 50 FPS (PAL50)
* Color Depth: 16‑bit RGB to 32‑bit [[wikipedia:RGBA color space|ARGB]],{{fileref|Dreamcast Hardware Specification Outline.pdf|page=22}} 65,536 colors (16‑bit color) to 16,777,216 colors ([[wikipedia:24-bit color|24‑bit color]]) with 8‑bit (256 levels) [[wikipedia:Alpha compositing|alpha blending]], [[wikipedia:YUV|YUV]] and [[wikipedia:RGB color space|RGB color spaces]], [[wikipedia:Chroma key|color key]] overlay{{ref|[http://web.archive.org/web/20070811102018/www3.sharkyextreme.com/hardware/reviews/video/neon250/2.shtml Neon 250 Specs & Features]}}
* [[wikipedia:Framebuffer|Framebuffer]]: Optional (raster method can be used with tile buffer){{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=13}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=93}}
** Strip/Tile buffer: 32×32×16‑bit (4 KB) to 32×32×32‑bit (8 KB) in local tile buffer cache memory{{fileref|DreamcastDevBoxSystemArchitecture.pdf}}
** Full framebuffer: 320×240×16-bit (300 KB) to 1600×1200×24‑bit (5625 KB) or 2048×2048×16‑bit (8 MB) in VRAM (optional){{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=93}}
** Note: Due to deferred rendering, framebuffer only needs to be filled once per fram{{ref|For opaque polygons, while translucent polygons can overdraw with up to 100 MPixels/s (200–300 MB/s)|group=gn}}
* [[VRAM]]: 8 MB (unified framebuffer and texture memory, effectively 21–63 MB with texture compression){{fileref|Dreamcast Hardware Specification Outline.pdf|page=18}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf}}
** Framebuffer: 300–5625 KB (optional){{ref|Average 1200 KB (640×480, 16-bit color, double-buffered)|group=gn}}
** Polygons: Stored in double-buffered display lists,{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=102}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=152}} 22 bytes per shaded triangle,{{ref|Flat/Gouraud shading, 43 bytes double-buffered|group=gn}} 31 bytes per textured triangle,{{ref|Gouraud shading, 62 bytes double-buffered|group=gn}} 36 bytes per bump-mapped triangle,{{ref|Textured, Gouraud shading, bump mapping, 72 bytes double-buffered|group=gn}} 38 bytes per volume-modified triangle,{{ref|Textured, Gouraud shading, modifier volumes, 75 bytes double-buffered|group=gn}} 96 bytes per [[sprite]]{{ref|Sprite, quad, 192 bytes double-buffered|group=gn}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=199}}
** Textures: 32 KB{{ref|8×8 texture, 16 colors|group=gn}} to 8 MB (effectively 21–63 MB with texture compression),{{fileref|PowerVR2DCFeaturesUnderWindowsCE.pdf|page=9}}{{ref|Average 5 MB{{ref|[http://segatech.com/technical/polygons/index.html How Many Polygons Can the Dreamcast Render?]}} (effectively 20–30 MB with texture compression){{ref|[http://farm6.staticflickr.com/5471/12172411045_18bfc5912f_c.jpg Hideki Sato Sega Interview (Edge)]}}|group=gn}} 32 bytes{{ref|8×8×4-bit|group=gn}} to 386 KB{{ref|1024×1024×24-bit{{fileref|PowerVR2DCFeaturesUnderWindowsCE.pdf|page=9}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=144}}|group=gn}} or 1026 KB{{ref|2048×2048×16-bit{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=144}}|group=gn}} per texture
** VRAM bandwidth: 800 MB/s (effectively up to 2.1–6.3 GB/s with texture compression)
** Note: Main RAM also used to store polygon display lists. Textures transferred directly to VRAM. Main RAM can also optionally be used to store textures.
* Floating-Point Performance: 2.1 GFLOPS
** SH-4 SIMD: 1.4 GFLOPS geometry
** CLX2: 728 MFLOPS rendering
* Rendering [[Fillrate]]:{{ref|[http://web.archive.org/web/20000823204755/computer.org/micro/articles/dreamcast_2.htm Sega Dreamcast: Implementation (IEEE)]}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf}}
** 3.2 [[Pixel|GPixels/s]]: Maximum fillrate for opaque polygons{{ref|32 pixels per cycle,{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=96}} 1 pixel per PE (processor element){{fileref|PowerVR.pdf|page=3}}{{fileref|Patent US20030025695.pdf}}|group=gn}}
** 500 [[Pixel|MPixels/s]]: Average fillrate for [[wikipedia:Alpha blending|translucent]] and opaque polygons{{fileref|Edge UK 067.pdf|page=11}}{{ref|5 pixels per cycle, 6 PEs (processor elements) per pixel|group=gn}}
** 100 MPixels/s: Minimum fillrate for translucent polygons with hardware sort depth of 60{{ref|60 layers depth, 1 pixel per cycle, 32 PEs per pixel|group=gn}}
** 100 MPixels/s to 3.2 GPixels/s, depending on translucency and depth of polygons{{ref|1–60 layers depth, 1–32 pixels per cycle,{{fileref|PowerVR2DCFeaturesUnderWindowsCE.pdf}} 1–32 PEs per pixel|group=gn}}
* Texture Fillrate:{{ref|Same as pixel rendering fillrate|group=gn}}
** 3.2 [[Texel|GTexels/s]]: Maximum fillrate for opaque polygons
** 500 [[Texel|MTexels/s]]: Average fillrate for translucent and opaque polygons
** 100 MTexels/s: Minimum fillrate for translucent polygons with hardware sort depth of 60
* SH-4 Polygon [[wikipedia:Transform and lighting|T&L]] Geometry: 1.4 GFLOPS{{ref|[http://web.archive.org/web/20000823204755/computer.org/micro/articles/dreamcast_2.htm Sega Dreamcast: Implementation (IEEE)]}}{{fileref|SH-4 Software Manual.pdf|page=151}}
** Matrix transformations: 50 million vertices/s{{ref|4 cycles per matrix transformation{{fileref|SH-4 Next-Generation DSP Architecture.pdf|page=12}}|group=gn}}
** Perspective transformations: 16.6 million vertices/sec,{{ref|12 cycles per vertex (12 cycles division latency){{fileref|SH-4 Software Manual.pdf|page=211}}
*4 cycles matrix transformation{{fileref|SH-4 Next-Generation DSP Architecture.pdf|page=12}}
*5 cycles perspective division: 2 multiplies, 1 divide, 2 FLDI1{{ref|[http://gamedev.allusion.net/docs/kos-current/matrix_8h.html Dreamcast: Basic matrix operations (KallistiOS)]}} (1 MAC per cycle,{{fileref|SH-4 Next-Generation DSP Architecture.pdf|page=4}} 1 divide per cycle,{{fileref|SH-4 Software Manual.pdf|page=211}} 1 cycle per FLDI1){{fileref|SH-4 Software Manual.pdf|page=295}}|group=gn}} 16 million polygons/s{{ref|N [[wikipedia:Triangle strip|triangle strips]] per N+2 vertices{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=91}}|group=gn}}
** 1 light source: 14.2 million vertices/s,{{ref|14 cycles per vertex: 4 cycles matrix transformation, 5 cycles perspective division, 1 cycle surface normal, 4 cycles lighting matrix{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA96 ''Design of Digital Systems and Devices'' (page 96)]}}{{fileref|SH-4 Software Manual.pdf|page=151}}{{fileref|SH-4 Next-Generation DSP Architecture.pdf|page=31}}|group=gn}} 14 million polygons/s{{ref|N triangle strips per N+2 vertices|group=gn}}{{ref|[http://web.archive.org/web/20000823204755/computer.org/micro/articles/dreamcast_2.htm Sega Dreamcast: Implementation (IEEE)]}}
** 4 light sources: 6.89 million vertices/s,{{ref|29 cycles per vertex: 4 cycles matrix transformation, 5 cycles perspective division, 4 surface normals (4 cycles), 4 lighting matrices (16 cycles)|group=gn}} 6.8 million polygons/s
* CLX2 Polygon Rendering:{{ref|[http://web.archive.org/web/20000823204755/computer.org/micro/articles/dreamcast_2.htm Sega Dreamcast: Implementation (IEEE)]}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=199}}
** 16 million vertices/s{{ref|14 ISP FPU cycles per 3 vertices,{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=95}} 192 pixels per vertex|group=gn}}
** 7.1 million polygons/s: Lighting, Gouraud shading{{ref|14 ISP FPU cycles per polygon,{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=95}} 119,000–187,000 polygons per scene, 450 pixels per polygon|group=gn}}
** 7–7.1 million polygons/s: Lighting, texture mapping, Gouraud shading{{ref|116,000–130,326 polygons per scene, 70 texels per polygon|group=gn}}
** 7 million polygons/s: Lighting, texture mapping, shadows{{ref|[http://segatech.com/technical/gpu/index.html VideoLogic's 100 MHz PowerVR Series2]}}{{ref|116,000–116,667 polygons per scene, 71 texels per polygon|group=gn}}
** 7 million polygons/s: Lighting, texture mapping, trilinear filtering{{ref|1=[https://books.google.co.uk/books?id=wZnpAgAAQBAJ&pg=PA277 ''Vintage Game Consoles: An Inside Look at Apple, Atari, Commodore, Nintendo, and the Greatest Gaming Platforms of All Time'' (Page 277)]}}{{ref|116,000–116,667 polygons per scene, 71 texels per polygon|group=gn}}
** 5–6.4 million polygons/s: Lighting, texture mapping, Gouraud shading, shadows, modifier volumes, bump mapping{{ref|83,000–107,736 polygons per scene, 78–100 texels per polygon|group=gn}}
** 4.13 million polygons/s: Lighting, texture mapping, anisotropic filtering{{ref|68,832 polygons per scene,{{ref|1=[http://dknute.livejournal.com/27148.html?thread=286988 Homebrew Test]}} 121 texels per polygon|group=gn}}
** 3.12 million polygons/s: Lighting, texture mapping, Gouraud shading, shadows, modifier volumes, bump mapping, anisotropic filtering, translucent polygons{{ref|50,000–56,000 polygons per scene, 32 texels per polygon|group=gn}}
* 2D [[sprite]] capabilities: Sprites rendered as textured translucent quad polygons{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=103}}
** Colors per sprite: 16 colors (4-bit color) to 16,777,216 colors (24-bit color){{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=138}}
** Sprite sizes: 8×8 [[texel]]s (224 bytes) to 2048×2048 texels (1026.2 KB){{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=98}}{{fileref|PowerVR2DCFeaturesUnderWindowsCE.pdf|page=9}}
** Sprite fillrate: 100 MTexels/s
** Maximum sprites per frame: 26,041 sprites (8×8, 60 FPS), 31,250 sprites (8×8, 50 FPS)
** Maximum texels per scanline: 6944 texels (NTSC/PAL60), 8333 texels (PAL50)
** Maximum sprites per scanline: 868 sprites (NTSC/PAL60), 1041 sprites (PAL50)
* Full Motion Video: MPEG decoding, video compression, 320×240 to 640×320 and 320×480 video resolutions, 3D polygons can be superimposed over FMV video{{ref|[http://web.archive.org/web/20000823204755/computer.org/micro/articles/dreamcast_2.htm Sega Dreamcast: Implementation (IEEE)]}}
}}

===Notes===
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<references group="gn" />
}}</small>

==Memory==
{{multicol|
* System [[RAM]]: 26.125 [[Byte|MB]]
** Main RAM: 16 MB [[wikipedia:SDRAM|SDRAM]]{{ref|[[wikipedia:Hyundai|Hyundai]] HY57V161610D{{fileref|HY57V161610D datasheet.pdf}}
* Can be used for storing textures and polygon display lists, accessible by SH4 and PowerVR2 (via SH4 DMA){{fileref|DreamcastDevBoxSystemArchitecture.pdf}}
|group=mn}}
** [[VRAM]]: 8 MB SDRAM{{ref|Unified framebuffer and texture memory{{fileref|Dreamcast Hardware Specification Outline.pdf|page=18}}
* Accessible by Power VR2 and SH4 (via DMA and store queues)
|group=mn}}
** Sound RAM: 2 MB SDRAM
** [[GD-ROM]] buffer RAM: 128 KB{{fileref|Dreamcast Hardware Specification Outline.pdf}}
* Internal Processor Cache: 91.326 KB{{ref|93,518 [[byte]]s|group=mn}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf}}
** SH4 [[wikipedia:CPU cache|CPU cache]]: 25.564 KB{{ref|26,178 bytes: 8 KB instruction cache, 16 KB data cache, 64 bytes store queue cache,{{fileref|SH-4 Software Manual.pdf|page=25}} 1538 bytes registers|group=mn}}
** CLX2 [[wikipedia:GPU cache|GPU cache]]: 33.75 KB{{ref|34,560 bytes:
* Register memory: 8.25 KB{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=17}} (2397 [[byte]]s TA tile buffer,{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=101}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=165}} 509 bytes fog table, 4093 bytes palette RAM){{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=37}}
* ISP cache: 12.25 KB (12 KB ISP Parameter Cache,{{ref|[http://www.cs.columbia.edu/~bm/3dcards/3d-cards1.html#CS11 PC 3D Graphics Accelerators FAQ: VideoLogic PowerVR]}} 128 bytes Depth Accumulation Buffer, 1024-bit ISP PE Array){{fileref|PowerVR.pdf|page=3}}
* TSP cache: 13 KB (4 KB TSP Parameter Cache,{{ref|[http://www.cs.columbia.edu/~bm/3dcards/3d-cards1.html#CS11 PC 3D Graphics Accelerators FAQ: VideoLogic PowerVR]}} 1 KB Texture Cache,{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=96}} 4 KB Tile Accumulation Buffer,{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=127}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=111}} 4 KB Secondary Accumulation Buffer){{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=111}}
* FIFO buffer: 256 bytes
|group=mn}}
** AICA audio cache: 32.011 KB{{ref|32,780 bytes: 32 KB sound registers, 8 bytes RTC registers,{{fileref|Dreamcast Hardware Specification Outline.pdf}} 4 bytes FIFO buffer|group=mn}}
* System [[ROM]]: 2 MB{{fileref|Dreamcast Hardware Specification Outline.pdf}}
* Flash Memory: 128 KB{{fileref|DreamcastDevBoxSystemArchitecture.pdf}}
* [[GD-ROM]] Drive: 12× maximum speed (when running in Constant Angular Velocity mode){{fileref|Dreamcast Hardware Specification Outline.pdf}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf}}
** Disc formats: GD&#8209;ROM, CD&#8209;ROM, CD&#8209;DA, , Photo CD, Video CD, CD Extra, CD+G, CD+EG
** Storage capacity: 1 GB per GD&#8209;ROM, 656 MB per CD&#8209;ROM
}}

==Bandwidth==
{{multicol|
* System RAM Bandwidth: 1.75 [[Byte|GB/s]]{{ref|4 buses, 160-bit bus width{{fileref|Dreamcast Hardware Specification Outline.pdf}}|group=mn}}
** SH4, PVR2 <‑> Main RAM — 800 [[Byte|MB/s]]{{ref|64‑bit, 100 MHz{{fileref|Dreamcast Hardware Specification Outline.pdf|page=14}}|group=mn}}
** CLX2 <‑> VRAM  — 800 MB/s{{ref|64‑bit, 100 MHz,{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=42}}|group=mn}}{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=49}} 7 [[wikipedia:Nanosecond|ns]], 2x 32-bit buses{{fileref|Dreamcast Hardware Specification Outline.pdf|page=6}}
** AICA <‑> Sound RAM — 132 MB/s{{ref|16‑bit, 66 MHz|group=mn}}
** SH4 <‑> GD‑ROM buffer — 13.3 MB/s{{ref|16‑bit|group=mn}}
* Internal Processor Cache Bandwidth: 18.8 GB/s{{ref|384‑bit|group=mn}}
** SH4 CPU cache: 3.2 GB/s{{ref|128‑bit, 200 MHz|group=mn}}
** CLX2 GPU cache: 15.6 GB/s{{ref|1248‑bit, 100 MHz:
*Register memory: 1.2 GB/s (32-bit ISP registers, 32-bit TSP registers,{{ref|[http://mc.pp.se/dc/pvr.html PowerVR (Dreamcast Hardware)]}} 32-bit TA tile buffer){{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=165}}
*ISP PE Array: 12.8 GB/s (1024-bit){{fileref|PowerVR.pdf|page=3}}
*TSP cache: 1.6 GB/s (64-bit Texture Cache,{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=96}} 32-bit Tile Accumulation Buffer, 32-bit Secondary Accumulation Buffer)
|group=mn}}
** AICA audio cache: 256 MB/s{{ref|32‑bit, 67 MHz|group=mn}}
* System ROM Bandwidth: 20 MB/s{{ref|16‑bit, 10 MHz|group=mn}}
* Transmission Bandwidth:{{fileref|DreamcastDevBoxSystemArchitecture.pdf|page=42}}
** SH4 <‑> CLX2 — 800 MB/s{{ref|64‑bit, 100 MHz|group=mn}}
** SH4IF <-> PVRIF — 400 MB/s{{ref|32‑bit, 100 MHz|group=mn}}
** SH4 <-> Root Bus — 200 MB/s{{ref|32‑bit, 50 MHz|group=mn}}
* GD‑ROM Drive: 1.8 MB/s transfer rate, 250 milliseconds access time
}}

===Notes===
<small>{{multicol|
<references group="mn" />
}}</small>

==BIOS==
{| class="wikitable" border="1"
|+ BIOS Revisions
|-
! width="50"| BIOS Version
! Machine
! Download
|-
| 1.004
| Sega Dreamcast (Commercial-Early)
| {{file|Jp_dc_1.004.7z|1.004 (Japan)}}
|-
| rowspan="3"| 1.01d
| rowspan="3"| Sega Dreamcast (Commercial)
| {{file|Us_dc_1.01d.zip|1.01d (North America)}}
|-
| {{file|Eu_dc_1.01d.zip|1.01d (Europe)}}
|-
| {{file|Jp_dc_1.01d.zip|1.01d (Japan)}}
|-
| 1.011
| Sega Dreamcast (HKT-0120 Devbox)
| {{file|Jp_dc_1.011(dev).7z|1.011 (HKT-0120 Devbox)}}
|}

==Other specifications==
{{multicol|
* Operating Systems:
** [[Sega]] native operating system
** Custom [[Windows CE]], with [[wikipedia:DirectX|DirectX 6.0]], [[wikipedia:Direct3D|Direct3D]] and [[wikipedia:OpenGL|OpenGL]] support
* Dimensions: 189mm x 195mm x 76mm (7 7/16" x 7 11/16" x 3")
* Weight: 1.9kg (4.4lbs)
*Input devices: (4 custom controller ports)
}}

==References==
{{multicol|
<references />
|cols=3}}

{{Dreamcast}}

[[Category:Sega Dreamcast|Technical specifications]]