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Sega Dreamcast/Technical specifications

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Technical specifications for the Sega Dreamcast.

CPU

  • Main CPU: Hitachi SH-4[1][2]
    • Operating frequency: 200 MHz
    • Features: RISC, 2-way Superscalar,[3][1] parallel pipelining[4]
    • Units: 128‑bit SIMD vector unit with graphic functions, 64‑bit floating‑point unit, 32‑bit fixed‑point unit, DMA controller[2] (frees CPU for other tasks),[5] interrupt controller[2]
    • 128‑bit vector graphic computational engine (SIMD) @ 200 MHz: Vector unit, geometry processor, DSP, graphic functions,[2][6] 3D capabilities,[5] calculates T&L geometry and lighting of polygons, creates display lists of polygons for tiling, DMA allows SH4 access to VRAM and PowerVR2 access to Main RAM, store queue mechanism (allowing high‑speed packet transfers between Main RAM and VRAM)Media:DreamcastDevBoxSystemArchitecture.pdf[7]
    • Bus width: 128‑bit internal, 64‑bit external
    • Bandwidth: 3.2 GB/s internal, 1.6 GB/s external
  • Performance:

Graphics

Graphical specifications of the Dreamcast:Media:Dreamcast Hardware Specification Outline.pdf[9]Media:DreamcastDevBoxSystemArchitecture.pdf[7][10]

Notes

  1. 2 instructions per cycle[8]
  2. 7 floating-point operations per cycle
  3. 32-bit,Media:DreamcastDevBoxSystemArchitecture.pdf[12] 2397 bytesMedia:DreamcastDevBoxSystemArchitecture.pdf[13]
  4. 3 cycles/polygon, 1 tile/cycle[16]Media:Patent US20030025695.pdf[17]
  5. 3.2 GPixels/s
  6. Avoids shading/texturing overdrawn pixels/tiles and back‑facing polygons to maximize bandwidth for on‑screen pixels/tiles and front‑facing polygons, perspective correction for all texture/shading elements (including fog and alpha blending)Media:DreamcastDevBoxSystemArchitecture.pdf[14]
  7. 14 cycles per polygon, 51 floating-point operations per polygon, 51 floating-point operations per 14 cyclesMedia:DreamcastDevBoxSystemArchitecture.pdf[21]Media:DreamcastDevBoxSystemArchitecture.pdf[22]
  8. 32 pixels per cycle[3]Media:DreamcastDevBoxSystemArchitecture.pdf[14]
  9. For opaque polygons, while translucent polygons can overdraw with up to 100 MPixels/s (200–300 MB/s)
  10. Average 1200 KB (640×480, 16-bit color, double-buffered)
  11. Flat/Gouraud shading, 43 bytes double-buffered
  12. Gouraud shading, 62 bytes double-buffered
  13. Textured, Gouraud shading, bump mapping, 72 bytes double-buffered
  14. Textured, Gouraud shading, modifier volumes, 75 bytes double-buffered
  15. Sprite, quad, 192 bytes double-buffered
  16. 8×8 texture, 16 colors
  17. Average 5 MB[52] (effectively 20–30 MB with texture compression)[26]
  18. 8×8×4-bit
  19. 1024×1024×24-bit[27]Media:DreamcastDevBoxSystemArchitecture.pdf[25]
  20. 2048×2048×16-bitMedia:DreamcastDevBoxSystemArchitecture.pdf[25]
  21. 32 pixels per cycle,Media:DreamcastDevBoxSystemArchitecture.pdf[14] 1 pixel per PE (processor element)[16]Media:Patent US20030025695.pdf[17]
  22. 5 pixels per cycle, 6 PEs (processor elements) per pixel
  23. 60 layers depth, 1 pixel per cycle, 32 PEs per pixel
  24. 1–60 layers depth, 1–32 pixels per cycle,[10] 1–32 PEs per pixel
  25. Same as pixel rendering fillrate
  26. 4 cycles per matrix transformation[55]
  27. 12 cycles per vertex (12 cycles division latency)[56]
    • 4 cycles matrix transformation[55]
    • 5 cycles perspective division: 2 multiplies, 1 divide, 2 FLDI1[57] (1 MAC per cycle,[58] 1 divide per cycle,[56] 1 cycle per FLDI1)[59]
  28. N triangle strips per N+2 verticesMedia:DreamcastDevBoxSystemArchitecture.pdf[60]
  29. 14 cycles per vertex: 4 cycles matrix transformation, 5 cycles perspective division, 1 cycle surface normal, 4 cycles lighting matrix[61][54][62]
  30. N triangle strips per N+2 vertices
  31. 29 cycles per vertex: 4 cycles matrix transformation, 5 cycles perspective division, 4 surface normals (4 cycles), 4 lighting matrices (16 cycles)
  32. 14 ISP FPU cycles per 3 vertices,Media:DreamcastDevBoxSystemArchitecture.pdf[21] 192 pixels per vertex
  33. 14 ISP FPU cycles per polygon,Media:DreamcastDevBoxSystemArchitecture.pdf[21] 119,000–187,000 polygons per scene, 450 pixels per polygon
  34. 116,000–130,326 polygons per scene, 70 texels per polygon
  35. 35.0 35.1 116,000–116,667 polygons per scene, 71 texels per polygon
  36. 83,000–107,736 polygons per scene, 78–100 texels per polygon
  37. 68,832 polygons per scene,[64] 121 texels per polygon
  38. 50,000–56,000 polygons per scene, 32 texels per polygon

Memory

Bandwidth

Notes

  1. Hyundai HY57V161610D[67]
  2. Unified framebuffer and texture memoryMedia:Dreamcast Hardware Specification Outline.pdf[48]
    • Accessible by Power VR2 and SH4 (via DMA and store queues)
  3. 93,518 bytes
  4. 26,178 bytes: 8 KB instruction cache, 16 KB data cache, 64 bytes store queue cache,[68] 1538 bytes registers
  5. 34,560 bytes:
  6. 32,780 bytes: 32 KB sound registers, 8 bytes RTC registers,Media:Dreamcast Hardware Specification Outline.pdf[9] 4 bytes FIFO buffer
  7. 4 buses, 160-bit bus widthMedia:Dreamcast Hardware Specification Outline.pdf[9]
  8. 64‑bit, 100 MHzMedia:Dreamcast Hardware Specification Outline.pdf[71]
  9. 64‑bit, 100 MHz,Media:DreamcastDevBoxSystemArchitecture.pdf[72]
  10. 16‑bit, 66 MHz
  11. 16‑bit
  12. 384‑bit
  13. 128‑bit, 200 MHz
  14. 1248‑bit, 100 MHz:
  15. 32‑bit, 67 MHz
  16. 16‑bit, 10 MHz
  17. 64‑bit, 100 MHz
  18. 32‑bit, 100 MHz
  19. 32‑bit, 50 MHz

BIOS

BIOS Revisions
BIOS Version Machine Download
1.004 Sega Dreamcast (Commercial-Early) 1.004 (Japan) (info) (912 kB)
1.01d Sega Dreamcast (Commercial) 1.01d (North America) (info) (886 kB)
1.01d (Europe) (info) (886 kB)
1.01d (Japan) (info) (885 kB)
1.011 Sega Dreamcast (HKT-0120 Devbox) 1.011 (HKT-0120 Devbox) (info) (992 kB)

Other specifications

  • Operating Systems:
  • Dimensions: 189mm x 195mm x 76mm (7 7/16" x 7 11/16" x 3")
  • Weight: 1.9kg (4.4lbs)
  • Input devices: (4 custom controller ports)

References

  1. 1.0 1.1 File:SH-4 Software Manual.pdf
  2. 2.0 2.1 2.2 2.3 File:SH-4 datasheet.pdf
  3. 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 Sega Dreamcast: Implementation (IEEE)
  4. File:SH-4 Software Manual.pdf, page 187
  5. 5.0 5.1 5.2 File:GamersRepublic US 03.pdf, page 29
  6. File:SH-4 Next-Generation DSP Architecture.pdf
  7. 7.0 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 File:DreamcastDevBoxSystemArchitecture.pdf
  8. File:SH-4 Software Manual.pdf, page 5
  9. 9.0 9.1 9.2 9.3 9.4 9.5 File:Dreamcast Hardware Specification Outline.pdf
  10. 10.0 10.1 File:PowerVR2DCFeaturesUnderWindowsCE.pdf
  11. File:DreamcastDevBoxSystemArchitecture.pdf, page 94
  12. 12.0 12.1 12.2 File:DreamcastDevBoxSystemArchitecture.pdf, page 165
  13. 13.0 13.1 File:DreamcastDevBoxSystemArchitecture.pdf, page 101
  14. 14.0 14.1 14.2 14.3 14.4 14.5 File:DreamcastDevBoxSystemArchitecture.pdf, page 96
  15. 15.0 15.1 15.2 15.3 15.4 PC 3D Graphics Accelerators FAQ: VideoLogic PowerVR
  16. 16.00 16.01 16.02 16.03 16.04 16.05 16.06 16.07 16.08 16.09 16.10 File:PowerVR.pdf, page 3
  17. 17.0 17.1 17.2 17.3 File:Patent US20030025695.pdf
  18. File:DreamcastDevBoxSystemArchitecture.pdf, page 110
  19. 19.0 19.1 19.2 19.3 File:DreamcastDevBoxSystemArchitecture.pdf, page 111
  20. 20.0 20.1 File:DreamcastDevBoxSystemArchitecture.pdf, page 127
  21. 21.0 21.1 21.2 21.3 File:DreamcastDevBoxSystemArchitecture.pdf, page 95
  22. File:DreamcastDevBoxSystemArchitecture.pdf, page 203
  23. 23.0 23.1 23.2 VideoLogic's 100 MHz PowerVR Series2
  24. 24.0 24.1 24.2 File:DreamcastDevBoxSystemArchitecture.pdf, page 98
  25. 25.0 25.1 25.2 25.3 25.4 File:DreamcastDevBoxSystemArchitecture.pdf, page 144
  26. 26.0 26.1 Hideki Sato Sega Interview (Edge)
  27. 27.0 27.1 27.2 27.3 File:PowerVR2DCFeaturesUnderWindowsCE.pdf, page 9
  28. 28.0 28.1 28.2 SEGA Dreamcast: Programming Hints
  29. File:PowerVR2DCFeaturesUnderWindowsCE.pdf, page 11
  30. File:DreamcastDevBoxSystemArchitecture.pdf, page 120
  31. File:DreamcastDevBoxSystemArchitecture.pdf, page 116
  32. 32.0 32.1 32.2 32.3 File:Dreamcast Hardware Specification Outline.pdf, page 22
  33. Optimizing Dreamcast Microsoft Direct3D Performance (1999-03-01) (Microsoft)
  34. 34.0 34.1 File:PowerVR.pdf, page 4
  35. Tiling Accelerator Notes
  36. Zombie Revenge (21 January 2000)
  37. 37.0 37.1 PowerVR (Dreamcast Hardware)
  38. Dreamcast Comparison
  39. Quake III Arena vs Unreal Tournament (IGN)
  40. Dreamcast homebrew - winter terrain and light bloom
  41. Dreamcast homebrew engine: More dynamic shadows and lighting
  42. DF Retro: Shenmue - A Game Ahead Of Its Time (Digital Foundry)
  43. PowerVR: The Second Generation (February 21, 1998)
  44. 44.0 44.1 File:Dreamcast Hardware Specification Outline.pdf, page 23
  45. Neon 250 Specs & Features
  46. File:DreamcastDevBoxSystemArchitecture.pdf, page 13
  47. 47.0 47.1 File:DreamcastDevBoxSystemArchitecture.pdf, page 93
  48. 48.0 48.1 File:Dreamcast Hardware Specification Outline.pdf, page 18
  49. File:DreamcastDevBoxSystemArchitecture.pdf, page 102
  50. File:DreamcastDevBoxSystemArchitecture.pdf, page 152
  51. 51.0 51.1 File:DreamcastDevBoxSystemArchitecture.pdf, page 199
  52. How Many Polygons Can the Dreamcast Render?
  53. File:Edge UK 067.pdf, page 11
  54. 54.0 54.1 File:SH-4 Software Manual.pdf, page 151
  55. 55.0 55.1 File:SH-4 Next-Generation DSP Architecture.pdf, page 12
  56. 56.0 56.1 File:SH-4 Software Manual.pdf, page 211
  57. Dreamcast: Basic matrix operations (KallistiOS)
  58. File:SH-4 Next-Generation DSP Architecture.pdf, page 4
  59. File:SH-4 Software Manual.pdf, page 295
  60. File:DreamcastDevBoxSystemArchitecture.pdf, page 91
  61. Design of Digital Systems and Devices (page 96)
  62. File:SH-4 Next-Generation DSP Architecture.pdf, page 31
  63. Vintage Game Consoles: An Inside Look at Apple, Atari, Commodore, Nintendo, and the Greatest Gaming Platforms of All Time (Page 277)
  64. Homebrew Test
  65. File:DreamcastDevBoxSystemArchitecture.pdf, page 103
  66. File:DreamcastDevBoxSystemArchitecture.pdf, page 138
  67. File:HY57V161610D datasheet.pdf
  68. File:SH-4 Software Manual.pdf, page 25
  69. File:DreamcastDevBoxSystemArchitecture.pdf, page 17
  70. File:DreamcastDevBoxSystemArchitecture.pdf, page 37
  71. File:Dreamcast Hardware Specification Outline.pdf, page 14
  72. 72.0 72.1 File:DreamcastDevBoxSystemArchitecture.pdf, page 42
  73. File:DreamcastDevBoxSystemArchitecture.pdf, page 49
  74. File:Dreamcast Hardware Specification Outline.pdf, page 6
Sega Dreamcast Hardware
 Dreamcast Variations   Dreamcast consoles in Japan (Special) | Overseas
 Console Add-ons   Dreamcast Karaoke | Dreameye
Game Controllers   Controller | Arcade Stick | Fishing Controller | Gun (Dream Blaster) | Racing Controller | Maracas Controller | Twin Stick | Keyboard | Mouse
Controller Add-ons   Jump Pack (Third Party) | Microphone | VMU (Third Party)
Controller Connectors DC Tsunaident 123 | Dream Connection 2 in 1 | Dream Connection 4 in 1 | Dream Connection II | Super Converter 3 | Total Control | Total Control 2 | Total Control Plus | Total Control 3 | Total Control 5
Development Hardware Dreamcast Dev.Box | Controller Box | Dreamcast Controller Function Checker | Sound Box | GD-Writer | C1/C2 Checker | Dev.Cas | Dreamcast GD-ROM Duplicator
Online Services/Add-ons   Dreamarena | SegaNet | WebTV for Dreamcast | Modem | Modular Cable | Modular Extension Cable | Broadband Adapter | Dreamphone
Connector Cables   Onsei Setsuzoku Cable | RF Adapter | Scart Cable | S Tanshi Cable | Stereo AV Cable | VGA Box

Dreamcast MIDI Interface Cable | Neo Geo Pocket/Dreamcast Setsuzoku Cable | Taisen Cable

Misc. Hardware   Action Replay | Code Breaker | Kiosk | MP3 DC | MP3 DC Audio Player | Treamcast
Unreleased Accessories   Dreamcast DVD Player | Dreamcast Zip Drive | Swatch Access for Dreamcast | VMU MP3 Player
Arcade Variants   Sega NAOMI | Atomiswave | Sega Aurora
Other Articles Hardware Comparison | History (Development | Release | Decline and Legacy) | List of Games