Difference between revisions of "Sega Mega Drive/VDP registers"

From Sega Retro

(Undo revision 743915 by Montserrat (talk))
Tag: Undo
 
(16 intermediate revisions by 4 users not shown)
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{|
+
{|class="prettytable"
 
! Reg. || Name || Bits || Code
 
! Reg. || Name || Bits || Code
 
|-
 
|-
 
| <span id="00">00</span>
 
| <span id="00">00</span>
 
| Mode Register 1
 
| Mode Register 1
| {{bitfield|0|0|L|IE1|0|1|M3|DE}}
+
| {{bitfield|0|0|L|IE1|0|M4|M3|DE}}
* '''L:''' 1 = leftmost 8 pixels are blanked.
+
* '''L:''' 1 = leftmost 8 pixels are blanked to [[Sega Mega Drive/Palettes and CRAM#Background colour|background colour]].
* '''IE1:''' 1 = enable horizontal interrupts.
+
* '''IE1:''' 1 = enable [[Sega Mega Drive/Interrupts#HBlank and horizontal interrupt|horizontal interrupts]].
* '''M3:''' 1 = freeze [[Sega Mega Drive/VDP general usage#H/V counter|H/V counter]]; 0 = enable H/V counter.
+
* '''M4:''' 1 = normal operation; 0 = [[Sega Mega Drive/Palettes and CRAM#Low colour mode|masks high bits of color entries]] (this bit controls Mode 4 in SMS mode).
 +
* '''M3:''' 1 = freeze [[Sega Mega Drive/VDP general usage#H/V counter|H/V counter]] on level 2 interrupt; 0 = enable H/V counter.
 
* '''DE:''' 1 = disable display.
 
* '''DE:''' 1 = disable display.
 
| <tt>move.w #$80xx,($c00004).l</tt>
 
| <tt>move.w #$80xx,($c00004).l</tt>
Line 15: Line 16:
 
| {{bitfield|VR|DE|IE0|M1|M2|M5|0|0}}
 
| {{bitfield|VR|DE|IE0|M1|M2|M5|0|0}}
 
* '''VR:''' 1 = use 128kB of VRAM. Will not work correctly on standard consoles with 64kB VRAM.
 
* '''VR:''' 1 = use 128kB of VRAM. Will not work correctly on standard consoles with 64kB VRAM.
* '''DE:''' 1 = enable display; 0 = fill display with background colour.
+
* '''DE:''' 1 = enable display; 0 = fill display with [[Sega Mega Drive/Palettes and CRAM#Background colour|background colour]].
* '''IE0:''' 1 = enable vertical interrupts.
+
* '''IE0:''' 1 = enable [[Sega Mega Drive/Interrupts#VBlank and vertical interrupt|vertical interrupts]].
* '''M1:''' 1 = enable DMA operations; 0 = ignore DMA operations.
+
* '''M1:''' 1 = enable [[Sega Mega Drive/DMA|DMA]] operations; 0 = ignore DMA operations.
 
* '''M2:''' 1 = 240 pixel (30 cell) PAL mode; 0 = 224 pixel (28 cell) NTSC mode.
 
* '''M2:''' 1 = 240 pixel (30 cell) PAL mode; 0 = 224 pixel (28 cell) NTSC mode.
* '''M5:''' 1 = Mega Drive (mode 5) display; 0 = Master System (mode 4) display.
+
* '''M5:''' 1 = Mega Drive (mode 5) display; 0 = Master System ([[Sega Mega Drive/Mode 4|mode 4]]) display.
 
| <tt>move.w #$81xx,($c00004).l</tt>
 
| <tt>move.w #$81xx,($c00004).l</tt>
 
|-
 
|-
 
| <span id="02">02</span>
 
| <span id="02">02</span>
| Plane A Name Table Location
+
| [[Sega Mega Drive/Planes#Nametables|Plane A Name Table]] Location
 
| {{bitfield|0|''PA6''|PA5-PA3;3|0|0|0}}
 
| {{bitfield|0|''PA6''|PA5-PA3;3|0|0|0}}
 
* '''PA5-PA3:''' Bits 15-13 of foreground (plane A) nametable address in VRAM. Effectively the address (which must be a multiple of $2000) divided by $400.
 
* '''PA5-PA3:''' Bits 15-13 of foreground (plane A) nametable address in VRAM. Effectively the address (which must be a multiple of $2000) divided by $400.
Line 30: Line 31:
 
|-
 
|-
 
| <span id="03">03</span>
 
| <span id="03">03</span>
| Window Name Table Location
+
| [[Sega Mega Drive/Planes#Nametables|Window Name Table]] Location
 
| {{bitfield|0|''W6''|W5-W1;5|0}}
 
| {{bitfield|0|''W6''|W5-W1;5|0}}
 
* '''W5-W1:''' Bits 15-11 of window nametable address in VRAM. Effectively the address (which must be a multiple of $800) divided by $400.
 
* '''W5-W1:''' Bits 15-11 of window nametable address in VRAM. Effectively the address (which must be a multiple of $800) divided by $400.
Line 38: Line 39:
 
|-
 
|-
 
| <span id="04">04</span>
 
| <span id="04">04</span>
| Plane B Name Table Location
+
| [[Sega Mega Drive/Planes#Nametables|Plane B Name Table]] Location
 
| {{bitfield|0|0|0|0|''PB3''|PB2-PB0;3}}
 
| {{bitfield|0|0|0|0|''PB3''|PB2-PB0;3}}
 
* '''PB2-PB0:''' Bits 15-13 of foreground (plane B) nametable address in VRAM. Effectively the address (which must be a multiple of $2000) divided by $2000.
 
* '''PB2-PB0:''' Bits 15-13 of foreground (plane B) nametable address in VRAM. Effectively the address (which must be a multiple of $2000) divided by $2000.
Line 45: Line 46:
 
|-
 
|-
 
| <span id="05">05</span>
 
| <span id="05">05</span>
| Sprite Table Location
+
| [[Sega Mega Drive/Sprites|Sprite Table]] Location
 
| {{bitfield|''ST7''|ST6-ST0;7}}
 
| {{bitfield|''ST7''|ST6-ST0;7}}
* '''ST6-ST0:''' Bits 15-9 of sprite table address in VRAM. Effectively the address (which must be a multiple of $200) divided by $200.
+
* '''ST6-ST0:''' Bits 15-9 of [[Sega Mega Drive/Sprites|sprite table]] address in VRAM. Effectively the address (which must be a multiple of $200) divided by $200.
 
* '''ST0:''' Ignored in 320 pixel wide mode, limiting the address to a multiple of $400.
 
* '''ST0:''' Ignored in 320 pixel wide mode, limiting the address to a multiple of $400.
 
* '''''ST7'':''' Used for 128kB VRAM.
 
* '''''ST7'':''' Used for 128kB VRAM.
Line 55: Line 56:
 
|  
 
|  
 
| {{bitfield|0|0|''SP5''|0|0|0|0|0}}
 
| {{bitfield|0|0|''SP5''|0|0|0|0|0}}
* '''''SP5'':''' Bit 16 of sprite table address in 128kB VRAM.
+
* '''''SP5'':''' Bit 16 of [[Sega Mega Drive/Sprites|sprite table]] address in 128kB VRAM.
 
| <tt>move.w #$8600+($xxxxxx>>11),($c00004).l</tt>
 
| <tt>move.w #$8600+($xxxxxx>>11),($c00004).l</tt>
 
|-
 
|-
 
| <span id="07">07</span>
 
| <span id="07">07</span>
| [[Sega Mega Drive/Palettes and CRAM|Background Colour]]
+
| [[Sega Mega Drive/Palettes and CRAM#Background colour|Background Colour]]
| {{bitfield|0|0|PL1-PL0;2|C3-C0;4}}
+
| {{bitfield|0|0|PL5-PL4;2|C3-C0;4}}
* '''PL1-PL0:''' Palette line.
+
* '''PL5-PL4:''' Palette line.
 
* '''C3-C0:''' Colour.
 
* '''C3-C0:''' Colour.
| <tt>move.w #$8500+(xx<<4)+yy,($c00004).l</tt>
+
| <tt>move.w #$8700+(xx<<4)+yy,($c00004).l</tt>
 
|-
 
|-
 
| ''08''
 
| ''08''
Line 76: Line 77:
 
|-
 
|-
 
| <span id="0A">0A</span>
 
| <span id="0A">0A</span>
| Horizontal Interrupt Counter
+
| [[Sega Mega Drive/Interrupts#HBlank and horizontal interrupt|Horizontal Interrupt Counter]]
 
| {{bitfield|H;8}}
 
| {{bitfield|H;8}}
* '''H:'''  
+
* '''H:''' Number of scanlines between [[Sega Mega Drive/Interrupts#HBlank and horizontal interrupt|horizontal interrupts]].
 
| <tt>move.w #$8Axx,($c00004).l</tt>
 
| <tt>move.w #$8Axx,($c00004).l</tt>
 
|-
 
|-
Line 84: Line 85:
 
| Mode Register 3
 
| Mode Register 3
 
| {{bitfield|0|0|0|0|IE2|VS|HS1-HS2;2}}
 
| {{bitfield|0|0|0|0|IE2|VS|HS1-HS2;2}}
* '''IE2:''' 1 = enable external interrupts.
+
* '''IE2:''' 1 = enable [[Sega Mega Drive/Interrupts#External interrupts|external interrupts]], caused by the TH pin being set to input mode and having the TH interrupt enable bit set. (Both of these are controlled by the Mega Drive' I/O registers).
* '''VS:''' Vertical scrolling mode: 1 = 16 pixel columns (1 word per column in VSRAM); 0 = full screen (1 longword only in VSRAM).
+
* '''VS:''' [[Sega Mega Drive/Scrolling|Vertical scrolling mode]]: 1 = 16 pixel columns (1 word per column in VSRAM); 0 = full screen (1 longword only in VSRAM).
* '''HS1-HS2:''' Horizontal scrolling mode: 00 = full screen; 01 = invalid; 10 = 8 pixel rows; 11 = single pixel rows.
+
* '''HS1-HS2:''' [[Sega Mega Drive/Scrolling|Horizontal scrolling mode]]: 00 = full screen; 01 = invalid; 10 = 8 pixel rows; 11 = single pixel rows.
 
| <tt>move.w #$8Bxx,($c00004).l</tt>
 
| <tt>move.w #$8Bxx,($c00004).l</tt>
 
|-
 
|-
Line 92: Line 93:
 
| Mode Register 4
 
| Mode Register 4
 
| {{bitfield|RS1|VS|HS|EP|SH|LS1-LS0;2|RS0}}
 
| {{bitfield|RS1|VS|HS|EP|SH|LS1-LS0;2|RS0}}
* '''RS1/RS0:''' 1 = 320 pixel (40 cell) wide mode; 0 = 256 (32 cell) wide mode. Both bits must be the same.
+
* '''RS1/RS0:''' 1 = 320 pixel (40 cell) wide mode; 0 = 256 pixel (32 cell) wide mode. Both bits must be the same.
* '''VS:'''  
+
* '''VS:''' Appears to do something relating to the horizontal sync, which seems to freeze it. (source md.railgun.works)'''  
* '''HS:'''  
+
* '''HS:''' Replaces the VSync signal with a pixel clock signal when set. (source md.railgun.works)'''  
 
* '''EP:''' 1 = enable external pixel bus.
 
* '''EP:''' 1 = enable external pixel bus.
 
* '''SH:''' 1 = enable [[Sega Mega Drive/Shadow and highlight|shadow/highlight mode]].
 
* '''SH:''' 1 = enable [[Sega Mega Drive/Shadow and highlight|shadow/highlight mode]].
* '''LS1-LS0:''' Interlace mode: 00 = no interlace; 01 = interlace normal resolution; 10 = no interlace; 11 = interlace double resolution.
+
* '''LS1-LS0:''' Interlace mode: 00 = no interlace; 01 = interlace normal resolution; 10 = no interlace; 11 = interlace double resolution. Changes do not take effect until the next vertical blank.
 
| <tt>move.w #$8Cxx,($c00004).l</tt>
 
| <tt>move.w #$8Cxx,($c00004).l</tt>
 
|-
 
|-
 
| <span id="0D">0D</span>
 
| <span id="0D">0D</span>
| Horizontal Scroll Data Location
+
| [[Sega Mega Drive/Scrolling|Horizontal Scroll]] Data Location
 
| {{bitfield|0|''HS6''|HS5-HS0;6}}
 
| {{bitfield|0|''HS6''|HS5-HS0;6}}
* '''HS5-HS0:''' Bits 15-10 of horizontal scroll data address in VRAM. Effectively the address (which must be a multiple of $400) divided by $400.
+
* '''HS5-HS0:''' Bits 15-10 of [[Sega Mega Drive/Scrolling|horizontal scroll]] data address in VRAM. Effectively the address (which must be a multiple of $400) divided by $400.
 
* '''''HS6'':''' Used for 128kB VRAM.
 
* '''''HS6'':''' Used for 128kB VRAM.
 
| <tt>move.w #$8D00+($xxxx>>10),($c00004).l</tt>
 
| <tt>move.w #$8D00+($xxxx>>10),($c00004).l</tt>
Line 121: Line 122:
 
|-
 
|-
 
| <span id="10">10</span>
 
| <span id="10">10</span>
| Plane Size
+
| [[Sega Mega Drive/Planes#Size|Plane Size]]
 
| {{bitfield|0|0|H1-H0;2|0|0|W1-W0;2}}
 
| {{bitfield|0|0|H1-H0;2|0|0|W1-W0;2}}
 
* '''H1-H0:''' Height setting for background and foreground (planes A & B). 00 = 256 pixels (32 cells); 01 = 512 pixels (64 cells); 10 = invalid; 11 = 1024 pixels (128 cells).
 
* '''H1-H0:''' Height setting for background and foreground (planes A & B). 00 = 256 pixels (32 cells); 01 = 512 pixels (64 cells); 10 = invalid; 11 = 1024 pixels (128 cells).
Line 129: Line 130:
 
|-
 
|-
 
| <span id="11">11</span>
 
| <span id="11">11</span>
| Window Plane Horizontal Position
+
| [[Sega Mega Drive/Planes#Window|Window Plane]] Horizontal Position
 
| {{bitfield|R|0|0|HP4-HP0;5}}
 
| {{bitfield|R|0|0|HP4-HP0;5}}
 
* '''R:''' 1 = draw window from HP to right edge of screen; 0 = draw window from HP to left edge of screen.
 
* '''R:''' 1 = draw window from HP to right edge of screen; 0 = draw window from HP to left edge of screen.
* '''HP4-HP0:''' Horizontal position on screen to start drawing the window plane (in units of 16 pixels).
+
* '''HP4-HP0:''' Horizontal position on screen to start drawing the window plane (in units of 8 pixels).
 
| <tt>move.w #$91xx,($c00004).l</tt>
 
| <tt>move.w #$91xx,($c00004).l</tt>
 
|-
 
|-
 
| <span id="12">12</span>
 
| <span id="12">12</span>
| Window Plane Vertical Position
+
| [[Sega Mega Drive/Planes#Window|Window Plane]] Vertical Position
 
| {{bitfield|D|0|0|VP4-VP0;5}}
 
| {{bitfield|D|0|0|VP4-VP0;5}}
 
* '''D:''' 1 = draw window from VP to bottom edge of screen; 0 = draw window from VP to top edge of screen.
 
* '''D:''' 1 = draw window from VP to bottom edge of screen; 0 = draw window from VP to top edge of screen.
* '''VP4-VP0:''' Vertical position on screen to start drawing the window plane (in units of 16 pixels).
+
* '''VP4-VP0:''' Vertical position on screen to start drawing the window plane (in units of 8 pixels).
 
| <tt>move.w #$92xx,($c00004).l</tt>
 
| <tt>move.w #$92xx,($c00004).l</tt>
 
|-
 
|-
Line 163: Line 164:
 
* '''E:''' 1 = FIFO is empty.
 
* '''E:''' 1 = FIFO is empty.
 
* '''F:''' 1 = FIFO is full.
 
* '''F:''' 1 = FIFO is full.
* '''VI:''' 1 = vertical interrupt occurred.
+
* '''VI:''' 1 = [[Sega Mega Drive/Interrupts#VBlank and vertical interrupt|vertical interrupt]] occurred.
* '''SO:''' 1 = sprite limit has been hit on current scanline. i.e. over 17 in 256 pixel wide mode or over 21 in 320 pixel wide mode.
+
* '''SO:''' 1 = [[Sega Mega Drive/Sprites|sprite]] limit has been hit on current scanline. i.e. 17+ in 256 pixel wide mode or 21+ in 320 pixel wide mode.
 
* '''SC:''' 1 = any two sprites have non-transparent pixels overlapping. Used for pixel-accurate collision detection.
 
* '''SC:''' 1 = any two sprites have non-transparent pixels overlapping. Used for pixel-accurate collision detection.
 
* '''OD:''' 1 = odd frame displayed in interlaced mode; 0 = even frame displayed in interlaced mode.
 
* '''OD:''' 1 = odd frame displayed in interlaced mode; 0 = even frame displayed in interlaced mode.
 
* '''VB:''' 1 = vertical blank in progress.
 
* '''VB:''' 1 = vertical blank in progress.
 
* '''HB:''' 1 = horizontal blank in progress.
 
* '''HB:''' 1 = horizontal blank in progress.
* '''DMA:''' 1 = DMA in progress.
+
* '''DMA:''' 1 = [[Sega Mega Drive/DMA|DMA]] in progress.
 
* '''PAL:''' 1 = PAL system; 0 = NTSC system.
 
* '''PAL:''' 1 = PAL system; 0 = NTSC system.
 
| <tt>move.w ($c00004).l,d0</tt>
 
| <tt>move.w ($c00004).l,d0</tt>
Line 175: Line 176:
 
|}
 
|}
  
[[Category:Sega Mega Drive|VDP registers]]
+
[[Category:Mega Drive technical information|VDP registers]]
[[Category:Unofficial documentation]]
 

Latest revision as of 14:33, 3 January 2022

Reg. Name Bits Code
00 Mode Register 1
7
6
5
4
3
2
1
0

0
0
L
IE1
0
M4
M3
DE
move.w #$80xx,($c00004).l
01 Mode Register 2
7
6
5
4
3
2
1
0

VR
DE
IE0
M1
M2
M5
0
0
  • VR: 1 = use 128kB of VRAM. Will not work correctly on standard consoles with 64kB VRAM.
  • DE: 1 = enable display; 0 = fill display with background colour.
  • IE0: 1 = enable vertical interrupts.
  • M1: 1 = enable DMA operations; 0 = ignore DMA operations.
  • M2: 1 = 240 pixel (30 cell) PAL mode; 0 = 224 pixel (28 cell) NTSC mode.
  • M5: 1 = Mega Drive (mode 5) display; 0 = Master System (mode 4) display.
move.w #$81xx,($c00004).l
02 Plane A Name Table Location
7
6
5
4
3
2
1
0

0
PA6
PA5-PA3
0
0
0
  • PA5-PA3: Bits 15-13 of foreground (plane A) nametable address in VRAM. Effectively the address (which must be a multiple of $2000) divided by $400.
  • PA6: Used for 128kB VRAM.
move.w #$8200+($xxxx>>10),($c00004).l
03 Window Name Table Location
7
6
5
4
3
2
1
0

0
W6
W5-W1
0
  • W5-W1: Bits 15-11 of window nametable address in VRAM. Effectively the address (which must be a multiple of $800) divided by $400.
  • W1: Ignored in 320 pixel wide mode, limiting the address to a multiple of $1000.
  • W6: Used for 128kB VRAM.
move.w #$8300+($xxxx>>10),($c00004).l
04 Plane B Name Table Location
7
6
5
4
3
2
1
0

0
0
0
0
PB3
PB2-PB0
  • PB2-PB0: Bits 15-13 of foreground (plane B) nametable address in VRAM. Effectively the address (which must be a multiple of $2000) divided by $2000.
  • PB3: Used for 128kB VRAM.
move.w #$8400+($xxxx>>13),($c00004).l
05 Sprite Table Location
7
6
5
4
3
2
1
0

ST7
ST6-ST0
  • ST6-ST0: Bits 15-9 of sprite table address in VRAM. Effectively the address (which must be a multiple of $200) divided by $200.
  • ST0: Ignored in 320 pixel wide mode, limiting the address to a multiple of $400.
  • ST7: Used for 128kB VRAM.
move.w #$8500+($xxxx>>9),($c00004).l
06
7
6
5
4
3
2
1
0

0
0
SP5
0
0
0
0
0
move.w #$8600+($xxxxxx>>11),($c00004).l
07 Background Colour
7
6
5
4
3
2
1
0

0
0
PL5-PL4
C3-C0
  • PL5-PL4: Palette line.
  • C3-C0: Colour.
move.w #$8700+(xx<<4)+yy,($c00004).l
08 Unused Master System horizontal scroll register
09 Unused Master System vertical scroll register
0A Horizontal Interrupt Counter
7
6
5
4
3
2
1
0

H
move.w #$8Axx,($c00004).l
0B Mode Register 3
7
6
5
4
3
2
1
0

0
0
0
0
IE2
VS
HS1-HS2
  • IE2: 1 = enable external interrupts, caused by the TH pin being set to input mode and having the TH interrupt enable bit set. (Both of these are controlled by the Mega Drive' I/O registers).
  • VS: Vertical scrolling mode: 1 = 16 pixel columns (1 word per column in VSRAM); 0 = full screen (1 longword only in VSRAM).
  • HS1-HS2: Horizontal scrolling mode: 00 = full screen; 01 = invalid; 10 = 8 pixel rows; 11 = single pixel rows.
move.w #$8Bxx,($c00004).l
0C Mode Register 4
7
6
5
4
3
2
1
0

RS1
VS
HS
EP
SH
LS1-LS0
RS0
  • RS1/RS0: 1 = 320 pixel (40 cell) wide mode; 0 = 256 pixel (32 cell) wide mode. Both bits must be the same.
  • VS: Appears to do something relating to the horizontal sync, which seems to freeze it. (source md.railgun.works)
  • HS: Replaces the VSync signal with a pixel clock signal when set. (source md.railgun.works)
  • EP: 1 = enable external pixel bus.
  • SH: 1 = enable shadow/highlight mode.
  • LS1-LS0: Interlace mode: 00 = no interlace; 01 = interlace normal resolution; 10 = no interlace; 11 = interlace double resolution. Changes do not take effect until the next vertical blank.
move.w #$8Cxx,($c00004).l
0D Horizontal Scroll Data Location
7
6
5
4
3
2
1
0

0
HS6
HS5-HS0
  • HS5-HS0: Bits 15-10 of horizontal scroll data address in VRAM. Effectively the address (which must be a multiple of $400) divided by $400.
  • HS6: Used for 128kB VRAM.
move.w #$8D00+($xxxx>>10),($c00004).l
0E
7
6
5
4
3
2
1
0

0
0
0
PB4
0
0
0
PA0
  • PB4: Bit 16 of background (plane B) nametable address in 128kB VRAM.
  • PA0: Bit 16 of foreground (plane A) nametable address in 128kB VRAM.
move.w #$8E00+(($xxxxxx&$10000)>>12)+($yyyyyy>>16),($c00004).l
0F Auto-Increment Value
7
6
5
4
3
2
1
0

INC7-INC0
  • INC7-INC0: Value to be added to the VDP address register after each read/write to the data port. 2 is most common.
move.w #$8Fxx,($c00004).l
10 Plane Size
7
6
5
4
3
2
1
0

0
0
H1-H0
0
0
W1-W0
  • H1-H0: Height setting for background and foreground (planes A & B). 00 = 256 pixels (32 cells); 01 = 512 pixels (64 cells); 10 = invalid; 11 = 1024 pixels (128 cells).
  • W1-W0: Width setting for background and foreground (planes A & B). Same as above.
  • Height/width settings of 64x128 or 128x128 cells are invalid, due to a maximum plane size of $2000 bytes.
move.w #$90xx,($c00004).l
11 Window Plane Horizontal Position
7
6
5
4
3
2
1
0

R
0
0
HP4-HP0
  • R: 1 = draw window from HP to right edge of screen; 0 = draw window from HP to left edge of screen.
  • HP4-HP0: Horizontal position on screen to start drawing the window plane (in units of 8 pixels).
move.w #$91xx,($c00004).l
12 Window Plane Vertical Position
7
6
5
4
3
2
1
0

D
0
0
VP4-VP0
  • D: 1 = draw window from VP to bottom edge of screen; 0 = draw window from VP to top edge of screen.
  • VP4-VP0: Vertical position on screen to start drawing the window plane (in units of 8 pixels).
move.w #$92xx,($c00004).l
13-14 DMA Length
7
6
5
4
3
2
1
0

L7-L0
7
6
5
4
3
2
1
0

H7-H0
  • L7-L0: Low byte of DMA length in bytes, divided by 2.
  • H7-H0: High byte of DMA length in bytes, divided by 2.
move.w #$9300+(($xxxx>>1)&$FF),($c00004).l
move.w #$9400+((($xxxx>>1)&$FF00)>>8),($c00004).l
15-17 DMA Source
7
6
5
4
3
2
1
0

L7-L0
7
6
5
4
3
2
1
0

M7-M0
7
6
5
4
3
2
1
0

T1
T0
H5-H0
  • L7-L0: Low byte of DMA source address, divided by 2.
  • M7-M0: Middle byte of DMA source address, divided by 2.
  • H5-H0: High byte of DMA source address, divided by 2.
  • T1/T0: DMA type. 0x = 68k to VRAM copy (T0 is used as the highest bit in source address); 10 = VRAM fill (source can be left blank); 11 = VRAM to VRAM copy.
move.w #$9500+(($xxxxxx>>1)&$FF),($c00004).l
move.w #$9600+((($xxxxxx>>1)&$FF00)>>8),($c00004).l
move.w #$9700+((($xxxxxx>>1)&$7F0000)>>16),($c00004).l
Status Register
7
6
5
4
3
2
1
0

0
0
1
1
0
1
E
F
7
6
5
4
3
2
1
0

VI
SO
SC
OD
VB
HB
DMA
PAL
  • E: 1 = FIFO is empty.
  • F: 1 = FIFO is full.
  • VI: 1 = vertical interrupt occurred.
  • SO: 1 = sprite limit has been hit on current scanline. i.e. 17+ in 256 pixel wide mode or 21+ in 320 pixel wide mode.
  • SC: 1 = any two sprites have non-transparent pixels overlapping. Used for pixel-accurate collision detection.
  • OD: 1 = odd frame displayed in interlaced mode; 0 = even frame displayed in interlaced mode.
  • VB: 1 = vertical blank in progress.
  • HB: 1 = horizontal blank in progress.
  • DMA: 1 = DMA in progress.
  • PAL: 1 = PAL system; 0 = NTSC system.
move.w ($c00004).l,d0