Difference between revisions of "SH-2"

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The '''SH-2''' is a 32-bit RISC processor developed by [[Hitachi]] (and currently produced by Renesas) as part of the [[SuperH]] family. It is used by the [[Sega 32X]] and the [[Sega Saturn]].
  
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The [[Sega Saturn]] is powered by two Hitachi SH2, 32-bit RISC processors. These particular SH-2 chips run at 28Mhz (versions were developed which ran as high as 40Mhz), and are capable of processing up to 25 million instructions per second (MIPS) each, for a combined rating of 50 MIPS (MIPS however, is not a true indication of processor performance in many cases). Each SH2 comes with an internal 4K RAM cache in order to speed up processing tasks.
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The [[Sega Saturn]] is powered by two SH-2 processors running in a Master/Slave configuration. These particular SH-2 chips run at 28.6364 MHz (versions were developed which ran as high as 40 MHz), and are capable of processing up to 37.227268 MIPS each (1.3 MIPS per MHz),{{fileref|SH-2A.pdf|page=2}}{{ref|[https://www.renesas.com/en-eu/products/microcontrollers-microprocessors/superh/sh7040/sh7040.html SH7040, SH7041, SH7042, SH7043, SH7044, SH7045], Renesas}} for a combined rating of 74.45464 MIPS (MIPS however, is not a true indication of processor performance in many cases). Each SH-2 comes with an internal 4 [[Byte|KB]] [[RAM]] cache in order to speed up processing tasks.
  
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"The SH2 is a small (2 cm square) but fast RISC chip that has been designed primarily to process graphics. Like all RISC processors, it's more streamlined that conventional CISC-based chips and carries out instructions in far fewer clock cycles." — Next Generation
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{{Quote|
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The SH-2 is a small (2 cm square) but fast RISC chip that has been designed primarily to process graphics. Like all RISC processors, it's more streamlined that conventional CISC-based chips and carries out instructions in far fewer clock cycles.
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|Next Generation
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|ref={{magref|nextgeneration|2|42}}}}
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==Technical specifications==
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* Clock rate: 28.63636 MHz{{intref|Sega Saturn hardware notes (2004-04-27)}}{{fileref|Hitachi SuperH Programming Manual.pdf}}{{fileref|SH7604 Hardware Manual.pdf}}
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* CPU core: 32‑bit [[wikipedia:Reduced instruction set computing|RISC]] instructions/[[wikipedia:Processor register|registers]], 37.227268 [[wikipedia:Instructions per second|MIPS]] (1.3 MIPS per MHz),{{fileref|SH-2A.pdf|page=2}}{{ref|[https://www.renesas.com/en-eu/products/microcontrollers-microprocessors/superh/sh7040/sh7040.html SH7040, SH7041, SH7042, SH7043, SH7044, SH7045], Renesas}} up to 2 instructions per cycle{{fileref|Hitachi SuperH Programming Manual.pdf|page=390}}
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* DMA unit: DMAC (Direct Memory Access Controller),{{fileref|SH7604 Hardware Manual.pdf|page=3}} parallel processing{{fileref|SH7604 Hardware Manual.pdf|page=219}}
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* 2 internal [[wikipedia:Fixed-point arithmetic|fixed‑point]] math processors:{{fileref|Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf}} MULT multiplier DSP,{{fileref|SH7604 Hardware Manual.pdf|page=3}}{{fileref|SH7604 Hardware Manual.pdf|page=22}}{{fileref|ST-103-R1-040194.pdf|page=23}} DIVU division unit,{{fileref|SH7604 Hardware Manual.pdf|page=3}}{{fileref|SH7604 Hardware Manual.pdf|page=22}} parallel processing{{fileref|SH7604 Hardware Manual.pdf|page=303}}
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:* 2x MULT multiplier DSP: 57.27272 MOPS{{ref|MOPS (million operations per second)|group=fn}} fixed-point math (28.63636 MOPS per SH-2){{ref|1 operation per cycle{{fileref|Hitachi SuperH Programming Manual.pdf|page=31}}|group=fn}}
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:* 2x DIVU division units: 16/32/64-bit division,{{fileref|SH7604 Hardware Manual.pdf|page=303}} 1,468,531 divides/sec{{ref|39 cycles per divide{{fileref|Hitachi SuperH Programming Manual.pdf|page=155}}|group=fn}}
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* [[wikipedia:Bus (computing)|Bus]] width: 64‑bit (2× 32‑bit) internal, 32‑bit external{{fileref|ST-103-R1-040194.pdf}}
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* Word length: 32-bit
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* Supports [[wikipedia:Master/slave (technology)|Master/Slave]] configuration with dual SH-2
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==Documentation==
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<gallery>
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SH7604 Hardware Manual.pdf|Hardware manual
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SH-1 SH-2 CPU Core Architecture.pdf|Programming manual
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Hitachi SuperH Programming Manual.pdf|Programming manual
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</gallery>
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==Footnotes==
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<references group="fn"/>
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}}
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==References==
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{{multicol|
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<references/>
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Latest revision as of 21:15, 25 May 2024

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SH2.jpg
SH-2
Designer: Hitachi

The SH-2 is a 32-bit RISC processor developed by Hitachi (and currently produced by Renesas) as part of the SuperH family. It is used by the Sega 32X and the Sega Saturn.


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The Sega Saturn is powered by two SH-2 processors running in a Master/Slave configuration. These particular SH-2 chips run at 28.6364 MHz (versions were developed which ran as high as 40 MHz), and are capable of processing up to 37.227268 MIPS each (1.3 MIPS per MHz),[1][2] for a combined rating of 74.45464 MIPS (MIPS however, is not a true indication of processor performance in many cases). Each SH-2 comes with an internal 4 KB RAM cache in order to speed up processing tasks.


“

The SH-2 is a small (2 cm square) but fast RISC chip that has been designed primarily to process graphics. Like all RISC processors, it's more streamlined that conventional CISC-based chips and carries out instructions in far fewer clock cycles.

„

— Next Generation [3]


Technical specifications

  • 2x MULT multiplier DSP: 57.27272 MOPS[fn 1] fixed-point math (28.63636 MOPS per SH-2)[fn 2]
  • 2x DIVU division units: 16/32/64-bit division,[13] 1,468,531 divides/sec[fn 3]
  • Bus width: 64‑bit (2× 32‑bit) internal, 32‑bit external[16]
  • Word length: 32-bit
  • Supports Master/Slave configuration with dual SH-2

Documentation

  • Hardware manual

  • Programming manual

  • Programming manual

Footnotes

  1. ↑ [MOPS (million operations per second) MOPS (million operations per second)]
  2. ↑ [1 operation per cycle[14] 1 operation per cycle[14]]
  3. ↑ [39 cycles per divide[15] 39 cycles per divide[15]]

References

  1. ↑ 1.0 1.1 File:SH-2A.pdf, page 2
  2. ↑ 2.0 2.1 SH7040, SH7041, SH7042, SH7043, SH7044, SH7045, Renesas
  3. ↑ Next Generation, "February 1995" (US; 1995-01-24), page 42
  4. ↑ Sega Saturn hardware notes (2004-04-27)
  5. ↑ File:Hitachi SuperH Programming Manual.pdf
  6. ↑ File:SH7604 Hardware Manual.pdf
  7. ↑ File:Hitachi SuperH Programming Manual.pdf, page 390
  8. ↑ 8.0 8.1 8.2 File:SH7604 Hardware Manual.pdf, page 3
  9. ↑ File:SH7604 Hardware Manual.pdf, page 219
  10. ↑ File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf
  11. ↑ 11.0 11.1 File:SH7604 Hardware Manual.pdf, page 22
  12. ↑ File:ST-103-R1-040194.pdf, page 23
  13. ↑ 13.0 13.1 File:SH7604 Hardware Manual.pdf, page 303
  14. ↑ File:Hitachi SuperH Programming Manual.pdf, page 31
  15. ↑ File:Hitachi SuperH Programming Manual.pdf, page 155
  16. ↑ File:ST-103-R1-040194.pdf
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