Difference between revisions of "Blast processing"

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Revision as of 13:04, 8 September 2016

Blast Processing was a marketing term coined by Sega of America to advertise the faster processing performance of the Sega Mega Drive (Sega Genesis in that region).

Sonic the Hedgehog 2 was the posterboy for this campaign, being faster than any other platform game at the time. The ad campaign featured commercials with races between two vehicles, with the SNES strapped to one and the Mega Drive strapped to the other.

Sega originally coined the term to refer to the high-speed bandwidth and fillrate of the Mega Drive VDP's DMA controller, but many later assumed it was referring to the 68000 CPU's higher clock rate.

Origins of term

<mediaplayer>File:Blast Processing Commercial.flv</mediaplayer>

According to Sega staff involved in its development and marketing, it was the high-speed DMA controller, rather than the CPU MHz, that the term was actually referring to. According to Sega of America's former technical director Scot Bayless:[1]


the PR guys interviewed me about what made the platform interesting from a technical standpoint and somewhere in there I mentioned the fact that you could just "blast data into the DAC's". Well they loved the word 'blast' and the next thing I knew Blast Processing was born.

— Scot Bayless


One of the specific DMA programming techniques he was referring to was the mid-frame palette swap, where the color could be changed every scanline, increasing the colors displayed on screen, a technique that was used in Sonic 2:[2]


Marty Franz [Sega technical director] discovered that you could do this nifty trick with the display system by hooking the scan line interrupt and firing off a DMA at just the right time. The result was that you could effectively jam data onto the graphics chip while the scan line was being drawn – which meant you could drive the DAC's with 8 bits per pixel. Assuming you could get the timing just right you could draw 256 color static images. There were all kinds of subtleties to the timing and the trick didn't work reliably on all iterations of the hardware but you could do it and it was cool as heck.

— Scot Bayless


Many of these DMA programmable techniques were originally intended by the Mega Drive's original product designer Masami Ishikawa:[3]


the sprite size could be changed to fill the whole display. It could also display the background screen behind the scrolling window and could change the color of each line. The number of available colors was limited compared to comparable arcade systems, but it could create shadows that matched each character's shape and was also capable of semi-transparency.

Masami Ishikawa


Technical details

For more technical details on Mega Drive, see Mega Drive: Technical specifications and Mega Drive: Blast Processing

The term was used to refer to the following technical details that gave the Mega Drive a faster performance:

CPU

The fact that the main CPU processor was clocked over two times faster than the one in its rival product, the Super NES. Sega's Motorola 68000 processor was clocked at 7.67 MHz, compared to the 3.58 MHz clock speed of Nintendo's Ricoh 5A22 processor. However, this was slightly misleading. This idea of simply comparing CPU clock rates to determine performance, regardless of other characteristics, is commonly known as the "megahertz myth". While Nintendo's 5A22 did run slower in clock cycles per second, it would put out more instructions per clock cycle, giving it a similar MIPS (million instructions per second) performance to Sega's 68000.

The 68000's faster performance came from other advantages, such as a wider 32-bit internal data bus and 16-bit external data bus (the SNES CPU had a 16-bit internal data bus and 8-bit external data bus), faster external data bus clock rate and bandwidth, more registers, 32-bit instructions,[4] and shared codebase with arcade games (where the 68000 saw widespread use).

Console Sega Mega Drive[5] Super Nintendo Entertainment System[6][7]
Main CPU Motorola 68000 Ricoh 5A22
Clock rate 7.67 MHz internal, 5.263157 MHz external 3.58 MHz internal, 2.68 MHz external
Data bus width 32-bit internal, 16-bit external 16-bit internal, 8-bit external
Registers 16x 32-bit registers 4x 16-bit registers, 4x 8-bit registers
Word length 16-bit 16-bit
Arithmetic logic unit 16-bit 16-bit
Internal instruction set 16-bit, 32-bit 8-bit, 16-bit
Internal instructions per second 1.3423 MIPS (16/32-bit instructions) 1.5 MIPS (8/16-bit instructions)
Work RAM 64 KB PSRAM (16-bit, 5.263157 MHz) 128 KB DRAM (8-bit, 2.68 MHz)
Work RAM bandwidth 10.526314 MB/s,
171 KB per frame (NTSC), 204 KB per frame (PAL)
2.68 MB/s,
43 KB per frame
Work RAM transfer rate 3.835 MB/s,
62 KB per frame (NTSC), 74 KB per frame (PAL)
2.68 MB/s,
43 KB per frame

DMA

The fact that the Sega Mega Drive's Yamaha YM7101 VDP graphics chipset had a powerful DMA controller that could handle DMA (direct memory access) operations at much faster speeds than the Super Nintendo.[4] The Mega Drive could write to VRAM during active display and VBlank,[8] and had a faster memory bandwidth than the SNES.

The quicker DMA transfer rates and bandwidth gave the Mega Drive a faster performance over the SNES.[7] This included a higher fillrate, higher gameplay resolution, faster parallax scrolling, fast data blitting, high frame-rate with many moving objects on screen, more tiles and large sprites per frame, and various programmable capabilities, such as mid-frame palette swaps (increasing colors per scanline), direct color mode (increasing colors on screen), scaling and rotation effects, ray casting, a bitmap framebuffer, and 3D polygon graphics; the base Mega Drive hardware (without needing any enhancement chips) could render 3D polygons with a performance comparable to the Super FX enhancement chip[9][10] (itself significantly outperformed by the Mega Drive's optional Sega Virtua Processor enhancement chip).

Console Sega Mega Drive[5] Super Nintendo Entertainment System[6][7]
DMA controller Yamaha YM7101 VDP Ricoh 5A22
Clock rate 13.3 MHz internal, 6.711648 MHz external 3.58 MHz internal, 2.68 MHz external
Data bus width 16-bit 16-bit internal, 8-bit external
Video RAM 64 KB VRAM (Dual-Port VRAM),
792 bytes VDP cache (CRAM, VSRAM, SAT)
64 KB VRAM (SRAM),
1056 bytes PPU cache (CGRAM, OAM)
Video RAM bandwidth 13.423296 MB/s (16-bit, 6.711648 MHz),
218 KB per frame (NTSC), 260 KB per frame (PAL)
7.16 MB/s (16-bit, 3.58 MHz),
116 KB per frame
DMA transfer rate (inactive display) 3.21845 MB/s VRAM, 6.4369 MB/s VDP cache 2.68 MB/s
DMA transfer rate (active display) VRAM: 1.2288 MB/s,
VDP cache: 1.6384 MB/s (NTSC), 2.427624 MB/s (PAL)
343.2 KB/s
Pixel clock rate 6.711648 MHz (VDP) 5.369317 MHz (PPU)
Read fillrate 6.711648 MPixels/s (104,869 tiles/sec),
427 pixels (53 tiles) per scanline
5.369317 MPixels/s (83,895 tiles/sec),
341 pixels (42 tiles) per scanline
Write fillrate (inactive display) 6.4369 MPixels/s (100,576 tiles/sec),
410 pixels (51 tiles) per scanline
5.36 MPixels/s (83,750 tiles/sec),
340 pixels (42 tiles) per scanline
Write fillrate (active display) 2.4576 MPixels/s (38,400 tiles/sec),
81,920 pixels (1280 tiles) per frame
686,400 pixels/s (10,725 tiles/sec),
11,421 pixels (178 tiles) per frame
Sprite read fillrate 4.90887 MTexels/s (NTSC), 4.122193 MTexels/s (PAL),
320 texels per scanline
4.030947 MTexels/s,
256 texels per scanline
Tiles per frame (active display) 1800 tiles display, 1280 tiles transfer 1395 tiles display, 178 tiles transfer
Sprite display per frame 80 sprites (8×8 to 32×32) 128 sprites (8×8, 16×16), 65 sprites (32×32),
16 sprites (64×64)
Sprite transfer per frame
(active display)
80 sprites (8×8 to 32×32) 128 sprites (8×8), 44 sprites (16×16),
11 sprites (32×32), 2 sprites (64×64)
Sprite display per scanline 20 sprites (8×8 to 16×16), 13 sprites (24×24),
10 sprites (32×32)
32 sprites (8×8), 16 sprites (16×16),
8 sprites (32×32), 4 sprites (64×64)
Display resolutions Gameplay: 256×224 to 320×480 (default 320×224)
Custom resolutions: 128×160 to 256×224
Gameplay: 256×192 to 256×239 (default 256×224)
Hi-res menu: 512×448 to 512×478 (half-pixels)
Scrolling capabilities Parallax scrolling, line scrolling, row scrolling,
column scrolling, overlapping scrolling layers
Parallax scrolling, line scrolling
Background planes 2 parallax scrolling tilemap planes, 1 static window plane,
52 overlapping scrolling layers (28 layers per tilemap plane)
1-2 scrolling tilemap planes (128–256 colors),
3 planes (128–160 colors), 4 planes (128 colors)
Background plane resolutions 128×160 to 768×512 (2 planes) 256×192 to 256×256 (1–4 planes),
512×512 (1–2 planes), 1024×1024 (1 plane)
Color palettes 512 colors (default), 1536 colors (Shadow/Highlight),
256–512 colors (direct color)
32,768 colors (default),
256–2048 colors (direct color)
Colors on screen 61–64 colors (default), 183–1536 colors (Shadow/Highlight),
256–512 colors (direct color)
128–256 colors (default),
256–2048 colors (direct color)
Colors per tile 16 colors (2 scrolling tilemap planes),
256–512 colors (direct color)
16 colors (1–2 tilemap planes), 8 colors (3 planes),
4 colors (4 planes), 256 colors (direct color)
3D polygon graphics
(base hardware)
Geometry: 10,000 vertices/s, 3000 polys/s
Rendering: 1600 polys/s (flat), 150 polys/s (textured)
~100 polys/s (flat)
3D polygon graphics
(enhancement chips)
SVP: 9000 polys/s (flat), ~800 polys/s (textured) SFX: 1000 polys/s (flat), ~100 polys/s (textured)
SFX2: 2000 polys/s (flat), ~200 polys/s (textured)

References

External links