Difference between revisions of "Sega Hikaru"

Latest revision as of 08:06, 16 November 2024

Sega Hikaru

Manufacturer: Sega Enterprises, Ltd.

Release

Date

RRP

Code

World

1999-05

?

837-13402

The Sega Hikaru is a successor of the Sega NAOMI and Sega Model 3 arcade systems that was developed in 1998, most likely by Hard Ware R&D Team 3^[1] and debuted in 1999. The Hikaru was used for a handful of deluxe dedicated-cabinet games, beginning with 1999's Brave Fire Fighters, in which the flame and water effects were largely a showpiece for the hardware.

It was significantly more powerful and expensive than the NAOMI. The Hikaru featured a custom Sega GPU with advanced graphical capabilities, additional CPU and sound processors, various custom processors, increased memory, and faster bandwidth. It was the first game platform capable of effective hardware Phong shading, the most intensive form of shading at the time, and was capable of the most complex lighting and particle effects of its time.

It was the most powerful game system of its time (Planet Harriers, for example, was regarded as having the best video game graphics at the time), but it was very expensive and difficult to program. Since it was comparatively expensive to produce, Sega soon abandoned the Hikaru in favor of continued NAOMI development. It was succeeded by the more affordable NAOMI 2.^[2]

Technical specifications

Board composition: Main Board, ROM Board, AICA Sound Board, I/O Board, Filter Board, Network Board^[3]

Optional: Sound Board 2^[4]^[5]

Operating systems:

Sega native operating system
Custom Windows CE, with DirectX 6.0, Direct3D and OpenGL support

Extensions: communication, 4‑channel surround audio, PCI, MIDI, RS‑232C
Connection: JAMMA Video compliant, VGA

Main

Main CPU: 2× Hitachi SH‑4 @ 200 MHz^[6]

Units: 2× 128‑bit SIMD vector units with graphic functions, 2× 64‑bit floating‑point units, 2× 32‑bit fixed‑point units
Bus width: 256‑bit (2× 128‑bit) internal, 128‑bit (2× 64‑bit) external
Fixed‑point performance: 720 MIPS
Floating‑point performance: 2.8 GFLOPS
Note: With Sega Custom 3D GPU, the SH‑4's 128‑bit SIMD matrix unit can be dedicated to game physics, artificial intelligence, collision detection, overall game code, or additional graphical performance.

MIE bridge MCU: Sega 315‑6146 Maple‑JVS MCU (Zilog Z80)^[7]^[8] @ 14.7456 MHz^[3] (8/16‑bit instructions, 8‑bit bus, 2.14 MIPS)
Memory controllers: 2× Sega 315‑6154 Memory Controller @ 200 MHz (2× 32‑bit, DMA capabilities)^[4]^[3]^[9]
Main Board PLD: 27 units, 928‑bit (25 GB/sec) internal, 640‑bit (21 GB/sec) external^[3]^[10]

2× Sega PAL (Lattice GAL16V8) GAL @ 250 MHz: 16 units (2× 8 units), 128‑bit (2× 64‑bit), DMA control, graphics processing,^[11] 4 GB/sec
Sega 315‑6083A, 315‑6085, 315‑6086 @ 250 MHz: 3 units, 384‑bit (3× 128‑bit), 12 GB/sec
Sega 315‑6202 (Lattice CY37128) CPLD @ 167 MHz: 8 units, 416‑bit (8× 52‑bit) internal (9 GB/sec), 128‑bit (8× 16‑bit) external (3 GB/sec)^[12]

Network Board processors:^[3]

Network CPU: Motorola 68000 @ 40 MHz (16/32‑bit instructions, 16‑bit bus, 7 MIPS)^[3]
Network PLD: FPGA @ 180 MHz (32‑bit),^[13] 3× PAL @ 40 MHz, Sega 315‑5804 CPLD @ 40 MHz
Network processors: 2× Sega 315‑5917 @ 40 MHz

ROM Board processors:^[3]

ROM Board PLD: FPGA @ 180 MHz (32‑bit),^[13] CPLD/PAL @ 182 MHz (32‑bit)^[14]^[15]
Security IC: Sega 315-5881 @ 28 MHz

Sound

Sound engine: 2× Yamaha AICA Super Intelligent Sound Processor (315‑6232) @ 67 MHz

Internal CPU: 2× 32‑bit ARM7 RISC CPU @ 45 MHz
CPU performance: 34 MIPS (2× 17 MIPS)
PCM/ADPCM: 16‑bit depth, 48 kHz sampling rate (DVD quality), 128 channels
Bus width: 32‑bit (2× 16‑bit)
Other features: DSP, sound synthesizer

Graphics

The Sega Hikaru uses custom 3D graphics hardware, which include the following specifications:^[16]^[17]^[4]

Graphics Engine GPU: Sega Custom 3D GPU @ 250 MHz
GPU core processors: 7 processors^[3]^[10]

2× Sega GPU 15 CP Command Processors (315‑6197) @ 250 MHz: 512‑bit (2× 256‑bit), Geometry Processor
Sega GPU 1A Image Generator (315‑6087) @ 250 MHz: 128‑bit, rasterizer/renderer^[18]
2× Sega GPU DMA controllers (315‑6084) @ 250 MHz: 256‑bit (2× 128‑bit)
2× Analog Devices ADV7120 Video DAC @ 80 MHz: 48‑bit (2× 24‑bit)^[19]

GPU Geometry Processors: 2× Sega GPU 15 CP Command Processors

Hardware T&L: Transform, clipping, lighting
Materials: Flat shading, Gouraud shading, Phong shading, diffuse, ambient, specular, unlit
Fog: Color, transparency, density, depth blend, translucency
Rendering: Double‑buffered 3D rendering (odd & even frames), depth cueing, depth buffer, depth bias, face culling, static meshes, dynamic meshes
Shading: Flat shading, Gouraud shading, Phong shading, diffuse, ambient, specular, linear
Modelview matrix: Instanced drawing, multiple instances, shared attributes between models,^[20] modelview stack
Object memory: 8 viewports, 256 modelviews, 16,384 materials (256 LOD levels), 16,384 textures/texheads (256 LOD levels), 1024 lights (256 light sets)

GPU DMA controllers: 2× Sega GPU DMA controllers

GPU IDMA (Indirect DMA) controller: Loads texture data from MaskROM (via external bus) into texture banks (with metadata), allows CPU access to texture banks
DMA controller: Moves textures around in framebuffer, transfers bitmap data to bitmap layers, allows CPU access to framebuffer

Color depth: 32‑bit ARGB, 16,777,216 colors (24‑bit color) with 8‑bit (256 levels) alpha blending, YUV and RGB color space, color key overlay
Display resolution: 31 kHz horizontal sync, 60 Hz refresh rate, 80 MHz Video DAC, JAMMA/VGA output, progressive scan^[3]^[19]

Single monitor display: 496×384 to 800×608 (default 640×480)
Dual monitor display: 992×384 to 1600×608 (default 1280×480)
Video output: 496×384 to 1968×1080 (default 640×480)
Framebuffer: 496×384 to 2048×2048 (default 2048×2048)^[3]

Lighting: 1024 lights per scene, 4 lights per polygon, 256 light sets per scene (4 lights per set), 8 window surfaces

Light types: Diffuse, ambient, specular, horizontal, spot
Emission types: Constant, linear, infinite linear, square, reciprocal, reciprocal squared
Object types: Lights (with individual position, direction and emission properties), lightsets (a set of up to 4 lights that share a mesh)

GPU capabilities: 2 bitmap layers, calendar, 16,384 vertices per mesh,^[21] hidden surface removal, deferred rendering

Framebuffer: 2048×2048 sheet (can be partitioned into framebuffer, tile data, and/or 1‑2 bitmap layers), handled by 2 GPU 1A Image Generator rasterizers/renderers (double‑buffering), accessible by DMA controller
Effects: Stencil, shadows, motion blur, particle effects, fire effects, water effects,^[22] fog, alpha blending, anti‑aliasing, specular effects,^[23]
Features: Tiled rendering, deferred rendering, back‑face culling, hidden surface removal
Phong shading: Per‑pixel lighting/shading computation processed by rasterization pipeline,^[24] deferred rendering can prevent shading of overdrawn pixels to maximize rendering bandwidth,^[25] all compute units could be used as shader units to maximize Phong shading performance

Texture capabilities: 1×1 to 2048×2048 texture sizes, mipmapping, mipmap trees, texture panning, multi‑texturing, bump mapping, normal mapping, texture filtering, bilinear filtering, trilinear filtering, environment mapping^[23]

Texture banks: 2 texture banks (stored as 2× 2048×1024 sheets), stores textures from MaskROM (with 16‑byte metadata per texture in Command RAM)

Floating-point performance: 15 GFLOPS (estimate)^{[n 1]}
Rendering fillrate:

Opaque polygons: 8 GPixels/s^{[n 2]}
Translucent polygons: 1.6 GPixels/s (8bpp), 800 MPixels/s (16bpp), 530 MPixels/s (24bpp)^{[n 3]}

Texture fillrate:

Opaque polygons: 8 GTexels/s
Translucent polygons: 4 GTexels/s (8bpp), 2 GTexels/s (16bpp), 1.3 GTexels/s (24bpp)^{[n 4]}

Phong shading performance:

2 million polygons/sec: 4 lights/polygon, 50-100-pixel polygons^{[n 5]}
3-6 million polygons/sec: 4 lights/polygon, 32-pixel polygons^{[n 6]}
10-20 million polygons/sec: 1 light/polygon, 32-pixel polygons^{[n 7]}

Gouraud shading performance:

30-60 million polygons/sec: 4 lights/polygon,^{[n 8]} 32-pixel polygons
100-200 million polygons/sec: 1 light/polygon,^{[n 9]} 32-pixel polygons

Texture mapping performance:

80 million polygons/sec: 50-100-texel polygons
100-200 million polygons/sec: 32-texel polygons

Memory

Memory: Up to 465 MB^[3]

Main memory: 130 MB^{[n 10]}
Video memory: 286.25 MB^{[n 11]}
Sound memory: 48 MB^{[n 12]}
Other memory: 480 KB^{[n 13]}

RAM: 110.625 MB^[9]^[3]

Main RAM: 64 MB SDRAM^[29]^{[n 14]}
VRAM: 30.25 MB^[30]^[16]

4 MB Command RAM^{[n 15]}
8 MB texture banks^{[n 16]}
8 MB framebuffer SDRAM^{[n 17]}
10 MB other SDRAM^{[n 18]}
256 KB Synchronous SRAM^[31]

Sound RAM: 16 MB SDRAM^{[n 19]}
Other Main Board RAM: 128 KB SRAM^[32]

MIE RAM: 64 KB^[7]
Backup RAM: 64 KB

Network Board RAM: 192 KB SRAM^[32]
ROM Board RAM: 64 KB SRAM^[33]

ROM: Up to 354 MB

Boot ROM: 2 MB EPROM^[3]
Game ROM Board: Up to 352 MB (64 MB main ROM, 256 MB video MaskROM,^[34] 32 MB sound ROM)^[4]
Note: High‑speed access allows ROM to effectively be used as RAM, with polygons and textures streamed directly from game ROM Board.^[35]

Cache: 96 KB^{[n 20]}

Bandwidth

Internal processor cache bandwidth:^[3]

SH‑4 cache: 6.4 GB/s^{[n 21]}
Sega Custom 3D GPU: 32 GB/s
AICA Sound Processor: 536 MB/s^{[n 22]}
Z80 MIE MCU: 15 MB/s^{[n 23]}
315‑6154 Memory Controllers: 1.6 GB/s^{[n 24]}
Main Board PLD: 25 GB/sec^{[n 25]}
ROM Board PLD: 1.45 GB/s^{[n 26]}
Network Board 68000: 80 MB/s^{[n 27]}
Network Board FPGA: 720 MB/s^{[n 28]}

RAM bandwidth: 35.111 GB/s^[3]

Main RAM: 2.4 GB/s^{[n 29]}

SH‑4: 1.6 GB/s^{[n 30]}
Memory Controllers: 800 MB/s^{[n 31]}

VRAM: 32 GB/s^{[n 32]}

Command RAM: 16 GB/s^{[n 33]}
Texture banks: 8 GB/s^{[n 34]}
SDRAM: 7.2 GB/s^{[n 35]}
Synchronous SRAM: 400 MB/s^{[n 36]}

Sound RAM: 268 MB/s^{[n 37]}
HM62256 SRAM: 193 MB/s^{[n 38]}

MIE RAM: 15 MB/s^{[n 23]}
Backup RAM: 44.444444 MB/s^{[n 39]}
Network Board RAM: 133.333333 MB/s^{[n 40]}

ROM Board RAM: 250 MB/s^{[n 41]}

ROM bandwidth: 4 GB/s^[3]

Boot ROM: 800 MB/s^{[n 42]}
ROM Board PLD: 1.45 GB/s^{[n 43]}
ROM Board Connectors: 1.5 GB/s^{[n 44]}

List of games

(1999)
(2000)
(2000)
(2000)
(2001)
(2001)

History

According to Sega in 1999:^[22]

“	Brave Firefighters utilizes a slightly modified Naomi Hardware system called Hikaru. Hikaru incorporates a custom Sega graphics chip and possesses larger memory capacity then standard Naomi systems. "These modifications were necessary because in Brave Firefighters, our engineers were faced with the daunting challenge of creating 3d images of flames and sprayed water," stated Sega's Vice President of Sales and Marketing, Barbara Joyiens. "If you stop and think about it, both have an almost infinite number of shapes, sizes, colors, levels of opaqueness, shadings and shadows. And, when you combine the two by simulating the spraying of water on a flame, you create an entirely different set of challenges for our game designers and engineers to overcome; challenges that would be extremely difficult, if not impossible to overcome utilizing existing 3D computers. Hikaru has the horsepower to handle these demanding graphic challenges with clarity, depth and precision."	„

In addition, the Hikaru also uses two Hitachi SH-4 CPU processors, two Yamaha AICA sound engine processors, a Motorola 68000 network CPU, and a dual GPU setup. The Hikaru hardware was largely complete in 1998, before it was released to the public in 1999.^[3] The system was very expensive, and difficult to program.^[2] The word "Hikaru" (ひかる) means "to shine" in Japanese.

Photo gallery

Main PCB board
Sound board
Comm board
ROM board (left side)
ROM board (right side)
Main board (Up Left view)
Main board (Up Right view)
Main board (Down Left view)
Main board (Down Right view)
Custom board A
Custom board B
Outer Case
Inside, assembled

Notes

↑ [Phong shading: 2 million polygons/sec, 4 light sources per polygon, 7,898–15,796 floating-point operations per 100-pixel polygon. Phong shading: 2 million polygons/sec, 4 light sources per polygon, 7,898–15,796 floating-point operations per 100-pixel polygon.]
↑ [32 pixels per cycle,^[26] 250 MHz 32 pixels per cycle,^[26] 250 MHz]
↑ [3.2 GB/s framebuffer SDRAM bandwidth (double-buffered) 3.2 GB/s framebuffer SDRAM bandwidth (double-buffered)]
↑ [8 GB/s texture bank RAM bandwidth (double-buffered) 8 GB/s texture bank RAM bandwidth (double-buffered)]
↑ [7,898–15,796 floating-point operations per 50-100-pixel polygon for 4 light sources (196 operations setup, 156 operations per pixel),^[27] 15–30 GFLOPS 7,898–15,796 floating-point operations per 50-100-pixel polygon for 4 light sources (196 operations setup, 156 operations per pixel),^[27] 15–30 GFLOPS]
↑ [5188 floating-point operations per 32-pixel polygon for 4 light sources (113 operations setup, 156 operations per pixel )^[27] 5188 floating-point operations per 32-pixel polygon for 4 light sources (113 operations setup, 156 operations per pixel )^[27]]
↑ [1297 floating-point operations per 32-pixel polygon for 1 light source (49 operations setup, 39 operations per pixel)^[27] 1297 floating-point operations per 32-pixel polygon for 1 light source (49 operations setup, 39 operations per pixel)^[27]]
↑ [181 floating-point operations per vertex/polygon: 113 operations for transformation, 68 operations for 4 light sources (17 operations per light source)^[28] 181 floating-point operations per vertex/polygon: 113 operations for transformation, 68 operations for 4 light sources (17 operations per light source)^[28]]
↑ [130 floating-point operations per vertex/polygon: 113 operations for transformation, 17 operations for 1 light source^[28] 130 floating-point operations per vertex/polygon: 113 operations for transformation, 17 operations for 1 light source^[28]]
↑ [64 MB RAM, 66 MB ROM 64 MB RAM, 66 MB ROM]
↑ [30.25 MB RAM, 256 MB ROM 30.25 MB RAM, 256 MB ROM]
↑ [16 MB RAM, 32 MB ROM 16 MB RAM, 32 MB ROM]
↑ [384 KB RAM, 96 KB cache 384 KB RAM, 96 KB cache]
↑ [32 MB per SH‑4 32 MB per SH‑4]
↑ [2× 315‑6197 2× 315‑6197]
↑ [2× 315‑6084 2× 315‑6084]
↑ [IC 44‑47^[3] IC 44‑47^[3]]
↑ [1 MB Geometry Processor, 1 MB Image Generator 1 MB Geometry Processor, 1 MB Image Generator]
↑ [8 MB per AICA 8 MB per AICA]
↑ [48 KB per SH‑4 CPU^[36] 48 KB per SH‑4 CPU^[36]]
↑ [256‑bit, 200 MHz 256‑bit, 200 MHz]
↑ [2× 32‑bit, 67 MHz 2× 32‑bit, 67 MHz]
↑ ^23.0 ^23.1 [8‑bit, 14.7456 MHz 8‑bit, 14.7456 MHz]
↑ [64‑bit, 200 MHz 64‑bit, 200 MHz]
↑ [928‑bit, 250 MHz 928‑bit, 250 MHz]
↑ [2× 32‑bit, 180/182 MHz 2× 32‑bit, 180/182 MHz]
↑ [16‑bit, 40 MHz 16‑bit, 40 MHz]
↑ [32‑bit, 180 MHz^[13] 32‑bit, 180 MHz^[13]]
↑ [192‑bit, 100 MHz, 6 ns^[29] 192‑bit, 100 MHz, 6 ns^[29]]
↑ [128‑bit 128‑bit]
↑ [64‑bit 64‑bit]
↑ [1088‑bit, 4.5 ns 1088‑bit, 4.5 ns]
↑ [315‑6197, 512‑bit, 250 MHz 315‑6197, 512‑bit, 250 MHz]
↑ [315‑6084, 256‑bit, 250 MHz 315‑6084, 256‑bit, 250 MHz]
↑
[9× 32‑bit, 200 MHz, 4.5 ns^[30]
- Framebuffer: 3.2 GB/s (4x 32‑bit,^[3] 200 MHz)
9× 32‑bit, 200 MHz, 4.5 ns^[30]
- Framebuffer: 3.2 GB/s (4x 32‑bit,^[3] 200 MHz)]
↑ [32‑bit, 100 MHz, 5 ns^[31] 32‑bit, 100 MHz, 5 ns^[31]]
↑ [32‑bit, 67 MHz, 6 ns^[37] 32‑bit, 67 MHz, 6 ns^[37]]
↑ [72‑bit, 45 ns^[32] 72‑bit, 45 ns^[32]]
↑ [16‑bit, 22.222222 MHz 16‑bit, 22.222222 MHz]
↑ [48‑bit, 22.222222 MHz 48‑bit, 22.222222 MHz]
↑ [16‑bit, 125 MHz, 8 ns^[33] 16‑bit, 125 MHz, 8 ns^[33]]
↑ [64‑bit, 100 MHz^[38] 64‑bit, 100 MHz^[38]]
↑ [2× 32‑bit, 180/182 MHz^[13]^[14]^[15] 2× 32‑bit, 180/182 MHz^[13]^[14]^[15]]
↑ [2x 32‑bit, 182 MHz^[39]^[16] 2x 32‑bit, 182 MHz^[39]^[16]]

References

↑ Brave Firefighters#Production_credits
↑ ^2.0 ^2.1 Next Generation, "April 2001" (US; 2001-03-20), page 37
↑ ^3.00 ^3.01 ^3.02 ^3.03 ^3.04 ^3.05 ^3.06 ^3.07 ^3.08 ^3.09 ^3.10 ^3.11 ^3.12 ^3.13 ^3.14 ^3.15 ^3.16 ^3.17 ^3.18 Sega Hikaru (MAME)
↑ ^4.0 ^4.1 ^4.2 ^4.3 Sega Hikaru Memory Controller (Valkyrie)
↑ Sega Hikaru AICA Sound Boards (Valkyrie)
↑ File:SH-4 Software Manual.pdf
↑ ^7.0 ^7.1 Sega Hikaru MIE (Valkyrie)
↑ Demul 0.56 (1 September 2010)
↑ ^9.0 ^9.1 Sega Hikaru (Valkyrie)
↑ ^10.0 ^10.1 File:Hikaru rombd upright.jpg
↑ File:GAL16V8 datasheet.pdf
↑ File:CY37 datasheet.pdf
↑ ^13.0 ^13.1 ^13.2 ^13.3 File:PLSI2032 datasheet.pdf
↑ ^14.0 ^14.1 File:M4A3 datasheet.pdf
↑ ^15.0 ^15.1 File:MACH111 datasheet.pdf
↑ ^16.0 ^16.1 ^16.2 Sega Hikaru GPU (Valkyrie)
↑ Sega Hikaru GPU CP (Valkyrie)
↑ Sega Hikaru Renderer (Valkyrie)
↑ ^19.0 ^19.1 File:ADV7120 datasheet.pdf
↑ Instanced Rendering
↑ Sega Hikaru GPU Private (Valkyrie)
↑ ^22.0 ^22.1 http://www.goodcowfilms.com/farm/games/news-archive/Sega%20Confirms%20Hikaru%20DOES%20Exist....htm (archive.today)
↑ ^23.0 ^23.1 File:NAOMI 1998 Press Release JP.pdf
↑ Computer Graphics: Principles and Practice (page 871)
↑ Computer Graphics: Principles and Practice (page 900)
↑ Sega NAOMI
↑ ^27.0 ^27.1 ^27.2 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (page 78)
↑ ^28.0 ^28.1 Design of Digital Systems and Devices (pages 95-97)
↑ ^29.0 ^29.1 File:HM5264 datasheet.pdf
↑ ^30.0 ^30.1 File:HY57V161610D datasheet.pdf
↑ ^31.0 ^31.1 File:UPD432232 datasheet.pdf
↑ ^32.0 ^32.1 ^32.2 File:HM62256B datasheet.pdf
↑ ^33.0 ^33.1 File:CY7C199 datasheet.pdf
↑ Planet Harriers (MAME)
↑ Hideki Sato Sega Interview (Edge)
↑ File:SH-4 32-bit CPU Core Architecture.pdf
↑ File:K4S641632 datasheet.pdf
↑ File:CY2292 datasheet.pdf
↑ http://members.iinet.net.au/~lantra9jp1/gurudumps/wip/hikaru1.jpg (Wayback Machine: 2016-02-28 17:27)

Sega arcade boards
Originating in arcades
77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 VIC Dual G80 Zaxxon VCO Object System 1 LaserDisc Appoooh Hang-On System 2 System 16 OutRun Gigas X Board Y Board System 24 System 18 System 32 Model 1 Model 2 H1 Board Model 3
Console-based hardware
84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 SG-1000 System E System C Mega-Tech System Mega Play Sega Titan Video NAOMI Hikaru NAOMI 2 Atomiswave System SP Chihiro Triforce
PC-based hardware
05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Lindbergh Europa-R RingEdge RingWide RingEdge 2 Nu Nu 1.1 Nu 2 ALLS

[Phong_shading:_2_million_polygons.2Fsec.2C_4_light_sources_per_polygon.2C_7.2C898.E2.80.9315.2C796_floating-point_operations_per_100-pixel_polygon.-26] [Phong shading: 2 million polygons/sec, 4 light sources per polygon, 7,898–15,796 floating-point operations per 100-pixel polygon. Phong shading: 2 million polygons/sec, 4 light sources per polygon, 7,898–15,796 floating-point operations per 100-pixel polygon.]

[32_pixels_per_cycle.2C.7F.27.22.60UNIQ--ref-00000048-QINU.60.22.27.7F_250_MHz-28] [32 pixels per cycle,^[26] 250 MHz 32 pixels per cycle,^[26] 250 MHz]

[3.2_GB.2Fs_framebuffer_SDRAM_bandwidth_.28double-buffered.29-29] [3.2 GB/s framebuffer SDRAM bandwidth (double-buffered) 3.2 GB/s framebuffer SDRAM bandwidth (double-buffered)]

[8_GB.2Fs_texture_bank_RAM_bandwidth_.28double-buffered.29-30] [8 GB/s texture bank RAM bandwidth (double-buffered) 8 GB/s texture bank RAM bandwidth (double-buffered)]

[7.2C898.E2.80.9315.2C796_floating-point_operations_per_50-100-pixel_polygon_for_4_light_sources_.28196_operations_setup.2C_156_operations_per_pixel.29.2C.7F.27.22.60UNIQ--ref-0000004C-QINU.60.22.27.7F_15.E2.80.9330_GFLOPS-32] [7,898–15,796 floating-point operations per 50-100-pixel polygon for 4 light sources (196 operations setup, 156 operations per pixel),^[27] 15–30 GFLOPS 7,898–15,796 floating-point operations per 50-100-pixel polygon for 4 light sources (196 operations setup, 156 operations per pixel),^[27] 15–30 GFLOPS]

[5188_floating-point_operations_per_32-pixel_polygon_for_4_light_sources_.28113_operations_setup.2C_156_operations_per_pixel_.29.7F.27.22.60UNIQ--ref-0000004E-QINU.60.22.27.7F-33] [5188 floating-point operations per 32-pixel polygon for 4 light sources (113 operations setup, 156 operations per pixel )^[27] 5188 floating-point operations per 32-pixel polygon for 4 light sources (113 operations setup, 156 operations per pixel )^[27]]

[1297_floating-point_operations_per_32-pixel_polygon_for_1_light_source_.2849_operations_setup.2C_39_operations_per_pixel.29.7F.27.22.60UNIQ--ref-00000050-QINU.60.22.27.7F-34] [1297 floating-point operations per 32-pixel polygon for 1 light source (49 operations setup, 39 operations per pixel)^[27] 1297 floating-point operations per 32-pixel polygon for 1 light source (49 operations setup, 39 operations per pixel)^[27]]

[181_floating-point_operations_per_vertex.2Fpolygon:_113_operations_for_transformation.2C_68_operations_for_4_light_sources_.2817_operations_per_light_source.29.7F.27.22.60UNIQ--ref-00000052-QINU.60.22.27.7F-36] [181 floating-point operations per vertex/polygon: 113 operations for transformation, 68 operations for 4 light sources (17 operations per light source)^[28] 181 floating-point operations per vertex/polygon: 113 operations for transformation, 68 operations for 4 light sources (17 operations per light source)^[28]]

[130_floating-point_operations_per_vertex.2Fpolygon:_113_operations_for_transformation.2C_17_operations_for_1_light_source.7F.27.22.60UNIQ--ref-00000054-QINU.60.22.27.7F-37] [130 floating-point operations per vertex/polygon: 113 operations for transformation, 17 operations for 1 light source^[28] 130 floating-point operations per vertex/polygon: 113 operations for transformation, 17 operations for 1 light source^[28]]

[64.26nbsp.3BMB_RAM.2C_66.26nbsp.3BMB_ROM-38] [64 MB RAM, 66 MB ROM 64 MB RAM, 66 MB ROM]

[30.25.26nbsp.3BMB_RAM.2C_256.26nbsp.3BMB_ROM-39] [30.25 MB RAM, 256 MB ROM 30.25 MB RAM, 256 MB ROM]

[16.26nbsp.3BMB_RAM.2C_32.26nbsp.3BMB_ROM-40] [16 MB RAM, 32 MB ROM 16 MB RAM, 32 MB ROM]

[384.26nbsp.3BKB_RAM.2C_96.26nbsp.3BKB_cache-41] [384 KB RAM, 96 KB cache 384 KB RAM, 96 KB cache]

[32.26nbsp.3BMB_per_SH.E2.80.914-43] [32 MB per SH‑4 32 MB per SH‑4]

[2.C3.97_315.E2.80.916197-45] [2× 315‑6197 2× 315‑6197]

[2.C3.97_315.E2.80.916084-46] [2× 315‑6084 2× 315‑6084]

[IC_44.E2.80.9147.7F.27.22.60UNIQ--ref-00000067-QINU.60.22.27.7F-47] [IC 44‑47^[3] IC 44‑47^[3]]

[1.26nbsp.3BMB_Geometry_Processor.2C_1.26nbsp.3BMB_Image_Generator-48] [1 MB Geometry Processor, 1 MB Image Generator 1 MB Geometry Processor, 1 MB Image Generator]

[8.26nbsp.3BMB_per_AICA-50] [8 MB per AICA 8 MB per AICA]

[48.26nbsp.3BKB_per_SH.E2.80.914_CPU.7F.27.22.60UNIQ--ref-0000007E-QINU.60.22.27.7F-56] [48 KB per SH‑4 CPU^[36] 48 KB per SH‑4 CPU^[36]]

[256.E2.80.91bit.2C_200.26nbsp.3BMHz-57] [256‑bit, 200 MHz 256‑bit, 200 MHz]

[2.C3.97.26nbsp.3B32.E2.80.91bit.2C_67.26nbsp.3BMHz-58] [2× 32‑bit, 67 MHz 2× 32‑bit, 67 MHz]

[8.E2.80.91bit.2C_14.7456.26nbsp.3BMHz-59] 23.0 ^23.1 [8‑bit, 14.7456 MHz 8‑bit, 14.7456 MHz]

[64.E2.80.91bit.2C_200.26nbsp.3BMHz-60] [64‑bit, 200 MHz 64‑bit, 200 MHz]

[928.E2.80.91bit.2C_250.26nbsp.3BMHz-61] [928‑bit, 250 MHz 928‑bit, 250 MHz]

[2.C3.97.26nbsp.3B32.E2.80.91bit.2C_180.2F182.26nbsp.3BMHz-62] [2× 32‑bit, 180/182 MHz 2× 32‑bit, 180/182 MHz]

[16.E2.80.91bit.2C_40.26nbsp.3BMHz-63] [16‑bit, 40 MHz 16‑bit, 40 MHz]

[32.E2.80.91bit.2C_180.26nbsp.3BMHz.7F.27.22.60UNIQ--ref-0000008A-QINU.60.22.27.7F-64] [32‑bit, 180 MHz^[13] 32‑bit, 180 MHz^[13]]

[192.E2.80.91bit.2C_100.26nbsp.3BMHz.2C_6.26nbsp.3B.5B.5Bwikipedia:Nanosecond.7Cns.5D.5D.7F.27.22.60UNIQ--ref-0000008F-QINU.60.22.27.7F-65] [192‑bit, 100 MHz, 6 ns^[29] 192‑bit, 100 MHz, 6 ns^[29]]

[128.E2.80.91bit-66] [128‑bit 128‑bit]

[64.E2.80.91bit-67] [64‑bit 64‑bit]

[1088.E2.80.91bit.2C_4.5.26nbsp.3Bns-68] [1088‑bit, 4.5 ns 1088‑bit, 4.5 ns]

[315.E2.80.916197.2C_512.E2.80.91bit.2C_250.26nbsp.3BMHz-69] [315‑6197, 512‑bit, 250 MHz 315‑6197, 512‑bit, 250 MHz]

[315.E2.80.916084.2C_256.E2.80.91bit.2C_250.26nbsp.3BMHz-70] [315‑6084, 256‑bit, 250 MHz 315‑6084, 256‑bit, 250 MHz]

[9.C3.97.26nbsp.3B32.E2.80.91bit.2C_200.26nbsp.3BMHz.2C_4.5.26nbsp.3Bns.7F.27.22.60UNIQ--ref-00000098-QINU.60.22.27.7F.0A.2AFramebuffer:_3.2_GB.2Fs_.284x_32.E2.80.91bit.2C.7F.27.22.60UNIQ--ref-00000099-QINU.60.22.27.7F_200_MHz.29-71] [9× 32‑bit, 200 MHz, 4.5 ns^[30]
Framebuffer: 3.2 GB/s (4x 32‑bit,^[3] 200 MHz)
9× 32‑bit, 200 MHz, 4.5 ns^[30]
Framebuffer: 3.2 GB/s (4x 32‑bit,^[3] 200 MHz)]

[36] Framebuffer: 3.2 GB/s (4x 32‑bit,^[3] 200 MHz)

[37] Framebuffer: 3.2 GB/s (4x 32‑bit,^[3] 200 MHz)]

[32.E2.80.91bit.2C_100.26nbsp.3BMHz.2C_5.26nbsp.3Bns.7F.27.22.60UNIQ--ref-0000009D-QINU.60.22.27.7F-72] [32‑bit, 100 MHz, 5 ns^[31] 32‑bit, 100 MHz, 5 ns^[31]]

[32.E2.80.91bit.2C_67.26nbsp.3BMHz.2C_6.26nbsp.3Bns.7F.27.22.60UNIQ--ref-000000A1-QINU.60.22.27.7F-74] [32‑bit, 67 MHz, 6 ns^[37] 32‑bit, 67 MHz, 6 ns^[37]]

[72.E2.80.91bit.2C_45.26nbsp.3Bns.7F.27.22.60UNIQ--ref-000000A5-QINU.60.22.27.7F-75] [72‑bit, 45 ns^[32] 72‑bit, 45 ns^[32]]

[16.E2.80.91bit.2C_22.222222.26nbsp.3BMHz-76] [16‑bit, 22.222222 MHz 16‑bit, 22.222222 MHz]

[48.E2.80.91bit.2C_22.222222.26nbsp.3BMHz-77] [48‑bit, 22.222222 MHz 48‑bit, 22.222222 MHz]

[16.E2.80.91bit.2C_125.26nbsp.3BMHz.2C_8.26nbsp.3Bns.7F.27.22.60UNIQ--ref-000000AC-QINU.60.22.27.7F-78] [16‑bit, 125 MHz, 8 ns^[33] 16‑bit, 125 MHz, 8 ns^[33]]

[64.E2.80.91bit.2C_100.26nbsp.3BMHz.7F.27.22.60UNIQ--ref-000000B1-QINU.60.22.27.7F-80] [64‑bit, 100 MHz^[38] 64‑bit, 100 MHz^[38]]

[2.C3.97.26nbsp.3B32.E2.80.91bit.2C_180.2F182.26nbsp.3BMHz.7F.27.22.60UNIQ--ref-000000B5-QINU.60.22.27.7F.7F.27.22.60UNIQ--ref-000000B8-QINU.60.22.27.7F.7F.27.22.60UNIQ--ref-000000BB-QINU.60.22.27.7F-81] [2× 32‑bit, 180/182 MHz^[13]^[14]^[15] 2× 32‑bit, 180/182 MHz^[13]^[14]^[15]]

[2x_32.E2.80.91bit.2C_182.26nbsp.3BMHz.7F.27.22.60UNIQ--ref-000000BD-QINU.60.22.27.7F.5B.5BCategory:External_JPEG_reference.5D.5D.7F.27.22.60UNIQ--ref-000000BE-QINU.60.22.27.7F-83] [2x 32‑bit, 182 MHz^[39]^[16] 2x 32‑bit, 182 MHz^[39]^[16]]

[Brave_Firefighters.23Production_credits-1] Brave Firefighters#Production_credits

[:File:NextGeneration_US_76.pdf_p37-2] 2.0 ^2.1 Next Generation, "April 2001" (US; 2001-03-20), page 37

[.5Bhttps:.2F.2Fgithub.com.2Fmamedev.2Fmame.2Fblob.2Fmaster.2Fsrc.2Fmame.2Fdrivers.2Fhikaru.cpp_Sega_Hikaru_.28MAME.29.5D-3] 3.00 ^3.01 ^3.02 ^3.03 ^3.04 ^3.05 ^3.06 ^3.07 ^3.08 ^3.09 ^3.10 ^3.11 ^3.12 ^3.13 ^3.14 ^3.15 ^3.16 ^3.17 ^3.18 Sega Hikaru (MAME)

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-memctl.c_Sega_Hikaru_Memory_Controller_.28Valkyrie.29.5D-4] 4.0 ^4.1 ^4.2 ^4.3 Sega Hikaru Memory Controller (Valkyrie)

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-aica.c_Sega_Hikaru_AICA_Sound_Boards_.28Valkyrie.29.5D-5] Sega Hikaru AICA Sound Boards (Valkyrie)

[:File:SH-4_Software_Manual.pdf_p-6] File:SH-4 Software Manual.pdf

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-mie.c_Sega_Hikaru_MIE_.28Valkyrie.29.5D-7] 7.0 ^7.1 Sega Hikaru MIE (Valkyrie)

[.5Bhttp:.2F.2Fdemul.emulation64.com_Demul_0.56_.281_September_2010.29.5D-8] Demul 0.56 (1 September 2010)

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru.c_Sega_Hikaru_.28Valkyrie.29.5D-9] 9.0 ^9.1 Sega Hikaru (Valkyrie)

[:File:Hikaru_rombd_upright.jpg_p-10] 10.0 ^10.1 File:Hikaru rombd upright.jpg

[:File:GAL16V8_datasheet.pdf_p-11] File:GAL16V8 datasheet.pdf

[:File:CY37_datasheet.pdf_p-12] File:CY37 datasheet.pdf

[:File:PLSI2032_datasheet.pdf_p-13] 13.0 ^13.1 ^13.2 ^13.3 File:PLSI2032 datasheet.pdf

[:File:M4A3_datasheet.pdf_p-14] 14.0 ^14.1 File:M4A3 datasheet.pdf

[:File:MACH111_datasheet.pdf_p-15] 15.0 ^15.1 File:MACH111 datasheet.pdf

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-gpu.c_Sega_Hikaru_GPU_.28Valkyrie.29.5D-16] 16.0 ^16.1 ^16.2 Sega Hikaru GPU (Valkyrie)

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-gpu-cp.c_Sega_Hikaru_GPU_CP_.28Valkyrie.29.5D-17] Sega Hikaru GPU CP (Valkyrie)

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-renderer.c_Sega_Hikaru_Renderer_.28Valkyrie.29.5D-18] Sega Hikaru Renderer (Valkyrie)

[:File:ADV7120_datasheet.pdf_p-19] 19.0 ^19.1 File:ADV7120 datasheet.pdf

[.5Bhttp:.2F.2Fogldev.atspace.co.uk.2Fwww.2Ftutorial33.2Ftutorial33.html_Instanced_Rendering.5D-20] Instanced Rendering

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-gpu-private.h_Sega_Hikaru_GPU_Private_.28Valkyrie.29.5D-21] Sega Hikaru GPU Private (Valkyrie)

[http:.2F.2Farchive.is.2FnyrP3-22] 22.0 ^22.1 http://www.goodcowfilms.com/farm/games/news-archive/Sega%20Confirms%20Hikaru%20DOES%20Exist....htm (archive.today)

[:File:NAOMI_1998_Press_Release_JP.pdf_p-23] 23.0 ^23.1 File:NAOMI 1998 Press Release JP.pdf

[.5Bhttps:.2F.2Fbooks.google.co.uk.2Fbooks.3Fid.3D-4ngT05gmAQC.26pg.3DPA871_.27.27Computer_Graphics:_Principles_and_Practice.27.27_.28page_871.29.5D-24] Computer Graphics: Principles and Practice (page 871)

[.5Bhttps:.2F.2Fbooks.google.co.uk.2Fbooks.3Fid.3D-4ngT05gmAQC.26pg.3DPA900_.27.27Computer_Graphics:_Principles_and_Practice.27.27_.28page_900.29.5D-25] Computer Graphics: Principles and Practice (page 900)

[Sega_NAOMI-27] Sega NAOMI

[.5Bhttps:.2F.2Fbooks.google.co.uk.2Fbooks.3Fid.3DKQnejL0ivfQC.26pg.3DPA78_.27.27Computer_Vision_and_Graphics:_International_Conference.2C_ICCVG_2004.2C_Warsaw.2C_Poland.2C_September_2004.2C_Proceedings.27.27_.28page_78.29.5D-31] 27.0 ^27.1 ^27.2 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (page 78)

[.5Bhttps:.2F.2Fbooks.google.co.uk.2Fbooks.3Fid.3DiAvHt5RCHbMC.26pg.3DPA95_.27.27Design_of_Digital_Systems_and_Devices.27.27_.28pages_95-97.29.5D-35] 28.0 ^28.1 Design of Digital Systems and Devices (pages 95-97)

[:File:HM5264_datasheet.pdf_p-42] 29.0 ^29.1 File:HM5264 datasheet.pdf

[:File:HY57V161610D_datasheet.pdf_p-44] 30.0 ^30.1 File:HY57V161610D datasheet.pdf

[:File:UPD432232_datasheet.pdf_p-49] 31.0 ^31.1 File:UPD432232 datasheet.pdf

[:File:HM62256B_datasheet.pdf_p-51] 32.0 ^32.1 ^32.2 File:HM62256B datasheet.pdf

[:File:CY7C199_datasheet.pdf_p-52] 33.0 ^33.1 File:CY7C199 datasheet.pdf

[.5Bhttp:.2F.2Fwww.mamedb.com.2Fgame.2Fpharrier.html_Planet_Harriers_.28MAME.29.5D-53] Planet Harriers (MAME)

[.5Bhttp:.2F.2Ffarm6.staticflickr.com.2F5471.2F12172411045_18bfc5912f_c.jpg_Hideki_Sato_Sega_Interview_.28Edge.29.5D-54] Hideki Sato Sega Interview (Edge)

[:File:SH-4_32-bit_CPU_Core_Architecture.pdf_p-55] File:SH-4 32-bit CPU Core Architecture.pdf

[:File:K4S641632_datasheet.pdf_p-73] File:K4S641632 datasheet.pdf

[:File:CY2292_datasheet.pdf_p-79] File:CY2292 datasheet.pdf

[https:.2F.2Fweb.archive.org.2Fweb.2F20160228172702.2Fhttp:.2F.2Fmembers.iinet.net.au.2F.7Elantra9jp1.2Fgurudumps.2Fwip.2Fhikaru1.jpg-82] ttp://members.iinet.net.au/~lantra9jp1/gurudumps/wip/hikaru1.jpg (Wayback Machine: 2016-02-28 17:27)

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@@ Line 4: / Line 4: @@
 | imgwidth=320
 | name=
-| maker=[[Sega]]
+| maker=[[Sega Enterprises, Ltd.]]
 | distributor=
 | variants=
@@ Line 15: / Line 15: @@
 }}
 }}
-The '''Sega Hikaru''' is a successor of the [[Sega NAOMI]] and [[Sega Model 3]] [[arcade]] systems that was developed in 1998 and debuted in 1999. The Hikaru was used for a handful of deluxe dedicated-cabinet games, beginning with 1999's ''[[Brave Fire Fighters]]'', in which the flame and water effects were largely a showpiece for the hardware.
+The '''Sega Hikaru''' is a successor of the [[Sega NAOMI]] and [[Sega Model 3]] [[arcade]] systems that was developed in 1998, most likely by Hard Ware R&D Team 3{{intref|Brave Firefighters#Production_credits}} and debuted in 1999. The Hikaru was used for a handful of deluxe dedicated-cabinet games, beginning with 1999's ''[[Brave Fire Fighters]]'', in which the flame and water effects were largely a showpiece for the hardware.
 It was significantly more powerful and expensive than the NAOMI. The Hikaru featured a custom Sega GPU with advanced graphical capabilities, additional CPU and sound processors, various custom processors, increased memory, and faster bandwidth. It was the first game platform capable of effective hardware [http://www.giantbomb.com/phong-shading/3015-7940/ Phong shading], the most intensive form of shading at the time, and was capable of the most complex lighting and particle effects of its time.
-It was the most powerful game system of its time (''[[Planet Harriers]]'' in particular was regarded as having the best video game graphics at the time), but it was very expensive and difficult to program. Since it was comparatively expensive to produce, [[Sega]] soon abandoned the Hikaru in favor of continued NAOMI development. It was succeeded by the [[Sega NAOMI 2|NAOMI 2]], which was quite not as powerful but more affordable.{{fileref|NextGeneration US 76.pdf|page=37}}
+It was the most powerful game system of its time (''[[Planet Harriers]]'', for example, was regarded as having the best video game graphics at the time), but it was very expensive and difficult to program. Since it was comparatively expensive to produce, [[Sega]] soon abandoned the Hikaru in favor of continued NAOMI development. It was succeeded by the more affordable [[Sega NAOMI 2|NAOMI 2]].{{magref|nextgeneration|76|37}}
 ==Technical specifications==
 {{multicol|
 * Board composition: Main Board, ROM Board, AICA Sound Board, I/O Board, Filter Board, Network Board{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
-** Optional: Sound Board 2{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-memctl.c Sega Hikaru Memory Controller (Valkyrie)]}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-aica.c Sega Hikaru AICA Sound Boards (Valkyrie)]}}
+:* Optional: Sound Board 2{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-memctl.c Sega Hikaru Memory Controller (Valkyrie)]}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-aica.c Sega Hikaru AICA Sound Boards (Valkyrie)]}}
 * [[wikipedia:Operating system|Operating systems]]:
-**Sega native operating system
+:*Sega native operating system
-**Custom [[Windows CE]], with [[wikipedia:DirectX|DirectX 6.0]], [[wikipedia:Direct3D|Direct3D]] and [[wikipedia:OpenGL|OpenGL]] support
+:*Custom [[Windows CE]], with [[wikipedia:DirectX|DirectX 6.0]], [[wikipedia:Direct3D|Direct3D]] and [[wikipedia:OpenGL|OpenGL]] support
 * Extensions: communication, 4‑channel surround audio, PCI, [[wikipedia:MIDI|MIDI]], RS‑232C
 * Connection: [[JAMMA Show|JAMMA]] Video compliant, [[Dreamcast VGA Adapter|VGA]]
@@ Line 35: / Line 35: @@
 {{multicol|
 * Main CPU: 2× [[Hitachi]] [[SH‑4]] @ 200&nbsp;MHz{{fileref|SH-4 Software Manual.pdf}}
-** Units: 2×&nbsp;[[wikipedia:128-bit|128‑bit]] [[wikipedia:SIMD|SIMD]] vector units with graphic functions, 2×&nbsp;64‑bit [[wikipedia:Floating-point unit|floating‑point units]], 2×&nbsp;32‑bit fixed‑point units
+:* Units: 2×&nbsp;[[wikipedia:128-bit|128‑bit]] [[wikipedia:SIMD|SIMD]] vector units with graphic functions, 2×&nbsp;64‑bit [[wikipedia:Floating-point unit|floating‑point units]], 2×&nbsp;32‑bit fixed‑point units
-** Bus width: 256‑bit (2×&nbsp;128‑bit) internal, 128‑bit (2×&nbsp;64‑bit) external
+:* Bus width: 256‑bit (2×&nbsp;128‑bit) internal, 128‑bit (2×&nbsp;64‑bit) external
-** Fixed‑point performance: 720&nbsp;[[wikipedia:Instructions per second|MIPS]]
+:* Fixed‑point performance: 720&nbsp;[[wikipedia:Instructions per second|MIPS]]
-** Floating‑point performance: 2.8&nbsp;[[wikipedia:FLOPS|GFLOPS]]
+:* Floating‑point performance: 2.8&nbsp;[[wikipedia:FLOPS|GFLOPS]]
-** Note: With Sega Custom 3D GPU, the SH‑4's 128‑bit SIMD matrix unit can be dedicated to game physics, artificial intelligence, collision detection, overall game code, or additional graphical performance.
+:* Note: With Sega Custom 3D GPU, the SH‑4's 128‑bit SIMD matrix unit can be dedicated to game physics, artificial intelligence, collision detection, overall game code, or additional graphical performance.
 * MIE bridge MCU: Sega 315‑6146 Maple‑JVS MCU ([[Zilog]] [[Z80]]){{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-mie.c Sega Hikaru MIE (Valkyrie)]}}{{ref|[http://demul.emulation64.com Demul 0.56 (1 September 2010)]}} @ 14.7456&nbsp;MHz{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}} (8/16‑bit instructions, 8‑bit bus, 2.14&nbsp;MIPS)
 * Memory controllers: 2× Sega 315‑6154 Memory Controller @ 200&nbsp;MHz (2× 32‑bit, DMA capabilities){{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-memctl.c Sega Hikaru Memory Controller (Valkyrie)]}}{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru.c Sega Hikaru (Valkyrie)]}}
 * Main Board [[wikipedia:Programmable logic device|PLD]]: 27&nbsp;units, 928‑bit (25&nbsp;GB/sec) internal, 640‑bit (21&nbsp;GB/sec) external{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{fileref|Hikaru rombd upright.jpg}}
-** 2× Sega PAL (Lattice GAL16V8) [[wikipedia:Generic array logic|GAL]] @ 250&nbsp;MHz: 16&nbsp;units (2×&nbsp;8&nbsp;units), 128‑bit (2×&nbsp;64‑bit), DMA control, graphics processing,{{fileref|GAL16V8 datasheet.pdf}} 4&nbsp;GB/sec
+:* 2× Sega PAL (Lattice GAL16V8) [[wikipedia:Generic array logic|GAL]] @ 250&nbsp;MHz: 16&nbsp;units (2×&nbsp;8&nbsp;units), 128‑bit (2×&nbsp;64‑bit), DMA control, graphics processing,{{fileref|GAL16V8 datasheet.pdf}} 4&nbsp;GB/sec
-** Sega 315‑6083A, 315‑6085, 315‑6086 @ 250&nbsp;MHz: 3&nbsp;units, 384‑bit (3×&nbsp;128‑bit), 12&nbsp;GB/sec
+:* Sega 315‑6083A, 315‑6085, 315‑6086 @ 250&nbsp;MHz: 3&nbsp;units, 384‑bit (3×&nbsp;128‑bit), 12&nbsp;GB/sec
-** Sega 315‑6202 (Lattice CY37128) [[wikipedia:Complex programmable logic device|CPLD]] @ 167&nbsp;MHz: 8&nbsp;units, 416‑bit (8×&nbsp;52‑bit) internal (9&nbsp;GB/sec), 128‑bit (8× 16‑bit) external (3&nbsp;GB/sec){{fileref|CY37 datasheet.pdf}}
+:* Sega 315‑6202 (Lattice CY37128) [[wikipedia:Complex programmable logic device|CPLD]] @ 167&nbsp;MHz: 8&nbsp;units, 416‑bit (8×&nbsp;52‑bit) internal (9&nbsp;GB/sec), 128‑bit (8× 16‑bit) external (3&nbsp;GB/sec){{fileref|CY37 datasheet.pdf}}
 * Network Board processors:{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
-** Network CPU: [[Motorola 68000]] @ 40&nbsp;MHz (16/32‑bit instructions, 16‑bit bus, 7&nbsp;MIPS){{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
+:* Network CPU: [[Motorola 68000]] @ 40&nbsp;MHz (16/32‑bit instructions, 16‑bit bus, 7&nbsp;MIPS){{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
-** Network PLD: [[wikipedia:Field-programmable gate array|FPGA]] @ 180&nbsp;MHz (32‑bit),{{fileref|PLSI2032 datasheet.pdf}} 3× [[wikipedia:Programmable Array Logic|PAL]] @ 40&nbsp;MHz, Sega 315‑5804 [[wikipedia:Complex programmable logic device|CPLD]] @ 40&nbsp;MHz
+:* Network PLD: [[wikipedia:Field-programmable gate array|FPGA]] @ 180&nbsp;MHz (32‑bit),{{fileref|PLSI2032 datasheet.pdf}} 3× [[wikipedia:Programmable Array Logic|PAL]] @ 40&nbsp;MHz, Sega 315‑5804 [[wikipedia:Complex programmable logic device|CPLD]] @ 40&nbsp;MHz
-** Network processors: 2× Sega 315‑5917 @ 40&nbsp;MHz
+:* Network processors: 2× Sega 315‑5917 @ 40&nbsp;MHz
 * ROM Board processors:{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
-** ROM Board [[wikipedia:Programmable logic device|PLD]]: [[wikipedia:Field-programmable gate array|FPGA]] @ 180&nbsp;MHz (32‑bit),{{fileref|PLSI2032 datasheet.pdf}} CPLD/[[wikipedia:Programmable Array Logic|PAL]] @ 182&nbsp;MHz (32‑bit){{fileref|M4A3 datasheet.pdf}}{{fileref|MACH111 datasheet.pdf}}
+:* ROM Board [[wikipedia:Programmable logic device|PLD]]: [[wikipedia:Field-programmable gate array|FPGA]] @ 180&nbsp;MHz (32‑bit),{{fileref|PLSI2032 datasheet.pdf}} CPLD/[[wikipedia:Programmable Array Logic|PAL]] @ 182&nbsp;MHz (32‑bit){{fileref|M4A3 datasheet.pdf}}{{fileref|MACH111 datasheet.pdf}}
-** Security [[wikipedia:Integrated circuit|IC]]: Sega 315-5881 @ 28&nbsp;MHz
+:* Security [[wikipedia:Integrated circuit|IC]]: Sega 315-5881 @ 28&nbsp;MHz
 }}
@@ Line 58: / Line 58: @@
 {{multicol|
 * [[wikipedia:Sound chip|Sound engine]]: 2× [[Yamaha Super Intelligent Sound Processor|Yamaha AICA Super Intelligent Sound Processor]] (315‑6232) @ 67&nbsp;MHz
-** Internal CPU: 2× 32‑bit [[wikipedia:ARM7|ARM7]] RISC CPU @ 45&nbsp;MHz
+:* Internal CPU: 2× 32‑bit [[wikipedia:ARM7|ARM7]] RISC CPU @ 45&nbsp;MHz
-** CPU performance: 34&nbsp;MIPS (2×&nbsp;17&nbsp;MIPS)
+:* CPU performance: 34&nbsp;MIPS (2×&nbsp;17&nbsp;MIPS)
-** [[Pulse-code modulation|PCM/ADPCM]]: 16‑bit [[wikipedia:Audio bit depth|depth]], 48&nbsp;kHz [[wikipedia:Sampling rate|sampling rate]] ([[wikipedia:DVD-Audio|DVD quality]]), 128&nbsp;channels
+:* [[Pulse-code modulation|PCM/ADPCM]]: 16‑bit [[wikipedia:Audio bit depth|depth]], 48&nbsp;kHz [[wikipedia:Sampling rate|sampling rate]] ([[wikipedia:DVD-Audio|DVD quality]]), 128&nbsp;channels
-** Bus width: 32‑bit (2× 16‑bit)
+:* Bus width: 32‑bit (2× 16‑bit)
-** Other features: DSP, sound [[wikipedia:Synthesizer|synthesizer]]
+:* Other features: DSP, sound [[wikipedia:Synthesizer|synthesizer]]
 }}
@@ Line 71: / Line 71: @@
 * Graphics Engine GPU: [[Sega]] Custom 3D GPU @ 250&nbsp;MHz
 * GPU core processors: 7&nbsp;processors{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{fileref|Hikaru rombd upright.jpg}}
-** 2× Sega GPU 15 CP Command Processors (315‑6197) @ 250&nbsp;MHz: 512‑bit (2×&nbsp;256‑bit), Geometry Processor
+:* 2× Sega GPU 15 CP Command Processors (315‑6197) @ 250&nbsp;MHz: 512‑bit (2×&nbsp;256‑bit), Geometry Processor
-** Sega GPU 1A Image Generator (315‑6087) @ 250&nbsp;MHz: 128‑bit, rasterizer/renderer{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-renderer.c Sega Hikaru Renderer (Valkyrie)]}}
+:* Sega GPU 1A Image Generator (315‑6087) @ 250&nbsp;MHz: 128‑bit, rasterizer/renderer{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-renderer.c Sega Hikaru Renderer (Valkyrie)]}}
-** 2× Sega GPU DMA controllers (315‑6084) @ 250&nbsp;MHz: 256‑bit (2×&nbsp;128‑bit)
+:* 2× Sega GPU DMA controllers (315‑6084) @ 250&nbsp;MHz: 256‑bit (2×&nbsp;128‑bit)
-** 2× Analog Devices ADV7120 Video [[wikipedia:Digital-to-analog converter|DAC]] @ 80&nbsp;MHz: 48‑bit (2×&nbsp;24‑bit){{fileref|ADV7120 datasheet.pdf}}
+:* 2× Analog Devices ADV7120 Video [[wikipedia:Digital-to-analog converter|DAC]] @ 80&nbsp;MHz: 48‑bit (2×&nbsp;24‑bit){{fileref|ADV7120 datasheet.pdf}}
 * GPU Geometry Processors: 2× Sega GPU 15 CP Command Processors
-** Hardware T&L: Transform, clipping, lighting
+:* Hardware T&L: Transform, clipping, lighting
-** Materials: [[wikipedia:Flat shading|Flat shading]], [[wikipedia:Gouraud shading|Gouraud shading]], [[wikipedia:Phong shading|Phong shading]], diffuse, ambient, specular, unlit
+:* Materials: [[wikipedia:Flat shading|Flat shading]], [[wikipedia:Gouraud shading|Gouraud shading]], [[wikipedia:Phong shading|Phong shading]], diffuse, ambient, specular, unlit
-** Fog: Color, transparency, density, depth blend, translucency
+:* Fog: Color, transparency, density, depth blend, translucency
-** Rendering: Double‑buffered 3D rendering (odd & even frames), [[wikipedia:Depth perception|depth cueing]], depth buffer, depth bias, [[wikipedia:Back-face culling|face culling]], static meshes, dynamic meshes
+:* Rendering: Double‑buffered 3D rendering (odd & even frames), [[wikipedia:Depth perception|depth cueing]], depth buffer, depth bias, [[wikipedia:Back-face culling|face culling]], static meshes, dynamic meshes
-** Shading: Flat&nbsp;shading, Gouraud&nbsp;shading, [http://www.giantbomb.com/phong-shading/3015-7940/ Phong&nbsp;shading], diffuse, ambient, specular, linear
+:* Shading: Flat&nbsp;shading, Gouraud&nbsp;shading, [http://www.giantbomb.com/phong-shading/3015-7940/ Phong&nbsp;shading], diffuse, ambient, specular, linear
-** Modelview matrix: Instanced drawing, multiple instances, shared attributes between models,{{ref|[http://ogldev.atspace.co.uk/www/tutorial33/tutorial33.html Instanced Rendering]}} modelview stack
+:* Modelview matrix: Instanced drawing, multiple instances, shared attributes between models,{{ref|[http://ogldev.atspace.co.uk/www/tutorial33/tutorial33.html Instanced Rendering]}} modelview stack
-** Object memory: 8 viewports, 256 modelviews, 16,384 materials (256 [[wikipedia:Level of detail|LOD]] levels), 16,384 textures/texheads (256 LOD levels), 1024&nbsp;lights (256 light sets)
+:* Object memory: 8 viewports, 256 modelviews, 16,384 materials (256 [[wikipedia:Level of detail|LOD]] levels), 16,384 textures/texheads (256 LOD levels), 1024&nbsp;lights (256 light sets)
 * GPU [[wikipedia:Direct memory access|DMA]] controllers: 2× Sega GPU DMA controllers
-** GPU IDMA (Indirect DMA) controller: Loads texture data from MaskROM (via external bus) into texture banks (with metadata), allows CPU access to texture banks
+:* GPU IDMA (Indirect DMA) controller: Loads texture data from MaskROM (via external bus) into texture banks (with metadata), allows CPU access to texture banks
-** DMA controller: Moves textures around in framebuffer, transfers bitmap data to bitmap layers, allows CPU access to framebuffer
+:* DMA controller: Moves textures around in framebuffer, transfers bitmap data to bitmap layers, allows CPU access to framebuffer
 * [[Palette|Color depth]]: [[wikipedia:32-bit color|32‑bit]] [[wikipedia:RGBA color space|ARGB]], 16,777,216 colors ([[wikipedia:24-bit color|24‑bit color]]) with 8‑bit (256 levels) [[wikipedia:Alpha compositing|alpha blending]], [[wikipedia:YUV|YUV]] and RGB color space, [[wikipedia:Chroma key|color key]] overlay
 * Display [[resolution]]: 31&nbsp;kHz [[wikipedia:Horizontal scan rate|horizontal sync]], 60&nbsp;Hz [[wikipedia:Refresh rate|refresh rate]], 80&nbsp;MHz Video DAC, [[JAMMA Show|JAMMA]]/[[Dreamcast VGA Adapter|VGA]] output, [[wikipedia:Progressive scan|progressive scan]]{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{fileref|ADV7120 datasheet.pdf}}
-** Single monitor display: 496×384 to 800×608 (default 640×480)
+:* Single monitor display: 496×384 to 800×608 (default 640×480)
-** [[wikipedia:Multi-monitor|Dual monitor]] display: 992×384 to 1600×608 (default 1280×480)
+:* [[wikipedia:Multi-monitor|Dual monitor]] display: 992×384 to 1600×608 (default 1280×480)
-** Video output: 496×384 to 1968×1080 (default 640×480)
+:* Video output: 496×384 to 1968×1080 (default 640×480)
-** Framebuffer: 496×384 to 2048×2048 (default 2048×2048){{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
+:* Framebuffer: 496×384 to 2048×2048 (default 2048×2048){{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
 * [[wikipedia:Computer graphics lighting|Lighting]]: 1024&nbsp;lights per scene, 4&nbsp;lights per polygon, 256 light sets per scene (4&nbsp;lights per set), 8 window surfaces
-** Light types: Diffuse, ambient, specular, horizontal, spot
+:* Light types: Diffuse, ambient, specular, horizontal, spot
-** Emission types: Constant, linear, infinite linear, square, reciprocal, reciprocal squared
+:* Emission types: Constant, linear, infinite linear, square, reciprocal, reciprocal squared
-** Object types: Lights (with individual position, direction and emission properties), lightsets (a set of up to 4&nbsp;lights that share a mesh)
+:* Object types: Lights (with individual position, direction and emission properties), lightsets (a set of up to 4&nbsp;lights that share a mesh)
 * GPU capabilities: 2 [[wikipedia:Bitmap|bitmap]] layers, calendar, 16,384&nbsp;vertices per mesh,{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu-private.h Sega Hikaru GPU Private (Valkyrie)]}} hidden surface removal, deferred rendering
-** [[wikipedia:Framebuffer|Framebuffer]]: 2048×2048 sheet (can be partitioned into framebuffer, tile data, and/or 1‑2 bitmap layers), handled by 2 GPU 1A Image Generator rasterizers/renderers (double‑buffering), accessible by DMA controller
+:* [[wikipedia:Framebuffer|Framebuffer]]: 2048×2048 sheet (can be partitioned into framebuffer, tile data, and/or 1‑2 bitmap layers), handled by 2 GPU 1A Image Generator rasterizers/renderers (double‑buffering), accessible by DMA controller
-** Effects: [[wikipedia:Stencil buffer|Stencil]], shadows, motion blur, particle effects, fire effects, [[wikipedia:Fluid simulation|water effects]],{{ref|[http://www.goodcowfilms.com/farm/games/news-archive/Sega%20Confirms%20Hikaru%20DOES%20Exist....htm Sega Confirms Hikaru Does Exist (November 24, 1999)]}} fog, alpha blending, anti‑aliasing, specular effects,{{fileref|NAOMI 1998 Press Release JP.pdf}}
+:* Effects: [[wikipedia:Stencil buffer|Stencil]], shadows, motion blur, particle effects, fire effects, [[wikipedia:Fluid simulation|water effects]],{{ref|http://archive.is/nyrP3|http://www.goodcowfilms.com/farm/games/news-archive/Sega%20Confirms%20Hikaru%20DOES%20Exist....htm}} fog, alpha blending, anti‑aliasing, specular effects,{{fileref|NAOMI 1998 Press Release JP.pdf}}
-** Features: [[wikipedia:Tiled rendering|Tiled rendering]], [[wikipedia:Deferred shading|deferred rendering]], [[wikipedia:Back-face culling|back‑face culling]], [[wikipedia:Hidden surface determination|hidden surface removal]]
+:* Features: [[wikipedia:Tiled rendering|Tiled rendering]], [[wikipedia:Deferred shading|deferred rendering]], [[wikipedia:Back-face culling|back‑face culling]], [[wikipedia:Hidden surface determination|hidden surface removal]]
-** [[wikipedia:Phong shading|Phong shading]]: Per‑[[pixel]] lighting/shading computation processed by rasterization pipeline,{{ref|1=[https://books.google.co.uk/books?id=-4ngT05gmAQC&pg=PA871 Computer Graphics: Principles and Practice (Page 871)]}} deferred rendering can prevent shading of overdrawn pixels to maximize rendering bandwidth,{{ref|1=[https://books.google.co.uk/books?id=-4ngT05gmAQC&pg=PA900 Computer Graphics: Principles and Practice (Page 900)]}} all compute units could be used as shader units to maximize Phong shading performance
+:* [[wikipedia:Phong shading|Phong shading]]: Per‑[[pixel]] lighting/shading computation processed by rasterization pipeline,{{ref|1=[https://books.google.co.uk/books?id=-4ngT05gmAQC&pg=PA871 ''Computer Graphics: Principles and Practice'' (page 871)]}} deferred rendering can prevent shading of overdrawn pixels to maximize rendering bandwidth,{{ref|1=[https://books.google.co.uk/books?id=-4ngT05gmAQC&pg=PA900 ''Computer Graphics: Principles and Practice'' (page 900)]}} all compute units could be used as shader units to maximize Phong shading performance
 * Texture capabilities: 1×1 to 2048×2048 texture sizes, [[wikipedia:Mipmap|mipmapping]], mipmap trees, texture panning, multi‑texturing, [[wikipedia:Bump mapping|bump mapping]], [[wikipedia:Normal mapping|normal mapping]], texture filtering, bilinear filtering, trilinear filtering, [[wikipedia:Reflection mapping|environment mapping]]{{fileref|NAOMI 1998 Press Release JP.pdf}}
-** Texture banks: 2 texture banks (stored as 2×&nbsp;2048×1024 sheets), stores textures from MaskROM (with 16‑byte metadata per texture in Command RAM)
+:* Texture banks: 2 texture banks (stored as 2×&nbsp;2048×1024 sheets), stores textures from MaskROM (with 16‑byte metadata per texture in Command RAM)
-* Floating-point performance: 15&ndash;30 GFLOPS{{ref|Phong shading: 2 million polygons/sec, 4 light sources per polygon, 7,898–15,796 floating-point operations per 100-pixel polygon, 15–30 GFLOPS|group=n}}
+* Floating-point performance: 15 GFLOPS (estimate){{ref|Phong shading: 2 million polygons/sec, 4 light sources per polygon, 7,898–15,796 floating-point operations per 100-pixel polygon.|group=n}}
 * Rendering [[fillrate]]:
-** Opaque polygons: 8 [[Pixel|GPixels/s]]{{ref|32 pixels per cycle,{{intref|Sega NAOMI}} 250 MHz|group=n}}
+:* Opaque polygons: 8 [[Pixel|GPixels/s]]{{ref|32 pixels per cycle,{{intref|Sega NAOMI}} 250 MHz|group=n}}
-** Translucent polygons: 1.6 GPixels/s (8bpp), 800 [[Pixel|MPixels/s]] (16bpp), 530 MPixels/s (24bpp){{ref|3.2 GB/s framebuffer SDRAM bandwidth (double-buffered)|group=n}}
+:* Translucent polygons: 1.6 GPixels/s (8bpp), 800 [[Pixel|MPixels/s]] (16bpp), 530 MPixels/s (24bpp){{ref|3.2 GB/s framebuffer SDRAM bandwidth (double-buffered)|group=n}}
 * Texture fillrate:
-** Opaque polygons: 8 [[Texel|GTexels/s]]
+:* Opaque polygons: 8 [[Texel|GTexels/s]]
-** Translucent polygons: 4 GTexels/s (8bpp), 2 GTexels/s (16bpp), 1.3 GTexels/s (24bpp){{ref|8 GB/s texture bank RAM bandwidth (double-buffered)|group=n}}
+:* Translucent polygons: 4 GTexels/s (8bpp), 2 GTexels/s (16bpp), 1.3 GTexels/s (24bpp){{ref|8 GB/s texture bank RAM bandwidth (double-buffered)|group=n}}
 * Phong shading performance:
-** 2 million polygons/sec: 4 lights/polygon, 50-100-pixel polygons{{ref|7,898–15,796 floating-point operations per 50-100-pixel polygon for 4 light sources (196 operations setup, 156 operations per pixel),{{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (Page 78)]}} 15–30 GFLOPS|group=n}}
+:* 2 million polygons/sec: 4 lights/polygon, 50-100-pixel polygons{{ref|7,898–15,796 floating-point operations per 50-100-pixel polygon for 4 light sources (196 operations setup, 156 operations per pixel),{{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 ''Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings'' (page 78)]}} 15–30 GFLOPS|group=n}}
-** 3-6 million polygons/sec: 4 lights/polygon, 32-pixel polygons{{ref|5188 floating-point operations per 32-pixel polygon for 4 light sources (113 operations setup, 156 operations per pixel ){{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (Page 78)]}}|group=n}}
+:* 3-6 million polygons/sec: 4 lights/polygon, 32-pixel polygons{{ref|5188 floating-point operations per 32-pixel polygon for 4 light sources (113 operations setup, 156 operations per pixel ){{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 ''Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings'' (page 78)]}}|group=n}}
-** 10-20 million polygons/sec: 1 light/polygon, 32-pixel polygons{{ref|1297 floating-point operations per 32-pixel polygon for 1 light source (49 operations setup, 39 operations per pixel){{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (Page 78)]}}|group=n}}
+:* 10-20 million polygons/sec: 1 light/polygon, 32-pixel polygons{{ref|1297 floating-point operations per 32-pixel polygon for 1 light source (49 operations setup, 39 operations per pixel){{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 ''Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings'' (page 78)]}}|group=n}}
 * Gouraud shading performance:
-** 30-60 million polygons/sec: 4 lights/polygon,{{ref|181 floating-point operations per vertex/polygon: 113 operations for transformation, 68 operations for 4 light sources (17 operations per light source){{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}|group=n}} 32-pixel polygons
+:* 30-60 million polygons/sec: 4 lights/polygon,{{ref|181 floating-point operations per vertex/polygon: 113 operations for transformation, 68 operations for 4 light sources (17 operations per light source){{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}|group=n}} 32-pixel polygons
-** 100-200 million polygons/sec: 1 light/polygon,{{ref|130 floating-point operations per vertex/polygon: 113 operations for transformation, 17 operations for 1 light source{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}|group=n}} 32-pixel polygons
+:* 100-200 million polygons/sec: 1 light/polygon,{{ref|130 floating-point operations per vertex/polygon: 113 operations for transformation, 17 operations for 1 light source{{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}|group=n}} 32-pixel polygons
 * Texture mapping performance:
-** 80 million polygons/sec: 50-100-[[texel]] polygons
+:* 80 million polygons/sec: 50-100-[[texel]] polygons
-** 100-200 million polygons/sec: 32-texel polygons
+:* 100-200 million polygons/sec: 32-texel polygons
 }}
@@ Line 125: / Line 125: @@
 {{multicol|
 * Memory: Up to 465&nbsp;[[Byte|MB]]{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
-** Main memory: 130&nbsp;MB{{ref|64&nbsp;MB RAM, 66&nbsp;MB ROM|group=n}}
+:* Main memory: 130&nbsp;MB{{ref|64&nbsp;MB RAM, 66&nbsp;MB ROM|group=n}}
-** Video memory: 286.25&nbsp;MB{{ref|30.25&nbsp;MB RAM, 256&nbsp;MB ROM|group=n}}
+:* Video memory: 286.25&nbsp;MB{{ref|30.25&nbsp;MB RAM, 256&nbsp;MB ROM|group=n}}
-** Sound memory: 48&nbsp;MB{{ref|16&nbsp;MB RAM, 32&nbsp;MB ROM|group=n}}
+:* Sound memory: 48&nbsp;MB{{ref|16&nbsp;MB RAM, 32&nbsp;MB ROM|group=n}}
-** Other memory: 480&nbsp;[[Byte|KB]]{{ref|384&nbsp;KB RAM, 96&nbsp;KB cache|group=n}}
+:* Other memory: 480&nbsp;[[Byte|KB]]{{ref|384&nbsp;KB RAM, 96&nbsp;KB cache|group=n}}
 * [[RAM]]: 110.625&nbsp;MB{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru.c Sega Hikaru (Valkyrie)]}}{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
-** Main RAM: 64&nbsp;MB [[wikipedia:Synchronous dynamic random-access memory|SDRAM]]{{fileref|HM5264 datasheet.pdf}}{{ref|32&nbsp;MB per SH‑4|group=n}}
+:* Main RAM: 64&nbsp;MB [[wikipedia:Synchronous dynamic random-access memory|SDRAM]]{{fileref|HM5264 datasheet.pdf}}{{ref|32&nbsp;MB per SH‑4|group=n}}
-** [[VRAM]]: 30.25&nbsp;MB{{fileref|HY57V161610D datasheet.pdf}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu.c Sega Hikaru GPU (Valkyrie)]}}
+:* [[VRAM]]: 30.25&nbsp;MB{{fileref|HY57V161610D datasheet.pdf}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu.c Sega Hikaru GPU (Valkyrie)]}}
-*** 4&nbsp;MB Command RAM{{ref|2× 315‑6197|group=n}}
+::* 4&nbsp;MB Command RAM{{ref|2× 315‑6197|group=n}}
-*** 8&nbsp;MB texture banks{{ref|2× 315‑6084|group=n}}
+::* 8&nbsp;MB texture banks{{ref|2× 315‑6084|group=n}}
-*** 8&nbsp;MB framebuffer SDRAM{{ref|IC 44‑47{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}|group=n}}
+::* 8&nbsp;MB framebuffer SDRAM{{ref|IC 44‑47{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}|group=n}}
-*** 10&nbsp;MB other SDRAM{{ref|1&nbsp;MB Geometry Processor, 1&nbsp;MB Image Generator|group=n}}
+::* 10&nbsp;MB other SDRAM{{ref|1&nbsp;MB Geometry Processor, 1&nbsp;MB Image Generator|group=n}}
-*** 256&nbsp;KB Synchronous [[SRAM]]{{fileref|UPD432232 datasheet.pdf}}
+::* 256&nbsp;KB Synchronous [[SRAM]]{{fileref|UPD432232 datasheet.pdf}}
-** Sound RAM: 16&nbsp;MB SDRAM{{ref|8&nbsp;MB per AICA|group=n}}
+:* Sound RAM: 16&nbsp;MB SDRAM{{ref|8&nbsp;MB per AICA|group=n}}
-** Other Main Board RAM: 128&nbsp;KB [[SRAM]]{{fileref|HM62256B datasheet.pdf}}
+:* Other Main Board RAM: 128&nbsp;KB [[SRAM]]{{fileref|HM62256B datasheet.pdf}}
-*** MIE RAM: 64&nbsp;KB{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-mie.c Sega Hikaru MIE (Valkyrie)]}}
+::* MIE RAM: 64&nbsp;KB{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-mie.c Sega Hikaru MIE (Valkyrie)]}}
-*** [[SRAM|Backup RAM]]: 64&nbsp;KB
+::* [[SRAM|Backup RAM]]: 64&nbsp;KB
-** Network Board RAM: 192&nbsp;KB SRAM{{fileref|HM62256B datasheet.pdf}}
+:* Network Board RAM: 192&nbsp;KB SRAM{{fileref|HM62256B datasheet.pdf}}
-** ROM Board RAM: 64&nbsp;KB SRAM{{fileref|CY7C199 datasheet.pdf}}
+:* ROM Board RAM: 64&nbsp;KB SRAM{{fileref|CY7C199 datasheet.pdf}}
 * [[ROM]]: Up to 354&nbsp;MB
-** [[BIOS|Boot ROM]]: 2&nbsp;MB [[EPROM]]{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
+:* [[BIOS|Boot ROM]]: 2&nbsp;MB [[EPROM]]{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
-** Game [[Cartridge|ROM Board]]: Up to 352&nbsp;MB (64&nbsp;MB main&nbsp;ROM, 256&nbsp;MB video&nbsp;[[wikipedia:Mask ROM|MaskROM]],{{ref|[http://www.mamedb.com/game/pharrier Planet Harriers (MAME)]}} 32&nbsp;MB sound&nbsp;ROM){{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-memctl.c Sega Hikaru Memory Controller (Valkyrie)]}}
+:* Game [[Cartridge|ROM Board]]: Up to 352&nbsp;MB (64&nbsp;MB main&nbsp;ROM, 256&nbsp;MB video&nbsp;[[wikipedia:Mask ROM|MaskROM]],{{ref|[http://www.mamedb.com/game/pharrier.html Planet Harriers (MAME)]}} 32&nbsp;MB sound&nbsp;ROM){{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-memctl.c Sega Hikaru Memory Controller (Valkyrie)]}}
-** Note: High‑speed access allows ROM to effectively be used as RAM, with polygons and textures streamed directly from game ROM Board.{{ref|[http://farm6.staticflickr.com/5471/12172411045_18bfc5912f_c.jpg Hideki Sato Sega Interview (Edge)]}}
+:* Note: High‑speed access allows ROM to effectively be used as RAM, with polygons and textures streamed directly from game ROM Board.{{ref|[http://farm6.staticflickr.com/5471/12172411045_18bfc5912f_c.jpg Hideki Sato Sega Interview (Edge)]}}
 * Cache: 96&nbsp;KB{{ref|48&nbsp;KB per SH‑4 CPU{{fileref|SH-4 32-bit CPU Core Architecture.pdf}}|group=n}}
 }}
@@ Line 153: / Line 153: @@
 {{multicol|
 * Internal processor cache bandwidth:{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
-** SH‑4 cache: 6.4&nbsp;GB/s{{ref|256‑bit, 200&nbsp;MHz|group=n}}
+:* SH‑4 cache: 6.4&nbsp;GB/s{{ref|256‑bit, 200&nbsp;MHz|group=n}}
-** Sega Custom 3D GPU: 32&nbsp;GB/s
+:* Sega Custom 3D GPU: 32&nbsp;GB/s
-** AICA Sound Processor: 536&nbsp;MB/s{{ref|2×&nbsp;32‑bit, 67&nbsp;MHz|group=n}}
+:* AICA Sound Processor: 536&nbsp;MB/s{{ref|2×&nbsp;32‑bit, 67&nbsp;MHz|group=n}}
-** Z80 MIE MCU: 15&nbsp;MB/s{{ref|8‑bit, 14.7456&nbsp;MHz|group=n}}
+:* Z80 MIE MCU: 15&nbsp;MB/s{{ref|8‑bit, 14.7456&nbsp;MHz|group=n}}
-** 315‑6154 Memory Controllers: 1.6&nbsp;GB/s{{ref|64‑bit, 200&nbsp;MHz|group=n}}
+:* 315‑6154 Memory Controllers: 1.6&nbsp;GB/s{{ref|64‑bit, 200&nbsp;MHz|group=n}}
-** Main Board PLD: 25&nbsp;GB/sec{{ref|928‑bit, 250&nbsp;MHz|group=n}}
+:* Main Board PLD: 25&nbsp;GB/sec{{ref|928‑bit, 250&nbsp;MHz|group=n}}
-** ROM Board PLD: 1.45&nbsp;GB/s{{ref|2×&nbsp;32‑bit, 180/182&nbsp;MHz|group=n}}
+:* ROM Board PLD: 1.45&nbsp;GB/s{{ref|2×&nbsp;32‑bit, 180/182&nbsp;MHz|group=n}}
-** Network Board 68000: 80&nbsp;MB/s{{ref|16‑bit, 40&nbsp;MHz|group=n}}
+:* Network Board 68000: 80&nbsp;MB/s{{ref|16‑bit, 40&nbsp;MHz|group=n}}
-** Network Board FPGA: 720&nbsp;MB/s{{ref|32‑bit, 180&nbsp;MHz{{fileref|PLSI2032 datasheet.pdf}}|group=n}}
+:* Network Board FPGA: 720&nbsp;MB/s{{ref|32‑bit, 180&nbsp;MHz{{fileref|PLSI2032 datasheet.pdf}}|group=n}}
 * RAM bandwidth: 35.111&nbsp;GB/s{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
-** Main RAM: 2.4&nbsp;GB/s{{ref|192‑bit, 100&nbsp;MHz, 6&nbsp;[[wikipedia:Nanosecond|ns]]{{fileref|HM5264 datasheet.pdf}}|group=n}}
+:* Main RAM: 2.4&nbsp;GB/s{{ref|192‑bit, 100&nbsp;MHz, 6&nbsp;[[wikipedia:Nanosecond|ns]]{{fileref|HM5264 datasheet.pdf}}|group=n}}
-*** SH‑4: 1.6&nbsp;GB/s{{ref|128‑bit|group=n}}
+::* SH‑4: 1.6&nbsp;GB/s{{ref|128‑bit|group=n}}
-*** Memory Controllers: 800&nbsp;MB/s{{ref|64‑bit|group=n}}
+::* Memory Controllers: 800&nbsp;MB/s{{ref|64‑bit|group=n}}
-** VRAM: 32&nbsp;GB/s{{ref|1088‑bit, 4.5&nbsp;ns|group=n}}
+:* VRAM: 32&nbsp;GB/s{{ref|1088‑bit, 4.5&nbsp;ns|group=n}}
-*** Command RAM: 16&nbsp;GB/s{{ref|315‑6197, 512‑bit, 250&nbsp;MHz|group=n}}
+::* Command RAM: 16&nbsp;GB/s{{ref|315‑6197, 512‑bit, 250&nbsp;MHz|group=n}}
-*** Texture banks: 8&nbsp;GB/s{{ref|315‑6084, 256‑bit, 250&nbsp;MHz|group=n}}
+::* Texture banks: 8&nbsp;GB/s{{ref|315‑6084, 256‑bit, 250&nbsp;MHz|group=n}}
-*** SDRAM: 7.2 GB/s{{ref|9×&nbsp;32‑bit, 200&nbsp;MHz, 4.5&nbsp;ns{{fileref|HY57V161610D datasheet.pdf}}
+::* SDRAM: 7.2 GB/s{{ref|9×&nbsp;32‑bit, 200&nbsp;MHz, 4.5&nbsp;ns{{fileref|HY57V161610D datasheet.pdf}}
 *Framebuffer: 3.2 GB/s (4x 32‑bit,{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}} 200 MHz)
 |group=n}}
-*** Synchronous SRAM: 400&nbsp;MB/s{{ref|32‑bit, 100&nbsp;MHz, 5&nbsp;ns{{fileref|UPD432232 datasheet.pdf}}|group=n}}
+::* Synchronous SRAM: 400&nbsp;MB/s{{ref|32‑bit, 100&nbsp;MHz, 5&nbsp;ns{{fileref|UPD432232 datasheet.pdf}}|group=n}}
-** Sound RAM: 268&nbsp;MB/s{{ref|32‑bit, 67&nbsp;MHz, 6&nbsp;ns{{fileref|K4S641632 datasheet.pdf}}|group=n}}
+:* Sound RAM: 268&nbsp;MB/s{{ref|32‑bit, 67&nbsp;MHz, 6&nbsp;ns{{fileref|K4S641632 datasheet.pdf}}|group=n}}
-** HM62256 SRAM: 193&nbsp;MB/s{{ref|72‑bit, 45&nbsp;ns{{fileref|HM62256B datasheet.pdf}}|group=n}}
+:* HM62256 SRAM: 193&nbsp;MB/s{{ref|72‑bit, 45&nbsp;ns{{fileref|HM62256B datasheet.pdf}}|group=n}}
-*** MIE RAM: 15&nbsp;MB/s{{ref|8‑bit, 14.7456&nbsp;MHz|group=n}}
+::* MIE RAM: 15&nbsp;MB/s{{ref|8‑bit, 14.7456&nbsp;MHz|group=n}}
-*** Backup RAM: 44.444444&nbsp;MB/s{{ref|16‑bit, 22.222222&nbsp;MHz|group=n}}
+::* Backup RAM: 44.444444&nbsp;MB/s{{ref|16‑bit, 22.222222&nbsp;MHz|group=n}}
-*** Network Board RAM: 133.333333&nbsp;MB/s{{ref|48‑bit, 22.222222&nbsp;MHz|group=n}}
+::* Network Board RAM: 133.333333&nbsp;MB/s{{ref|48‑bit, 22.222222&nbsp;MHz|group=n}}
-** ROM Board RAM: 250&nbsp;MB/s{{ref|16‑bit, 125&nbsp;MHz, 8&nbsp;ns{{fileref|CY7C199 datasheet.pdf}}|group=n}}
+:* ROM Board RAM: 250&nbsp;MB/s{{ref|16‑bit, 125&nbsp;MHz, 8&nbsp;ns{{fileref|CY7C199 datasheet.pdf}}|group=n}}
 * ROM bandwidth: 4&nbsp;GB/s{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
-** Boot ROM: 800&nbsp;MB/s{{ref|64‑bit, 100&nbsp;MHz{{fileref|CY2292 datasheet.pdf}}|group=n}}
+:* Boot ROM: 800&nbsp;MB/s{{ref|64‑bit, 100&nbsp;MHz{{fileref|CY2292 datasheet.pdf}}|group=n}}
-** ROM Board PLD: 1.45&nbsp;GB/s{{ref|2×&nbsp;32‑bit, 180/182&nbsp;MHz{{fileref|PLSI2032 datasheet.pdf}}{{fileref|M4A3 datasheet.pdf}}{{fileref|MACH111 datasheet.pdf}}|group=n}}
+:* ROM Board PLD: 1.45&nbsp;GB/s{{ref|2×&nbsp;32‑bit, 180/182&nbsp;MHz{{fileref|PLSI2032 datasheet.pdf}}{{fileref|M4A3 datasheet.pdf}}{{fileref|MACH111 datasheet.pdf}}|group=n}}
-** ROM Board Connectors: 1.5&nbsp;GB/s{{ref|[https://web.archive.org/web/20160228172702/members.iinet.net.au/~lantra9jp1/gurudumps/wip/hikaru1.jpg 2x] [https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu.c 32‑bit], 182&nbsp;MHz|group=n}}
+:* ROM Board Connectors: 1.5&nbsp;GB/s{{ref|2x 32‑bit, 182&nbsp;MHz{{ref|https://web.archive.org/web/20160228172702/http://members.iinet.net.au/~lantra9jp1/gurudumps/wip/hikaru1.jpg}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu.c Sega Hikaru GPU (Valkyrie)]}}|group=n}}
 }}
 ==List of games==
-*''[[Brave FireFighters]]'' (1999)
+{{CargoReleaseList
-*''[[NASCAR Arcade]]'' (2000)
+| table=releases
-*''[[Planet Harriers]]'' (2000)
+| query=console="HIKARU"
-*''[[Star Wars Racer Arcade]]'' (2000)
+| orderby=date
-*''[[Air Trix]]'' (2001)
+}}
-*''[[Virtual-On: Force|Cyber Troopers Virtual-On Force]]'' (2001)
-*''[[Virtual-On: Force|Cyber Troopers Virtual-On Force Ver.7.7]]'' (2002)
 ==History==
-According to Sega in 1999:{{ref|[http://www.goodcowfilms.com/farm/games/news-archive/Sega%20Confirms%20Hikaru%20DOES%20Exist....htm Sega Confirms Hikaru Does Exist (November 24, 1999)]}}
+According to Sega in 1999:{{ref|http://archive.is/nyrP3|http://www.goodcowfilms.com/farm/games/news-archive/Sega%20Confirms%20Hikaru%20DOES%20Exist....htm}}
 {{quote|Brave Firefighters utilizes a slightly modified Naomi Hardware system called Hikaru. Hikaru incorporates a custom Sega graphics chip and possesses larger memory capacity then standard Naomi systems. "These modifications were necessary because in Brave Firefighters, our engineers were faced with the daunting challenge of creating 3d images of flames and sprayed water," stated Sega's Vice President of Sales and Marketing, Barbara Joyiens. "If you stop and think about it, both have an almost infinite number of shapes, sizes, colors, levels of opaqueness, shadings and shadows. And, when you combine the two by simulating the spraying of water on a flame, you create an entirely different set of challenges for our game designers and engineers to overcome; challenges that would be extremely difficult, if not impossible to overcome utilizing existing 3D computers. Hikaru has the horsepower to handle these demanding graphic challenges with clarity, depth and precision."}}
-In addition, the Hikaru also uses two Hitachi SH-4 CPU processors, two Yamaha AICA sound engine processors, a Motorola 68000 network CPU, and a dual GPU setup. The Hikaru hardware was largely complete in 1998, before it was released to the public in 1999.{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}} The system was very expensive, and difficult to program.{{fileref|NextGeneration US 76.pdf|page=37}} The word "Hikaru" (ひかる) means "to shine" in Japanese.
+In addition, the Hikaru also uses two Hitachi SH-4 CPU processors, two Yamaha AICA sound engine processors, a Motorola 68000 network CPU, and a dual GPU setup. The Hikaru hardware was largely complete in 1998, before it was released to the public in 1999.{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}} The system was very expensive, and difficult to program.{{magref|nextgeneration|76|37}} The word "Hikaru" (ひかる) means "to shine" in Japanese.
 ==Photo gallery==