Difference between revisions of "Sega Master System/Technical specifications"
From Sega Retro
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* System master clock rate: 53.693175 MHz ([[NTSC]]), 53.203424 MHz ([[PAL]]){{fileref|SMSServiceManualEU.pdf}}{{ref|https://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h}} | * System master clock rate: 53.693175 MHz ([[NTSC]]), 53.203424 MHz ([[PAL]]){{fileref|SMSServiceManualEU.pdf}}{{ref|https://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h}} | ||
− | + | :* Master clock cycles per frame: 896,040 (NTSC), 1,070,460 (PAL){{ref|https://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h}} | |
− | + | :* Master clock cycles per scanline: 3420{{ref|https://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h}} | |
==CPU== | ==CPU== | ||
{{multicol| | {{multicol| | ||
* Main CPU: [[NEC]] 780C (based on [[Zilog]] [[Z80]]){{intref|Sega Mark-III Hardware Notes (2008-11-14)}} | * Main CPU: [[NEC]] 780C (based on [[Zilog]] [[Z80]]){{intref|Sega Mark-III Hardware Notes (2008-11-14)}} | ||
− | + | :* [[wikipedia:Clock rate|Clock rate]]: 3.579545 MHz (NTSC), 3.54689493 MHz (PAL/SECAM){{ref|CPU clock cycles per frame: 59,736 (NTSC), 71,364 (PAL) <br> CPU clock cycles per scanline: 228|group=n}} | |
− | + | :* The Z80 directly addresses program [[RAM]] and [[ROM]], but only addresses [[VRAM]] through VDP hardware ports.{{fileref|SMSServiceManualEU.pdf}} It can access VRAM by commanding/programming VDP.{{intref|Sega Master System VDP documentation (2002-11-12)}} | |
− | + | :* [[wikipedia:Instruction set|Instruction set]]: 8‑bit and 16‑bit instructions, 6–18 registers{{ref|[http://www.drolez.com/retro/ Obsolete Microprocessors]}} | |
− | + | :* Bus width: 8‑bit | |
* Performance: 0.51 [[wikipedia:Instructions per second|MIPS]]{{ref|[http://www.drolez.com/retro/ Obsolete Microprocessors]}} | * Performance: 0.51 [[wikipedia:Instructions per second|MIPS]]{{ref|[http://www.drolez.com/retro/ Obsolete Microprocessors]}} | ||
}} | }} | ||
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* GPU: Sega [[VDP]]{{fileref|SMSServiceManualEU.pdf}}{{fileref|SMS2ServiceManualEU.pdf}} | * GPU: Sega [[VDP]]{{fileref|SMSServiceManualEU.pdf}}{{fileref|SMS2ServiceManualEU.pdf}} | ||
− | + | :* Revisions: Sega 315‑5124 / [[Yamaha]] YM2602 (Mark III, Master System), Sega 315‑5246 / NEC UPD9004G (Master System II) | |
− | + | :* Note: An evolution of the [[TMS9918]] | |
− | + | :* Clock rate: 10.738635 MHz (NTSC),{{fileref|SMSServiceManualEU.pdf|page=4}} 10.6406848 MHz (PAL){{fileref|SMSServiceManualEU.pdf|page=14}} | |
− | + | :* [[Pixel]] clock rate: 5.3693175 MHz (NTSC), 5.3203424 MHz (PAL){{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/sms.cpp}} | |
− | + | :* Bus width: 16‑bit{{ref|16‑bit VRAM bus, 8‑bit Z80/ROM bus|group=n}} | |
− | + | :* Memory bus clock rate: 5.3693175 MHz (NTSC), 5.3203424 MHz (PAL) | |
− | + | :* Registers: 8‑bit and 16‑bit{{fileref|SoftwareReferenceManualForSegaMarkIIIEU.pdf}}{{intref|Sega Master System VDP documentation (2002-11-12)}} | |
− | + | :* Memory access: VDP directly addresses [[VRAM]], has its own internal CRAM and sprite line buffer, and has access to cartridge ROM. It can be commanded and programmed by Z80. | |
* Color TV signal encoder: [[wikipedia:Rohm|Rohm]] BA7230LS{{intref|Sega Mark-III Hardware Notes (2008-11-14)}} / [[Sony]] [http://console5.com/wiki/V7040 V7040 RGB Encoder] / Sony CXA1145{{fileref|CXA1145P datasheet.pdf}} / [[Fujitsu]] MB3514{{fileref|MB3514 datasheet.pdf}} / Sony V7040 / [[Motorola]] MC1377{{ref|[http://www.smspower.org/Development/VideoOutput Sega Master System Video Output]}}{{ref|[http://www.smspower.org/Development/Documents Sega Master System Documents]}} | * Color TV signal encoder: [[wikipedia:Rohm|Rohm]] BA7230LS{{intref|Sega Mark-III Hardware Notes (2008-11-14)}} / [[Sony]] [http://console5.com/wiki/V7040 V7040 RGB Encoder] / Sony CXA1145{{fileref|CXA1145P datasheet.pdf}} / [[Fujitsu]] MB3514{{fileref|MB3514 datasheet.pdf}} / Sony V7040 / [[Motorola]] MC1377{{ref|[http://www.smspower.org/Development/VideoOutput Sega Master System Video Output]}}{{ref|[http://www.smspower.org/Development/Documents Sega Master System Documents]}} | ||
− | + | :* Color burst clock input: 3.579545 MHz (NTSC),{{intref|Sega Mark-III Hardware Notes (2008-11-14)}} 3.546895 MHz (PAL) | |
* Screen [[resolution]]s: 256x192 and 256x224. PAL/SECAM also supports 256x240. | * Screen [[resolution]]s: 256x192 and 256x224. PAL/SECAM also supports 256x240. | ||
− | + | :* Overscan resolution: 342x262 (NTSC), 342x313 (PAL){{intref|Sega Master System VDP documentation (2002-11-12)}} | |
− | + | :* [[wikipedia:Scan line|Scanlines]]: 262 (NTSC), 313 (PAL) | |
* Refresh rate: 59.922743 Hz (NTSC), 49.701459 Hz (PAL){{ref|[https://github.com/jasarien/Provenance/blob/master/PVGenesis/PVGenesis/Genesis/GenesisCore/genplusgx_source/system.c Genesis Plus]}} | * Refresh rate: 59.922743 Hz (NTSC), 49.701459 Hz (PAL){{ref|[https://github.com/jasarien/Provenance/blob/master/PVGenesis/PVGenesis/Genesis/GenesisCore/genplusgx_source/system.c Genesis Plus]}} | ||
− | + | :* Maximum frame rate: 59.922743 frames/sec (NTSC), 49.701459 frames/sec (PAL) | |
* [[Palette|Colors]]: Up to 32 simultaneous colors (16 for sprites, 16 for background) available from a [[palette]] of 64 colors (6‑bit RGB), 16 colors (4‑bit) per pixel/tile/sprite | * [[Palette|Colors]]: Up to 32 simultaneous colors (16 for sprites, 16 for background) available from a [[palette]] of 64 colors (6‑bit RGB), 16 colors (4‑bit) per pixel/tile/sprite | ||
− | + | :* Programmable capabilities: Mid‑frame palette swap allows up to 64 simultaneous colors, 105 color palette (all on screen) possible with static image{{ref|[http://atariage.com/forums/topic/216268-my-first-test-on-the-tms9918/ TMS9918 test (AtariAge)]}} | |
* VDP display modes:{{intref|Sega Master System VDP documentation (2002-11-12)}} | * VDP display modes:{{intref|Sega Master System VDP documentation (2002-11-12)}} | ||
− | + | :* Modes 1–2: 256x192 resolution, [[wikipedia:Tile-based video game|tilemap]], 2 colors per tile, [[SG-1000]] backwards compatibility | |
− | + | :* Mode 3: 64×48 resolution, [[wikipedia:Bitmap|bitmap]], 16 colors per pixel, SG-1000 backwards compatibility | |
− | + | :* Mode 4: 256x192, 256x224 and 256x240 resolutions, tilemap, 16 colors per tile, used by most Master System games | |
* VRAM bandwidth: | * VRAM bandwidth: | ||
− | + | :* VDP read bandwidth: 7.692306 MB/s | |
− | + | :* Z80 write bandwidth: 298.295 KB/s (NTSC), 295.574 KB/s (PAL){{ref|Byte per 12 cycles{{fileref|SC-3000ServiceManual.pdf|page=12}}|group=n}} | |
− | + | :* Z80 write during active display: 174.794 KB/s (NTSC), 181.112 KB/s (PAL){{ref|[http://www.smspower.org/forums/14599-HowManyBytesCanIWriteToVRAMPerFrame Bytes written to VRAM per frame]}} | |
* Pixel [[fillrate]]: | * Pixel [[fillrate]]: | ||
− | + | :* Read fillrate: 5.369317 [[Pixel|MPixels/s]] (NTSC), 5.320342 MPixels/s (PAL) | |
− | + | :* Mode 3-4 write fillrate: 4-bit per pixel, 596,590 [[Pixel|pixels/s]] (NTSC), 591,148 pixels/s (PAL) | |
− | + | :* Mode 3-4 write during active display: 349,588 pixels/s (NTSC), 362,224 pixels/s (PAL) | |
− | + | :* Mode 1-2 write fillrate: 1-bit per pixel, 2.386363 MPixels/s (NTSC), 2.364595 MPixels/s (PAL) | |
− | + | :* Mode 1-2 write during active display: 1.398352 MPixels/s (NTSC), 1.448896 MPixels/s (PAL) | |
* Tile read fillrate: 83,895 tiles/sec (NTSC), 83,130 tiles/sec (PAL) | * Tile read fillrate: 83,895 tiles/sec (NTSC), 83,130 tiles/sec (PAL) | ||
}} | }} | ||
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* Background: [[wikipedia:Tile engine|Tilemap]] playfield, 8x8 tiles, horizontal & vertical tile flipping, up to 448 tiles/patterns in VRAM used by background,{{fileref|SoftwareReferenceManualForSegaMarkIIIEU.pdf|page=8}} up to 1792 flipped tiles in VRAM used by background, definable priorities for individual background tiles{{intref|Sega Master System VDP documentation (2002-11-12)}} | * Background: [[wikipedia:Tile engine|Tilemap]] playfield, 8x8 tiles, horizontal & vertical tile flipping, up to 448 tiles/patterns in VRAM used by background,{{fileref|SoftwareReferenceManualForSegaMarkIIIEU.pdf|page=8}} up to 1792 flipped tiles in VRAM used by background, definable priorities for individual background tiles{{intref|Sega Master System VDP documentation (2002-11-12)}} | ||
* [[Sprite]]s: 16 colors (15 opaque, 1 transparent) per sprite, up to 256 tiles/patterns in VRAM used by sprites,{{intref|Sega Master System VDP documentation (2002-11-12)}} [http://www.smspower.org/Development/CollisionDetection collision detection]{{fileref|SoftwareReferenceManualForSegaMarkIIIEU.pdf|page=6}} | * [[Sprite]]s: 16 colors (15 opaque, 1 transparent) per sprite, up to 256 tiles/patterns in VRAM used by sprites,{{intref|Sega Master System VDP documentation (2002-11-12)}} [http://www.smspower.org/Development/CollisionDetection collision detection]{{fileref|SoftwareReferenceManualForSegaMarkIIIEU.pdf|page=6}} | ||
− | + | :* Sprite pixel sizes: 8x8, 8x16 | |
− | + | :* Sprite zoom pixel sizes: 16x16, 16x32 | |
− | + | :* Sprite line [[wikipedia:Data buffer|buffer]]: VDP contains internal sprite line buffer for 8 sprites per scanline, double buffering, prevents delay while VDP reads VRAM, sprite priority determined by order of sprites in buffer{{intref|Sega Master System VDP documentation (2002-11-12)}} | |
− | + | :* Sprites on screen: 64 sprites on screen, more than 64 sprites with mid-screen raster effects{{ref|[http://www.smspower.org/forums/16026-DisplayingMoreThan32ColoursRasterEffects Displaying more than 32 colours - raster effect (SMS Power)]}} | |
− | + | :* Sprites per scanline: 8 sprites (non-flickering) per scanline, 9 flickering sprites per scanline{{ref|1=[http://atariage.com/forums/topic/220934-questions-about-coleco-graphics-capacity/?p=2910264 Coleco graphics capacity (AtariAge)]}} | |
* Scrolling: Smooth hardware scrolling, horizontal & vertical scrolling, diagonal scrolling, [[wikipedia:Parallax scrolling#Raster method|line scrolling]], partial screen scrolling{{intref|Sega Master System Technical Documentation (1998-06-10)}} | * Scrolling: Smooth hardware scrolling, horizontal & vertical scrolling, diagonal scrolling, [[wikipedia:Parallax scrolling#Raster method|line scrolling]], partial screen scrolling{{intref|Sega Master System Technical Documentation (1998-06-10)}} | ||
* [[wikipedia:Interrupt request|IRQ]] [[wikipedia:Raster interrupt|raster interrupt]] capabilities:{{intref|Sega Master System Technical Documentation (1998-06-10)}} Interrupt per frame, interrupt per scanline,{{intref|Sega Master System VDP documentation (2002-11-12)}} mid‑frame palette swap, transparency effect, line scrolling, partial screen scrolling | * [[wikipedia:Interrupt request|IRQ]] [[wikipedia:Raster interrupt|raster interrupt]] capabilities:{{intref|Sega Master System Technical Documentation (1998-06-10)}} Interrupt per frame, interrupt per scanline,{{intref|Sega Master System VDP documentation (2002-11-12)}} mid‑frame palette swap, transparency effect, line scrolling, partial screen scrolling | ||
* [[VRAM]] screen map: 2 KB to 2.25 KB{{fileref|SoftwareReferenceManualForSegaMarkIIIEU.pdf|page=8}} | * [[VRAM]] screen map: 2 KB to 2.25 KB{{fileref|SoftwareReferenceManualForSegaMarkIIIEU.pdf|page=8}} | ||
− | + | :* [[Sprite]] attribute table: 256 [[byte]]s (2 [[Bit|Kbits]]), including 64 byte tile/pattern data | |
− | + | :* Background name table: 1.75 [[Byte|KB]] (14 Kbits) or 2 KB (16 Kbits){{intref|Sega Master System VDP documentation (2002-11-12)}}{{ref|16‑bit per tile{{intref|Sega Master System Technical Documentation (1998-06-10)}} | |
* 256x192 resolution: 1.75 KB, 32x28 table (256x224 pixels), 896 tiles (768 visible) | * 256x192 resolution: 1.75 KB, 32x28 table (256x224 pixels), 896 tiles (768 visible) | ||
* 256x224 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (896 visible) | * 256x224 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (896 visible) | ||
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|group=n}} | |group=n}} | ||
* Tile write fillrate: 32 bytes per tile, 9321 tiles/sec (NTSC), 9236 tiles/sec (PAL) | * Tile write fillrate: 32 bytes per tile, 9321 tiles/sec (NTSC), 9236 tiles/sec (PAL) | ||
− | + | :* Write during active display: 5462 tiles/sec (NTSC), 5659 tiles/sec (PAL) | |
}} | }} | ||
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* Tiles: 832-1024 tiles,{{ref|768 background tiles, 64-256 sprite tiles|group=n}} 2 colors per tile, 8 bytes per tile | * Tiles: 832-1024 tiles,{{ref|768 background tiles, 64-256 sprite tiles|group=n}} 2 colors per tile, 8 bytes per tile | ||
* Sprites: 32-64 sprites, 64-256 sprite tiles | * Sprites: 32-64 sprites, 64-256 sprite tiles | ||
− | + | :* Sprite pixel sizes: 8x8, 16x16 | |
− | + | :* Sprite zoom pixel sizes: 16x16, 32x32 | |
* Tile write fillrate: 8 bytes per tile, 37,286 tiles/sec (NTSC), 36,946 tiles/sec (PAL) | * Tile write fillrate: 8 bytes per tile, 37,286 tiles/sec (NTSC), 36,946 tiles/sec (PAL) | ||
− | + | :* Write during active display: 21,849 tiles/sec (NTSC), 22,639 tiles/sec (PAL) | |
* Additional Master System capabilities: Raster effects, programmable full screen zooming{{ref|[http://www.smspower.org/forums/7851-FunWithZooming Fun with zooming (SMS Power)]}} | * Additional Master System capabilities: Raster effects, programmable full screen zooming{{ref|[http://www.smspower.org/forums/7851-FunWithZooming Fun with zooming (SMS Power)]}} | ||
}} | }} | ||
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* [[wikipedia:Programmable sound generator|PSG]] [[wikipedia:Sound chip|sound chip]]: Sega PSG ([[SN76489|SN76496]]) @ 3.579545 MHz{{intref|Sega Mark-III Hardware Notes (2008-11-14)}}{{ref|[http://www.smspower.org/Development/SN76489 Sega SN76489]}} | * [[wikipedia:Programmable sound generator|PSG]] [[wikipedia:Sound chip|sound chip]]: Sega PSG ([[SN76489|SN76496]]) @ 3.579545 MHz{{intref|Sega Mark-III Hardware Notes (2008-11-14)}}{{ref|[http://www.smspower.org/Development/SN76489 Sega SN76489]}} | ||
− | + | :* 4 channel mono sound{{intref|Sega Master System Technical Documentation (1998-06-10)}} | |
− | + | ::* 3 [[wikipedia:Square wave|square wave]] sound generator tone channels: 4–10 octaves, 16 volume levels, 1024 (10‑bit) frequencies, 122 Hz to 125 kHz frequency range | |
− | + | ::* 1 noise generator channel: [[wikipedia:White noise|White noise]], periodic noise, 16‑bit [[wikipedia:Linear feedback shift register|LSFR]], 16‑bit [[wikipedia:Ring buffer|ring buffer]], 3 preset frequencies (7.8 to 19.5 kHz), can match frequency of 3rd tone channel | |
− | + | :* [[wikipedia:Pulse-code modulation|PCM]]/[[wikipedia:Pulse-width modulation|PWM]] sampling: Uses 3 tone channels, 1‑bit to 8‑bit audio depth, 5–64 kHz sampling rate, up to 16 KB per sample | |
− | + | :* Based on TI [[SN76489]] | |
* FM sound chip: [[Yamaha]] [[YM2413]]{{intref|Sega Master System Technical Documentation (1998-06-10)}} | * FM sound chip: [[Yamaha]] [[YM2413]]{{intref|Sega Master System Technical Documentation (1998-06-10)}} | ||
− | + | :* 9 mono [[wikipedia:Frequency modulation synthesis|FM synthesis]] channels | |
− | + | :* 2‑operator FM synthesis sound | |
− | + | :* Instruments: 15 pre‑defined instruments and user‑defined sound | |
− | + | :* Rhythm mode: 3 channels can be used for percussion sounds | |
− | + | :* Built into Japanese Master System | |
− | + | :* Available as plug‑in module for Mark III | |
− | + | :* Supported by certain games only | |
}} | }} | ||
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* System [[RAM]]: 24 [[Byte|KB]] (most models) or 40 KB (some models){{ref|[http://www.smspower.org/Development/RAM Sega Master System RAM]}}{{intref|Sega Mark-III Hardware Notes (2008-11-14)}} | * System [[RAM]]: 24 [[Byte|KB]] (most models) or 40 KB (some models){{ref|[http://www.smspower.org/Development/RAM Sega Master System RAM]}}{{intref|Sega Mark-III Hardware Notes (2008-11-14)}} | ||
− | + | :* Main/Program RAM: 8 KB (64 [[Bit|Kbits]]) | |
− | + | ::* Note: Since Z80 reads program code directly from ROM, program RAM is primarily used for general program data (such as state information).{{ref|[http://www.smspower.org/uploads/Development/smsarch.html SMSARCH: A Sega Master System Cartridge Archiver]}} | |
− | + | :* [[VRAM]]: 16 KB (128 Kbits, most models) or 32 KB (256 Kbits, some models){{ref|[http://www.smspower.org/Development/Documents Sega Master System Documents]}} | |
* VDP internal memory: 64 [[byte]]s (512 [[bit]]s){{intref|Sega Master System VDP documentation (2002-11-12)}} | * VDP internal memory: 64 [[byte]]s (512 [[bit]]s){{intref|Sega Master System VDP documentation (2002-11-12)}} | ||
− | + | :* Color RAM (CRAM): 32 bytes (256 bits, 32x 8-bit entries) | |
− | + | :* Sprite line buffer: 32 bytes (256 bits, 8x 32-bit entries) | |
* System [[ROM]]: 8 KB (64 Kbits) to 256 KB (2 Mbits), depending on built‑in game | * System [[ROM]]: 8 KB (64 Kbits) to 256 KB (2 Mbits), depending on built‑in game | ||
* [[Cartridge]] ROM: 8 KB to 32 KB ([[Sega Card]]), 128 KB to 4 MB ([[Cartridge]]){{ref|[http://www.smspower.org/uploads/Development/smsarch.html SMSARCH: A Sega Master System Cartridge Archiver]}} | * [[Cartridge]] ROM: 8 KB to 32 KB ([[Sega Card]]), 128 KB to 4 MB ([[Cartridge]]){{ref|[http://www.smspower.org/uploads/Development/smsarch.html SMSARCH: A Sega Master System Cartridge Archiver]}} | ||
− | + | :* Note: Z80 can read program code directly from ROM, allowing program RAM to be used for general program data (such as state information). | |
* Cartridge battery backup [[SRAM]]: 8 KB (64 Kbits) to 32 KB (256 Kbits){{ref|[http://www.smspower.org/Development/Mappers Sega Mappers]}} | * Cartridge battery backup [[SRAM]]: 8 KB (64 Kbits) to 32 KB (256 Kbits){{ref|[http://www.smspower.org/Development/Mappers Sega Mappers]}} | ||
}} | }} | ||
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* System memory buses:{{fileref|SMSServiceManualEU.pdf}}{{fileref|SMS2ServiceManualEU.pdf}}{{intref|Sega Master System VDP documentation (2002-11-12)}} | * System memory buses:{{fileref|SMSServiceManualEU.pdf}}{{fileref|SMS2ServiceManualEU.pdf}}{{intref|Sega Master System VDP documentation (2002-11-12)}} | ||
− | + | :* Z80, VDP <‑> Main RAM, System ROM, Cartridge ROM (8‑bit) | |
− | + | :* VDP <‑> VRAM (16‑bit) | |
* System RAM chips:{{fileref|SMSServiceManualEU.pdf}}{{fileref|SMS2ServiceManualEU.pdf}}{{ref|[http://www.smspower.org/Development/RAM Sega Master System RAM]}}{{ref|[http://www.smspower.org/Development/Documents Sega Master System Documents]}} | * System RAM chips:{{fileref|SMSServiceManualEU.pdf}}{{fileref|SMS2ServiceManualEU.pdf}}{{ref|[http://www.smspower.org/Development/RAM Sega Master System RAM]}}{{ref|[http://www.smspower.org/Development/Documents Sega Master System Documents]}} | ||
− | + | :* Main RAM: 8‑bit, [[wikipedia:Pseudostatic RAM|XRAM]]/[[SRAM]], 3.579545 MHz (NTSC) or 3.546894 MHz (PAL){{ref|279/281 [[wikipedia:Nanosecond|ns]]{{fileref|UPD4168 datasheet.pdf}}{{fileref|KM6264B datasheet.pdf}}|group=n}} | |
− | + | :* VRAM: 16‑bit (2x 8‑bit), XRAM/[[wikipedia:Pseudostatic RAM|PSRAM]], 3.846153 MHz{{ref|260 ns{{fileref|UPD4168 datasheet.pdf}}{{fileref|HM65256B datasheet.pdf}}|group=n}} | |
* ROM chips: 8‑bit, 3.579545 MHz (NTSC) or 3.546894 MHz (PAL){{ref|279/281 ns|group=n}} | * ROM chips: 8‑bit, 3.579545 MHz (NTSC) or 3.546894 MHz (PAL){{ref|279/281 ns|group=n}} | ||
− | + | :* System ROM: [[wikipedia:Mask ROM|MROM]]{{fileref|SMSServiceManualEU.pdf}}{{fileref|CXK3864 datasheet.pdf}} | |
− | + | :* Cartridge ROM: MROM,{{ref|[http://www.smspower.org/Development/ROMPartNumbers ROM Part Numbers]}}{{fileref|MB831000 datasheet.pdf}}{{ref|[http://dreamjam.co.uk/emuviews/txt/smsmap.txt Memory Mapper Hardware Notes]}} [[EPROM]], [[wikipedia:Flash memory|Flash]]{{ref|[https://web.archive.org/web/20090205131908/consolasparasiempre.net/doc/SMSPinRom.txt SMS PINOUTs: ROMs]}}{{fileref|TMS27C512 datasheet.pdf}}{{fileref|AM29F040 datasheet.pdf}} | |
}} | }} | ||
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* System RAM bandwidth: 11 MB/s{{ref|2 buses (24-bit bus width)|group=n}} | * System RAM bandwidth: 11 MB/s{{ref|2 buses (24-bit bus width)|group=n}} | ||
− | + | :* Main RAM: 3.579545 MB/s (NTSC), 3.546894 MB/s (PAL){{ref|8-bit bus|group=n}} | |
− | + | :* VRAM: 7.692306 MB/s{{ref|16-bit bus|group=n}} | |
* ROM bandwidth: 3.5 MB/s{{ref|8-bit bus|group=n}} | * ROM bandwidth: 3.5 MB/s{{ref|8-bit bus|group=n}} | ||
* Internal processor bandwidth: | * Internal processor bandwidth: | ||
− | + | :* Z80: 3.579545 MB/s (NTSC), 3.546894 MB/s (PAL){{ref|8-bit|group=n}} | |
− | + | :* VDP: 10 MB/s{{ref|16-bit|group=n}} | |
− | + | ::* CRAM: 5.3693175 MB/s (NTSC), 5.3203424 MB/s (PAL){{ref|8-bit|group=n}} | |
− | + | ::* Sprite line buffer: 5.3693175 MB/s (NTSC), 5.3203424 MB/s (PAL){{ref|8-bit|group=n}} | |
}} | }} | ||
Revision as of 20:57, 16 October 2018
- Back to: Sega Master System.
Technical specifications for the Sega Master System.
Contents
CPU
- Clock rate: 3.579545 MHz (NTSC), 3.54689493 MHz (PAL/SECAM)[n 1]
- The Z80 directly addresses program RAM and ROM, but only addresses VRAM through VDP hardware ports.[1] It can access VRAM by commanding/programming VDP.[4]
- Instruction set: 8‑bit and 16‑bit instructions, 6–18 registers[5]
- Bus width: 8‑bit
Graphics
- Revisions: Sega 315‑5124 / Yamaha YM2602 (Mark III, Master System), Sega 315‑5246 / NEC UPD9004G (Master System II)
- Note: An evolution of the TMS9918
- Clock rate: 10.738635 MHz (NTSC),[7] 10.6406848 MHz (PAL)[8]
- Pixel clock rate: 5.3693175 MHz (NTSC), 5.3203424 MHz (PAL)[9]
- Bus width: 16‑bit[n 2]
- Memory bus clock rate: 5.3693175 MHz (NTSC), 5.3203424 MHz (PAL)
- Registers: 8‑bit and 16‑bit[10][4]
- Memory access: VDP directly addresses VRAM, has its own internal CRAM and sprite line buffer, and has access to cartridge ROM. It can be commanded and programmed by Z80.
- Color TV signal encoder: Rohm BA7230LS[3] / Sony V7040 RGB Encoder / Sony CXA1145[11] / Fujitsu MB3514[12] / Sony V7040 / Motorola MC1377[13][14]
- Color burst clock input: 3.579545 MHz (NTSC),[3] 3.546895 MHz (PAL)
- Screen resolutions: 256x192 and 256x224. PAL/SECAM also supports 256x240.
- Refresh rate: 59.922743 Hz (NTSC), 49.701459 Hz (PAL)[15]
- Maximum frame rate: 59.922743 frames/sec (NTSC), 49.701459 frames/sec (PAL)
- Colors: Up to 32 simultaneous colors (16 for sprites, 16 for background) available from a palette of 64 colors (6‑bit RGB), 16 colors (4‑bit) per pixel/tile/sprite
- Programmable capabilities: Mid‑frame palette swap allows up to 64 simultaneous colors, 105 color palette (all on screen) possible with static image[16]
- VDP display modes:[4]
- VRAM bandwidth:
- Pixel fillrate:
- Read fillrate: 5.369317 MPixels/s (NTSC), 5.320342 MPixels/s (PAL)
- Mode 3-4 write fillrate: 4-bit per pixel, 596,590 pixels/s (NTSC), 591,148 pixels/s (PAL)
- Mode 3-4 write during active display: 349,588 pixels/s (NTSC), 362,224 pixels/s (PAL)
- Mode 1-2 write fillrate: 1-bit per pixel, 2.386363 MPixels/s (NTSC), 2.364595 MPixels/s (PAL)
- Mode 1-2 write during active display: 1.398352 MPixels/s (NTSC), 1.448896 MPixels/s (PAL)
- Tile read fillrate: 83,895 tiles/sec (NTSC), 83,130 tiles/sec (PAL)
Mode 4
- Characters/Tiles: 8x8 pixel characters/tiles, 16 colors per tile, maximum 488 unique characters/tiles on screen (due to VRAM space limitation), horizontal & vertical background tile flipping (up to 1792 flipped tiles in VRAM)
- Background: Tilemap playfield, 8x8 tiles, horizontal & vertical tile flipping, up to 448 tiles/patterns in VRAM used by background,[19] up to 1792 flipped tiles in VRAM used by background, definable priorities for individual background tiles[4]
- Sprites: 16 colors (15 opaque, 1 transparent) per sprite, up to 256 tiles/patterns in VRAM used by sprites,[4] collision detection[20]
- Sprite pixel sizes: 8x8, 8x16
- Sprite zoom pixel sizes: 16x16, 16x32
- Sprite line buffer: VDP contains internal sprite line buffer for 8 sprites per scanline, double buffering, prevents delay while VDP reads VRAM, sprite priority determined by order of sprites in buffer[4]
- Sprites on screen: 64 sprites on screen, more than 64 sprites with mid-screen raster effects[21]
- Sprites per scanline: 8 sprites (non-flickering) per scanline, 9 flickering sprites per scanline[22]
- Scrolling: Smooth hardware scrolling, horizontal & vertical scrolling, diagonal scrolling, line scrolling, partial screen scrolling[23]
- IRQ raster interrupt capabilities:[23] Interrupt per frame, interrupt per scanline,[4] mid‑frame palette swap, transparency effect, line scrolling, partial screen scrolling
- VRAM screen map: 2 KB to 2.25 KB[19]
- Tile write fillrate: 32 bytes per tile, 9321 tiles/sec (NTSC), 9236 tiles/sec (PAL)
- Write during active display: 5462 tiles/sec (NTSC), 5659 tiles/sec (PAL)
Modes 1-2
- See SG-1000 specifications for more details
- Tiles: 832-1024 tiles,[n 5] 2 colors per tile, 8 bytes per tile
- Sprites: 32-64 sprites, 64-256 sprite tiles
- Sprite pixel sizes: 8x8, 16x16
- Sprite zoom pixel sizes: 16x16, 32x32
- Tile write fillrate: 8 bytes per tile, 37,286 tiles/sec (NTSC), 36,946 tiles/sec (PAL)
- Write during active display: 21,849 tiles/sec (NTSC), 22,639 tiles/sec (PAL)
- Additional Master System capabilities: Raster effects, programmable full screen zooming[24]
Audio
- PSG sound chip: Sega PSG (SN76496) @ 3.579545 MHz[3][25]
- 4 channel mono sound[23]
- 3 square wave sound generator tone channels: 4–10 octaves, 16 volume levels, 1024 (10‑bit) frequencies, 122 Hz to 125 kHz frequency range
- 1 noise generator channel: White noise, periodic noise, 16‑bit LSFR, 16‑bit ring buffer, 3 preset frequencies (7.8 to 19.5 kHz), can match frequency of 3rd tone channel
- 9 mono FM synthesis channels
- 2‑operator FM synthesis sound
- Instruments: 15 pre‑defined instruments and user‑defined sound
- Rhythm mode: 3 channels can be used for percussion sounds
- Built into Japanese Master System
- Available as plug‑in module for Mark III
- Supported by certain games only
Memory
- Main/Program RAM: 8 KB (64 Kbits)
- Note: Since Z80 reads program code directly from ROM, program RAM is primarily used for general program data (such as state information).[27]
- Color RAM (CRAM): 32 bytes (256 bits, 32x 8-bit entries)
- Sprite line buffer: 32 bytes (256 bits, 8x 32-bit entries)
- System ROM: 8 KB (64 Kbits) to 256 KB (2 Mbits), depending on built‑in game
- Cartridge ROM: 8 KB to 32 KB (Sega Card), 128 KB to 4 MB (Cartridge)[27]
- Note: Z80 can read program code directly from ROM, allowing program RAM to be used for general program data (such as state information).
Configuration
- Z80, VDP <‑> Main RAM, System ROM, Cartridge ROM (8‑bit)
- VDP <‑> VRAM (16‑bit)
- ROM chips: 8‑bit, 3.579545 MHz (NTSC) or 3.546894 MHz (PAL)[n 8]
Bandwidth
Notes
- ↑ [CPU clock cycles per frame: 59,736 (NTSC), 71,364 (PAL)
CPU clock cycles per scanline: 228 CPU clock cycles per frame: 59,736 (NTSC), 71,364 (PAL)
CPU clock cycles per scanline: 228] - ↑ [16‑bit VRAM bus, 8‑bit Z80/ROM bus 16‑bit VRAM bus, 8‑bit Z80/ROM bus]
- ↑ [Byte per 12 cycles[17] Byte per 12 cycles[17]]
- ↑ [16‑bit per tile[23]
- 256x192 resolution: 1.75 KB, 32x28 table (256x224 pixels), 896 tiles (768 visible)
- 256x224 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (896 visible)
- 256x240 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (960 visible)
- 256x192 resolution: 1.75 KB, 32x28 table (256x224 pixels), 896 tiles (768 visible)
- 256x224 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (896 visible)
- 256x240 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (960 visible)]
- ↑ [768 background tiles, 64-256 sprite tiles 768 background tiles, 64-256 sprite tiles]
- ↑ [279/281 ns[29][30] 279/281 ns[29][30]]
- ↑ [260 ns[29][31] 260 ns[29][31]]
- ↑ [279/281 ns 279/281 ns]
- ↑ [2 buses (24-bit bus width) 2 buses (24-bit bus width)]
- ↑ 10.0 10.1 [8-bit bus 8-bit bus]
- ↑ [16-bit bus 16-bit bus]
- ↑ 12.0 12.1 12.2 [8-bit 8-bit]
- ↑ [16-bit 16-bit]
References
- ↑ 1.0 1.1 1.2 1.3 1.4 1.5 File:SMSServiceManualEU.pdf
- ↑ 2.0 2.1 2.2 https://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h
- ↑ 3.0 3.1 3.2 3.3 3.4 Sega Mark-III Hardware Notes (2008-11-14)
- ↑ 4.00 4.01 4.02 4.03 4.04 4.05 4.06 4.07 4.08 4.09 4.10 Sega Master System VDP documentation (2002-11-12)
- ↑ 5.0 5.1 Obsolete Microprocessors
- ↑ 6.0 6.1 6.2 File:SMS2ServiceManualEU.pdf
- ↑ File:SMSServiceManualEU.pdf, page 4
- ↑ File:SMSServiceManualEU.pdf, page 14
- ↑ https://github.com/mamedev/mame/blob/master/src/mame/drivers/sms.cpp
- ↑ File:SoftwareReferenceManualForSegaMarkIIIEU.pdf
- ↑ File:CXA1145P datasheet.pdf
- ↑ File:MB3514 datasheet.pdf
- ↑ Sega Master System Video Output
- ↑ 14.0 14.1 14.2 Sega Master System Documents
- ↑ Genesis Plus
- ↑ TMS9918 test (AtariAge)
- ↑ File:SC-3000ServiceManual.pdf, page 12
- ↑ Bytes written to VRAM per frame
- ↑ 19.0 19.1 File:SoftwareReferenceManualForSegaMarkIIIEU.pdf, page 8
- ↑ File:SoftwareReferenceManualForSegaMarkIIIEU.pdf, page 6
- ↑ Displaying more than 32 colours - raster effect (SMS Power)
- ↑ Coleco graphics capacity (AtariAge)
- ↑ 23.0 23.1 23.2 23.3 23.4 Sega Master System Technical Documentation (1998-06-10)
- ↑ Fun with zooming (SMS Power)
- ↑ Sega SN76489
- ↑ 26.0 26.1 Sega Master System RAM
- ↑ 27.0 27.1 SMSARCH: A Sega Master System Cartridge Archiver
- ↑ Sega Mappers
- ↑ 29.0 29.1 File:UPD4168 datasheet.pdf
- ↑ File:KM6264B datasheet.pdf
- ↑ File:HM65256B datasheet.pdf
- ↑ File:CXK3864 datasheet.pdf
- ↑ ROM Part Numbers
- ↑ File:MB831000 datasheet.pdf
- ↑ Memory Mapper Hardware Notes
- ↑ SMS PINOUTs: ROMs (Wayback Machine: 2009-02-05 13:19)
- ↑ File:TMS27C512 datasheet.pdf
- ↑ File:AM29F040 datasheet.pdf
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