Sega Saturn/Technical specifications
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Technical specifications for the Sega Saturn.
Contents
Processors
- Main CPU: 2× Hitachi SH-2 @ 28.63636 MHz[1][2][3]
- Configuration: Master/Slave
- 2x CPU cores: 32‑bit RISC instructions/registers, 74.454536 MIPS (37.227268 MIPS each, 1.3 MIPS per MHz),[4][5] up to 4 instructions/cycle (2 instructions/cycle per SH-2)[6]
- 2x DMA units: 2x DMAC (Direct Memory Access Controller),[7] parallel processing[8]
- 4x internal fixed‑point math processors:[9] 2x MULT multiplier DSP,[7][10][11] 2x DIVU division units,[7][10] parallel processing[12]
- System coprocessor: Custom Saturn Control Unit (SCU), with DSP for geometry processing and DMA controller for system control[15][9][16]
- Microcontroller: Hitachi HD404920[18] (4‑bit MCU) "System Manager & Peripheral Control" (SMPC) @ 4 MHz[9]
- Optional MPEG Video CD Card:[20][1]
- MPEG Video decoder: Sega P/N 315-5765 (Hitachi HD814101FE)
- MPEG Audio decoder: Hitachi HD814102F
Audio
- Sound processor: Yamaha SCSP (Saturn Custom Sound Processor) YMF292[21]
- Sound CPU: Motorola 68EC000 (16/32‑bit CISC) sound processor @ 11.29 MHz[15] (1.97575 MIPS[24])
- Bus width: 16‑bit internal, 16‑bit external
Sound
- Main article: Saturn Custom Sound Processor.
- Audio channels: 32
- Sound formats: PCM, FM, MIDI, LFO
- PCM sampling: 16‑bit and 8‑bit audio depth, 44.1 kHz sampling sate (CD quality), up to 32 PCM channels
- FM synthesis: 1–4 operators per FM channel, up to 32 FM channels (1‑operator) or 8 FM channels (4‑operator)
- LFO waveforms: 4 waveform types (Sawtooth, rectangular, triangular, white noise), up to 32 LFO channels
- CD‑DA: 1 streaming CD‑DA channel (16‑bit PCM, 44.1 kHz) from CD
- Stereo audio output
Video
- Bus width: 48‑bit (3x 16‑bit)[9]
- Word length: 16-bit
- Sega/Yamaha VDP2 @ 28.63636 MHz: Backgrounds, scrolling, handles background, scroll and 3D rotation planes[26][18]
- Bus width: 32‑bit[9]
- Word length: 32-bit
Graphics
- Graphics pipeline:
- 3 DSP geometry processors: 2× SH-2 DSP, SCU DSP
- 2 VDP rendering processors: VDP1 for sprites/textures/polygons, VDP2 for planes/backgrounds/textures
- NTSC dot clock: 7.15909 MHz (lo-res),[1] 14.31818 MHz (hi-res)
- PAL dot clock: 7.109375 MHz (lo-res), 14.21875 MHz (hi-res)
- Display resolutions: 320×224 to 704×480 (see Resolutions)[27][28]
- NTSC overscan resolution: 453×263 (lo-res),[1] 907×263 (hi-res)
- PAL overscan resolution: 454×313 (lo-res), 908×313 (hi-res)
- Maximum frame rate: 60 FPS (NTSC), 50 FPS (PAL)
- Color depth: 15-bit RGB to 32‑bit RGBA (24‑bit color with 8‑bit alpha transparency)[23]
- Color palette: 16,777,216 (VDP2), 32,768 (VDP1)
- Colors on screen: 256 to 16,777,216 (VDP2), 256 to 32,768 (VDP1)
- VDP2 colors per background: 16 colors (4-bit) to 16,777,216 colors (24-bit)[30][31]
- VDP1 colors per sprite/polygon: 16 colors (4-bit) to 32,768 colors (15-bit)[32][33]
- CLUT: Virtually unlimited number of CLUTs[34]
- DSP geometry processing: 188 MIPS (million instructions per second)[fn 4]
- Geometry calculations: 114 MOPS fixed-point calculations[fn 9]
- Vertex transformations: 2,400,000 vertices/sec[fn 10]
- Polygon transformations: 1,800,000 polygons/sec[fn 11]
- T&L flat lighting: 800,000 polygons/sec[fn 12]
- T&L Gouraud lighting: 700,000 polygons/sec[fn 13]
- Transmission bus bandwidth: 143 MB/s
- Bitmap/Framebuffer fillrate: 26–28 MPixels/s (24-bit color), 82–85 MPixels/s (15-bit color), 143–150 MPixels/s (8-bit color), 250–264 MPixels/s (4-bit color)[fn 16]
- Tile fillrate: 280–570 MPixels/s[fn 17]
- Optional MPEG Video CD Card: 704×480 resolution, 30 frames/sec, 16‑bit audio with 44.1 kHz sampling,[47] up to 72 minutes on one CD[20]
SCU DSP
- Parallel units: 32/48-bit ALU (arithmetic logic unit), 48/64‑bit Multiplier, 32-bit instruction decoder
- Internal: 4 parallel buses, 32-bit per bus, 128-bit overall bus width, 3 buses at 14.31818 MHz, 1 bus at 28.63636 MHz
- External: 32-bit, 28.63636 MHz
- Cache RAM: 2 KB (1 KB data, 1 KB program)[51]
- Instructions: 6 parallel instructions/cycle (one instruction per unit/bus),[17] 85.90908 MIPS (6 MIPS/MHz)
- Fixed-point operations: 28.63636 MOPS (million operations per second), 2 MOPS/MHz (2 parallel operations/cycle)
- Capabilities: Matrix and vector calculations, 3D point transformations, lighting calculations, fixed-point calculations,[49] faster than SH-2,[52] can use DMA to directly fetch and store vertex data, floating-point operations, geometry transformations, voxel rendering acceleration, fast coordinate transformations, lighting computations,[53] transparency calculations[54]
- Notes: Can only be programmed with assembly language, more difficult to program than SH-2[49]
VDP1
- Main article: VDP1 (Saturn).
- VDP1 @ 28.63636 MHz: Handles sprite/texture and polygon drawing,[25] color calculation and shading,[9] geometry[34]
- Versions: Sega 315‑5883 (Hitachi HD64440) Video Display Processor 1 (VDP1),[18] Sega 315‑5689 VDP1[9]
- Adjustable video clock rate: 28.63636 MHz or 26.8465875 MHz (NTSC),[27][1] 28.4375 MHz or 26.8426 MHz (PAL)[27]
- Parallel data bus structure: 3 parallel data buses (dual framebuffers, texture cache), 48-bit data bus width (16-bit per bus),[55] 171.8184 MB/s bandwidth[fn 18]
- Parallel data bus cycles: 85.90908 million bus cycles/sec[fn 19]
- Color palette: 32,768 colors (15-bit RGB) to 16,777,216 (24-bit VDP2 CRAM palette, accessible by VDP1)[56]
- Features: Alpha blending, clipping, luminance,[33] shadows,[58] transparency[59] (3 alpha levels, or 32 alpha levels using VDP2 palette),[57] per-pixel transparency[60]
- Polygon capabilities: Texture mapping,[25] lighting,[61][62] shading, wire‑frame, flat shading, Gouraud shading,[60][9][62] 15-bit color Gouraud shading,[63] 15-bit colored lighting, quad polygons, edge anti‑aliasing,[64] forward texture mapping (form of perspective correction), bilinear approximation (reduces texture warping), medium polygon accuracy (seamless polygons)[65]
- Framebuffer capabilities: Double buffering, dual 256 KB framebuffers, rotation & scaling,[33] VDP1 framebuffer can be rotated as bitmap layer by VDP2[66]
- Framebuffer resolution: 512×256, 512×512, 1024×256[67]
- Overscan resolution: 1708×263 (NTSC), 1820×313 (PAL), 852×525 (31KC), 848×562 (HDTV)[28]
- Sprite/Texture capabilities: Rotation & scaling, flipping, distortion,[25][33] warping, vertical and horizontal line scrolling, virtually unlimited color lookup tables,[34][68] System 24/32 sprite rendering system[69]
- Sprite/Texture size: 8×1 to 504×255 texels[70]
- Colors per sprite/texture in Lo-Res: 16, 64, 128, 256, and 32,768[32]
- Colors per sprite/texture in Hi-Res: 16, 64, 128, and 256[71]
- Maximum texels per scanline: 1812 (NTSC),[27] 1820 (PAL)[28]
- Maximum sprites/textures per scanline: 226 (NTSC), 227 (PAL)
- Texture cache VRAM: 512 KB[72]
- Sprite/Polygon size: 32 bytes (flat shading),[46][73] 40 bytes (Gouraud shading),[74] 64–96 bytes (shadows),[60] 72–104 bytes (shadows, Gouraud shading)
- Texture size: 4 bytes (8×1 texels, 16 colors) to 251.02 KB (504×255 texels, 32,758 colors)[73]
- Maximum sprites per frame: 16,383 (virtually unlimited),[34] 13,106 (Gouraud shading), 5461–8191 (shadows)
- Maximum polygons per frame: 16,384 (flat shading), 16,383 (texture mapping), 13,107 (Gouraud shading), 13,106 (texture mapping, Gouraud shading), 8192 (shadows), 8191 (texture mapping, shadows), 7281 (texture mapping, shadows, Gouraud shading)
- Texture fillrate: 19 MTexels/s (504×255 textures), 14 MTexels/s (10×10 textures), 12 MTexels/s (8×8 textures)[fn 24]
- Gouraud shading: 19 MTexels/s (504×255 textures), 9 MTexels/s (10×10 textures)[fn 25]
VDP2
- Main article: VDP2 (Saturn).
- VDP2 @ 57.27272 MHz: Handles background, scroll and 3D rotation planes[26]
- VDP2 cores: 4 parallel cores (17 units), 28.63636 MHz per core[85]
- Bus control
- H/V counter & timing generator
- Scroll picture block: 8 units (Normal picture coordinate calculation, Rotation picture coordinate calculation, Pattern name control, Window control, Character control, Line picture control, VRAM control, Dot data control)
- Video process: 7 units (Color offset & shadow, Output data control, Color computing control, Color RAM, Priority control, Color RAM control, Sprite control)
- Features: Transparency (32 levels of transparency, can also be applied to VDP1 polygons/sprites),[57] shadowing, 2 windows for special calculations,[31] matrix calculations,[86] multi-texturing,[87] bump mapping,[54] color gradients
- 3D infinite planes: Can be manipulated as large polygon objects,[88] with perspective transformation[89][90] and rotation. Can have curved surface and bumps,[91] and be used for grounds, walls, ceilings, seas, skies, etc.
- Visual effects: Water, fire, fog, heat haze, misting, reflective water surfaces[92]
- Rotation picture coordinate calculation: Geometry processing unit within Scroll picture block,[85] rotation and transformation of 3D planes,[89] manipulates 3D planes as very large polygons,[88] 24-bit fixed-point operations,[89] 28.63636 MOPS (million operations per second)
- Planes: 7 layers, 2–6 simultaneous layers (1–4 scrolling 2D backgrounds, 1–2 rotating 3D playfields, 1 back screen)[31][30][93]
- 2D scrolling backgrounds: Scrolling, parallax scrolling, single-axis 2D rotation[94]
- NBG0: 16–16,777,216 colors, tilemap (1024×1024 to 2048×2048) or bitmap (512×256 to 1024×512), column/row/line scrolling, scaling
- NBG1: 16–32,768 colors, tilemap (1024×1024 to 2048×2048) or bitmap (512×256 to 1024×512), column/row/line scrolling, scaling
- NBG2/NBG3: 16–256 colors, tilemap (1024×1024 to 2048×2048)
- 3D rotating playfields: Scrolling, scaling, dual-axis 3D rotation,[94] three-axis 3D rotation,[95] 3D infinite ground planes, perspective correct 3D rotation, can be manipulated as large polygon objects,[88] perspective transformation,[89][90] can have curved surface and bumps[91]
- RBG0: 16–16,777,216 colors, tilemap (2048×2048 to 4096×4096) or bitmap (512×256 to 512×512)
- RBG1: 16–16,777,216 colors, tilemap (2048×2048 to 4096×4096)
- Back screen: 1 plain background,[96] 1 to 240 colors (1 color/scanline)
- Tile capabilities: 8×8 and 16×16 tile sizes,[30] scroll plane up to 8192×8192 pixels,[97] rotating 3D infinite planes up to 4096×4096 pixels each,[93] tile compression, tile-based texture compression, tiled rendering, virtually unlimited draw distance
- Bitmap capabilities: Bitmap layers can be used as additional framebuffer[98] (with full transparency), displays VDP1 framebuffer as additional bitmap layer, can rotate VDP1 framebuffer[66]
- Color palette: 16,777,216 colors (24-bit), 32,768 colors (15-bit), 65,536 colors (15-bit with transparency)
- Bitmap fillrate:
- 2D scrolling planes: 26.8426–229.09088 MPixels/s
- 3D rotation planes: 26.8426–28.63636 MPixels/s[fn 36]
- Tile fillrate: 251.65824–534.77376 MPixels/s[fn 37]
Resolutions
The Saturn supported the following display resolutions:[103]
Progressive
- 320×224 (Lo‑Res)
- 320×240 (Lo‑Res)
- 320×256 (Lo-Res, PAL)
- 352×224 (Lo‑Res)
- 352×240 (Lo‑Res)
- 352×256 (PAL)
- 640×224
- 640×240
- 640×256 (PAL)
- 704×224
- 704×240
- 704×256 (PAL)
Interlaced
- 320×448
- 320×512 (PAL)
- 320×480
- 352×448
- 320×480
- 352×512 (PAL)
- 640×448 (Hi‑Res)
- 640×480 (Hi‑Res)
- 640×512 (Hi‑Res, PAL)
- 704×448 (Hi‑Res)
- 704×480 (Hi‑Res)
- 704×512 (Hi‑Res, PAL)
Memory
- 2 MB Work RAM[fn 41]
- 512 KB VDP1 texture cache VRAM[fn 45]
- 512 KB (2× 256 KB) VDP1 dual framebuffers[fn 46]
- 512 KB (512 KB) VDP2 background cache VRAM[fn 47] (tiled texture compression up to 17 MB)[fn 48]
- Optional cartridge: 512 KB to 4.5 MB
- RAM cartridge: 512 KB to 4.5 MB
- Extended RAM Cartridge: 1 MB or 4 MB Work RAM[fn 53]
- Saturn Backup Memory: 512 KB battery backup
- Pro Action Replay: 512 KB battery backup
- Action Replay Plus: 4.5 MB
- 4 MB Work RAM[fn 54]
- 512 KB battery backup
- Optional MPEG Video CD Card: 1 MB (512 KB FPM RAM buffer, 512 KB MROM program)[20][1]
Configuration
System RAM buses, all connected through the SCU:[15][44][9]
- System bus[fn 41]
- SH2 (×2), SCU, SMPC <–> Work RAM,[fn 55] battery backup SRAM
- Sound sub‑system bus — SCU, 68EC000, SCSP <‑> Sound RAM[fn 60]
- CD‑ROM sub‑system bus — SCU, SH1 <‑> CD‑ROM cache/buffer RAM[fn 60]
Bandwidth
Storage
Input/Output
- Two 16‑bit bidirectional parallel I/O ports
- High-speed serial communications port (Both SH2 SCI channels and SCSP MIDI)
- Cartridge connector
- Internal expansion port for video decoder card
- Composite video/stereo (JP Part No: HSS-0106)
- NTSC/PAL RF (US Part No.: MK-80116, JP Part No.: HSS-0110)
- S-Video compatible (JP Part No.: HSS-0105)
- RGB compatible (JP Part No.: HSS-0109)
- EDTV compatible (optional)
Power source
- AC110 volts; 60 Hz (US)
- AC240 volts; 50 Hz (EU)
- AC100 volts; 60 Hz (JP)
- AC240 volts; 60 Hz (AS)
- AC220 volts; 60 Hz (KR)
- 4 volt lithium battery to power non-volatile RAM and SMPC internal real-time clock
- Power Consumption: 25 W
Dimensions
US/European model:
260 mm (10.236")
89 mm (3.504")
230 mm (9.055")
BIOS
BIOS Version | Machine | Download |
---|---|---|
1.00 | Sega Saturn (Japan) | 1.00 (Asian Saturn) (info) ("Sega Saturn BIOS (1.00) (J).zip" does not exist) |
1.00a | Sega Saturn (NA & EU) | 1.00a (NA & EU Saturn) (info) ("Sega Saturn BIOS (1.00a) (UE).zip" does not exist) |
1.003 | Sega Saturn Devkit (Japan) | 1.003 (Asian Devkit) (info) ("Sega Saturn BIOS (1.003) (J).zip" does not exist) |
1.01 | Sega Saturn (Japan), HiSaturn (Japan), V-Saturn (Japan) | 1.01 (Asian Saturn) (info) ("Sega Saturn BIOS (1.01) (J).zip" does not exist) |
1.01 (Asian HiSaturn) (info) ("HI-Saturn BIOS (1.01) (J).zip" does not exist) | ||
1.01 (Asian V-Saturn) (info) ("V-Saturn BIOS (1.01) (J).zip" does not exist) | ||
1.01a | Sega Saturn (NA & EU) | 1.01a (NA & EU Saturn) (info) ("Sega Saturn BIOS (1.01a) (UE).zip" does not exist) |
1.02 | HiSaturn (Japan) | 1.02 (JP HiSaturn) (info) ("Bios_Hi-Saturn_1.02_(J).rar" does not exist) |
1.03 | HiSaturn Navi (Japan) | 1.03 (JP HiSaturn Navi) (info) ("Bios_GameNavi_HiSaturn_1.03.rar" does not exist) |
Errata
- See VDP1 Errata
Footnotes
- ↑ [MOPS (million operations per second) MOPS (million operations per second)]
- ↑ [1 operation per cycle[13] 1 operation per cycle[13]]
- ↑ [39 cycles per divide[14] 39 cycles per divide[14]]
- ↑ [74.454536 MIPS SH-2, 85.90908 MIPS SCU, 28.63636 MIPS VDP2 74.454536 MIPS SH-2, 85.90908 MIPS SCU, 28.63636 MIPS VDP2]
- ↑ [2x SH-2 MULT: 57.27272 MOPS[35]
2x SH-2 DIVU: 1.468531 MOPS (39 cycles per divide)[36]
SCU DSP: 28.63636 MOPS (add and multiply per cycle)
VDP2: 28.63636 MOPS 2x SH-2 MULT: 57.27272 MOPS[35]
2x SH-2 DIVU: 1.468531 MOPS (39 cycles per divide)[36]
SCU DSP: 28.63636 MOPS (add and multiply per cycle)
VDP2: 28.63636 MOPS] - ↑ [2x SH-2: 57,272,720 adds/sec (1 cycle per multiply)[35]
SCU DSP: 14,318,180 multiplies/sec (1 cycle per multiply)
VDP2: 14.31818 adds/sec 2x SH-2: 57,272,720 adds/sec (1 cycle per multiply)[35]
SCU DSP: 14,318,180 multiplies/sec (1 cycle per multiply)
VDP2: 14.31818 adds/sec] - ↑ [2x SH-2: 57,272,720 multiplies/sec (1 cycle per multiply)[37]
SCU DSP: 14,318,180 multiplies/sec (1 cycle per multiply)
VDP2: 14.31818 multiplies/sec 2x SH-2: 57,272,720 multiplies/sec (1 cycle per multiply)[37]
SCU DSP: 14,318,180 multiplies/sec (1 cycle per multiply)
VDP2: 14.31818 multiplies/sec] - ↑ [2x CPU: 3,579,545 divides/sec (16 cycles per 16-bit divide)[14]
2x DIVU: 1,468,531 divides/sec (39 cycles per divide)[36] 2x CPU: 3,579,545 divides/sec (16 cycles per 16-bit divide)[14]
2x DIVU: 1,468,531 divides/sec (39 cycles per divide)[36]] - ↑ [2x SH-2 MULT: 57.27272 MOPS (million operations per second)[35]
2x SH-2 DIVU: 1.468531 MOPS (39 cycles per divide)[36]
SCU DSP: 28.63636 MOPS (add and multiply per cycle)
VDP2: 28.63636 MOPS (only for VDP2's 3D planes) 2x SH-2 MULT: 57.27272 MOPS (million operations per second)[35]
2x SH-2 DIVU: 1.468531 MOPS (39 cycles per divide)[36]
SCU DSP: 28.63636 MOPS (add and multiply per cycle)
VDP2: 28.63636 MOPS (only for VDP2's 3D planes)] - ↑ [Transformation (21 adds/multiplies),[38] projection (4 adds/multiplies)[39] and perspective division (1 divide)[40] per vertex:
- 894,886 vertices/sec: 894,886 SCU DSP transformations (14 cycles per transform,[38] 2 cycles per projection), 894,886 SH-2 DIVU divisions (1 divide per vertex)
- 573,644 vertices/sec: 14,341,100 SH-2 MULT DSP transform/projection operations (25 cycles per vertex), 573,644 SH-2 DIVU divisions (1 divide per vertex)
- 1,011,294 vertices/sec: 41,463,054 SH-2 transform/projection/divide cycles (41 cycles per vertex)
- 894,886 vertices/sec: 894,886 SCU DSP transformations (14 cycles per transform,[38] 2 cycles per projection), 894,886 SH-2 DIVU divisions (1 divide per vertex)
- 573,644 vertices/sec: 14,341,100 SH-2 MULT DSP transform/projection operations (25 cycles per vertex), 573,644 SH-2 DIVU divisions (1 divide per vertex)
- 1,011,294 vertices/sec: 41,463,054 SH-2 transform/projection/divide cycles (41 cycles per vertex)]
- ↑ [8 vertices per cube (6 quad polygons)[41] 8 vertices per cube (6 quad polygons)[41]]
- ↑ [8 transformations (168 adds/multiplies), 6 surface normals (72 multiplies, 36 adds),[42] 6 light sources (72 adds/multiplies),[43] 8 projections (32 adds/multiplies) and 8 perspective divisions (24 divides)[39] per cube with 8 vertices and 6 quad polygons:
- 52,640 cubes/sec: 52,640 SCU DSP cubes (112 transform cycles, 72 surface normal cycles, 72 light source cycles,[43] 16 projection cycles), 1,263,360 SH-2 DIVU divisions (24 divides per cube)
- 8548 cubes/sec: 2,940,512 SH-2 MULT DSP transform/projection operations (347 cycles per cube), 205,152 SH-2 DIVU divisions (24 divides per cube)
- 72,614 cubes/sec: 52,862,992 SH-2 transform/projection/divide cycles (728 cycles per cube)
- 52,640 cubes/sec: 52,640 SCU DSP cubes (112 transform cycles, 72 surface normal cycles, 72 light source cycles,[43] 16 projection cycles), 1,263,360 SH-2 DIVU divisions (24 divides per cube)
- 8548 cubes/sec: 2,940,512 SH-2 MULT DSP transform/projection operations (347 cycles per cube), 205,152 SH-2 DIVU divisions (24 divides per cube)
- 72,614 cubes/sec: 52,862,992 SH-2 transform/projection/divide cycles (728 cycles per cube)]
- ↑ [8 transformations (168 adds/multiplies), 8 surface normals (96 multiplies, 48 adds), 8 light sources (96 adds/multiplies), 8 projections (32 adds/multiplies) and 8 perspective divisions (24 divides) per cube with 8 vertices and 6 quad polygons:
- 44,744 cubes/sec: 44,744 SCU DSP cubes (112 transform cycles, 96 surface normal cycles, 96 light source cycles, 16 projection cycles), 1,073,856 SH-2 DIVU divisions (24 divides per cube)
- 16,444 cubes/sec: 7,235,360 SH-2 MULT DSP transform/projection operations (440 cycles per cube), 394,675 SH-2 DIVU divisions (8 divides per cube)
- 58,942 cubes/sec: 48,568,208 SH-2 transform/projection/divide cycles (824 cycles per cube)
- 44,744 cubes/sec: 44,744 SCU DSP cubes (112 transform cycles, 96 surface normal cycles, 96 light source cycles, 16 projection cycles), 1,073,856 SH-2 DIVU divisions (24 divides per cube)
- 16,444 cubes/sec: 7,235,360 SH-2 MULT DSP transform/projection operations (440 cycles per cube), 394,675 SH-2 DIVU divisions (8 divides per cube)
- 58,942 cubes/sec: 48,568,208 SH-2 transform/projection/divide cycles (824 cycles per cube)]
- ↑ [Multiplexed (57.27272 MB/s VDP1, 57.27272 MB/s VDP2), 16-bit per VDP, 28.63636 MHz[44][45]
- Maximum VDP1 polygon transfer: 1,789,772 polygons/sec (57.272704 MB/s, 32 bytes per polygon)[46]
- Maximum VDP1 polygon transfer: 1,789,772 polygons/sec (57.272704 MB/s, 32 bytes per polygon)[46]]
- ↑ [8-bit, 28.63636 MHz[45] 8-bit, 28.63636 MHz[45]]
- ↑ VDP1: 28.63636 MPixels/s (15-bit color), 35.6465 MPixels/s (8-bit color)
VDP2: 26.8426–28.63636 MPixels/s (24-bit color), 53.6852–57.27272 MPixels/s (15-bit color), 107.3704–114.54544 MPixels/s (8-bit color), 214.7408–229.09088 MPixels/s (4-bit color) - ↑ [VDP1: 28.63636–35.6465 MPixels/s
VDP2: 251.65824–534.77376 MPixels/s VDP1: 28.63636–35.6465 MPixels/s
VDP2: 251.65824–534.77376 MPixels/s] - ↑ [57.27272 MB/s per bus 57.27272 MB/s per bus]
- ↑ [28.63636 MHz texture cache, 28.63636 MHz draw/render framebuffer, 28.63636 MHz display/erase framebuffer[29] 28.63636 MHz texture cache, 28.63636 MHz draw/render framebuffer, 28.63636 MHz display/erase framebuffer[29]]
- ↑ [1 cycle per pixel[27][75][28] 1 cycle per pixel[27][75][28]]
- ↑ [28.63636 MPixels/s draw, 14.418 MPixels/s erase/write[76][77] 28.63636 MPixels/s draw, 14.418 MPixels/s erase/write[76][77]]
- ↑ [164,576 Gouraud-shaded 10×10 polygons/sec: 57.27272 million parallel bus cycles/sec, 248 cycles overhead per polygon (16 cycles command table fetch,[78] 232 cycles Gouraud shading),[79] 348 cycles per polygon (100 cycles drawing per 100-pixel polygon)[80] 164,576 Gouraud-shaded 10×10 polygons/sec: 57.27272 million parallel bus cycles/sec, 248 cycles overhead per polygon (16 cycles command table fetch,[78] 232 cycles Gouraud shading),[79] 348 cycles per polygon (100 cycles drawing per 100-pixel polygon)[80]]
- ↑ [Takes six times longer when using VDP1's RGB mode.[60] When using VDP2 palette mode, the VDP1 draws shadowed/translucent objects at full speed. Takes six times longer when using VDP1's RGB mode.[60] When using VDP2 palette mode, the VDP1 draws shadowed/translucent objects at full speed.]
- ↑ [Drawing process is asynchronous,[78] commands/textures read from texture cache and pixels/texels written to rendering framebuffer in parallel (57.27272 million parallel bus cycles/sec),[81] 148 textured 504×255 polygons/sec (386,905 parallel cycles per polygon), 136,363 textured 10×10 polygons/sec (420 parallel cycles per polygon), 189,644 textured 8×8 polygons/sec (302 parallel cycles per polygon)[79] Drawing process is asynchronous,[78] commands/textures read from texture cache and pixels/texels written to rendering framebuffer in parallel (57.27272 million parallel bus cycles/sec),[81] 148 textured 504×255 polygons/sec (386,905 parallel cycles per polygon), 136,363 textured 10×10 polygons/sec (420 parallel cycles per polygon), 189,644 textured 8×8 polygons/sec (302 parallel cycles per polygon)[79]]
- ↑ [57.27272 million parallel bus cycles/sec, 147 textured 504×255 polygons/sec (387,137 parallel cycles per polygon), 87,841 textured 10×10 polygons/sec (652 parallel cycles per polygon)[79][80] 57.27272 million parallel bus cycles/sec, 147 textured 504×255 polygons/sec (387,137 parallel cycles per polygon), 87,841 textured 10×10 polygons/sec (652 parallel cycles per polygon)[79][80]]
- ↑ [Flat shading: 16 cycles per polygon in 28.63636 MHz texture cache,[78] 1 cycle per pixel in 28.63636 MHz framebuffer Flat shading: 16 cycles per polygon in 28.63636 MHz texture cache,[78] 1 cycle per pixel in 28.63636 MHz framebuffer]
- ↑ [57.27272 million parallel bus cycles/sec, 248 cycles overhead per polygon (16 cycles command table fetch,[78] 232 cycles Gouraud shading),[79] 32 cycles drawing per 32-pixel polygon[80] 57.27272 million parallel bus cycles/sec, 248 cycles overhead per polygon (16 cycles command table fetch,[78] 232 cycles Gouraud shading),[79] 32 cycles drawing per 32-pixel polygon[80]]
- ↑ [57.27272 million parallel bus cycles/sec, 171 parallel cycles per polygon[79] 57.27272 million parallel bus cycles/sec, 171 parallel cycles per polygon[79]]
- ↑ [200,000 texture-mapped polygons/sec,[82][34] 57.27272 million parallel bus cycles/sec, 285 parallel cycles per polygon[79] 200,000 texture-mapped polygons/sec,[82][34] 57.27272 million parallel bus cycles/sec, 285 parallel cycles per polygon[79]]
- ↑ [57.27272 million parallel bus cycles/sec, 403 parallel cycles per polygon[79][80] 57.27272 million parallel bus cycles/sec, 403 parallel cycles per polygon[79][80]]
- ↑ [4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84] 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84]]
- ↑ [2 memory cycles per pixel (8 memory cycles per 4 pixels)[83][101] 2 memory cycles per pixel (8 memory cycles per 4 pixels)[83][101]]
- ↑ [1 pixel per memory cycle (4 pixels per 4 memory cycles)[83][101] 1 pixel per memory cycle (4 pixels per 4 memory cycles)[83][101]]
- ↑ [2 pixels per memory cycle (4 pixels per 2 memory cycles)[83][101] 2 pixels per memory cycle (4 pixels per 2 memory cycles)[83][101]]
- ↑ [4 pixels per memory cycle[83][101] 4 pixels per memory cycle[83][101]]
- ↑ [2 memory cycles per pixel (8 memory cycles per 4 pixels)[83][101] 2 memory cycles per pixel (8 memory cycles per 4 pixels)[83][101]]
- ↑ [4096×4096 texel texture, 1024×1024 texel texture, 30 frames per second[102] 4096×4096 texel texture, 1024×1024 texel texture, 30 frames per second[102]]
- ↑ [1024×1024 to 2048×2048 pixel tilemaps 1024×1024 to 2048×2048 pixel tilemaps]
- ↑ [4x 128×128 tiles[93] 4x 128×128 tiles[93]]
- ↑ [2048×2048 to 4096×4096 texel textures 2048×2048 to 4096×4096 texel textures]
- ↑ 41.0 41.1 41.2 [32‑bit, 28.63636 MHz 32‑bit, 28.63636 MHz]
- ↑ [28.63636 MHz, 34 ns[104][105][106] 28.63636 MHz, 34 ns[104][105][106]]
- ↑ [22.222222 MHz, 45 ns cycles, 70 ns access[107][108][109] 22.222222 MHz, 45 ns cycles, 70 ns access[107][108][109]]
- ↑ [SDRAM, 80-bit SDRAM, 80-bit]
- ↑ [16‑bit, 28.63636 MHz, 34 ns[104][105][106] 16‑bit, 28.63636 MHz, 34 ns[104][105][106]]
- ↑ [32‑bit, 28.63636 MHz (2x 16-bit), 34 ns[110][106] 32‑bit, 28.63636 MHz (2x 16-bit), 34 ns[110][106]]
- ↑ [32‑bit (2x 16-bit), 57.27272 MHz, 17 ns,[110][106] 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84] 32‑bit (2x 16-bit), 57.27272 MHz, 17 ns,[110][106] 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84]]
- ↑ [17 MB textures (4096×4096 and 1024×1024 texels, 8-bit palettes) compressed in 512 KB VDP2 memory 17 MB textures (4096×4096 and 1024×1024 texels, 8-bit palettes) compressed in 512 KB VDP2 memory]
- ↑ [FPM DRAM, 16‑bit, 20 MHz, 50 ns cycles, 70 ns access[111][112] FPM DRAM, 16‑bit, 20 MHz, 50 ns cycles, 70 ns access[111][112]]
- ↑ [FPM DRAM, 16‑bit, 20 MHz, 50 ns cycles, 80 ns access[113][109] FPM DRAM, 16‑bit, 20 MHz, 50 ns cycles, 80 ns access[113][109]]
- ↑ NVRAM, 8‑bit, 10 MHz, 100 ns[114][115]
- ↑ MROM/EPROM, 16‑bit, 10 MHz[18][116]
- ↑ [FPM DRAM, 16-bit, 22.222222 MHz, 45 ns cycles, 70 ns access[117][118] FPM DRAM, 16-bit, 22.222222 MHz, 45 ns cycles, 70 ns access[117][118]]
- ↑ [FPM DRAM, 16-bit, 25 MHz, 40 ns cycles, 60 ns access[44][119][120] FPM DRAM, 16-bit, 25 MHz, 40 ns cycles, 60 ns access[44][119][120]]
- ↑ [2× SDRAM, 2× FPM DRAM 2× SDRAM, 2× FPM DRAM]
- ↑ [80-bit 80-bit]
- ↑ [16-bit, 28.63636 MHz 16-bit, 28.63636 MHz]
- ↑ 58.0 58.1 58.2 [SDRAM, 16-bit, 28.63636 MHz SDRAM, 16-bit, 28.63636 MHz]
- ↑ [2x SDRAM, 32-bit (2x 16-bit),[26] 57.27272 MHz (2x 28.63636 MHz), 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84] 2x SDRAM, 32-bit (2x 16-bit),[26] 57.27272 MHz (2x 28.63636 MHz), 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84]]
- ↑ 60.0 60.1 [FPM DRAM, 16-bit, 28.63636 MHz FPM DRAM, 16-bit, 28.63636 MHz]
- ↑ [7 buses, 144-bit bus width 7 buses, 144-bit bus width]
- ↑ [114.54544 MB/s SDRAM, 88.888888 MB/s FPM DRAM 114.54544 MB/s SDRAM, 88.888888 MB/s FPM DRAM]
- ↑ [8‑bit, 10 MHz 8‑bit, 10 MHz]
- ↑ [SDRAM, 4 buses, 80-bit bus width, 28.63636 MHz SDRAM, 4 buses, 80-bit bus width, 28.63636 MHz]
- ↑ [114.54544 MB/s framebuffers, 57.27272 MB/s texture cache, 48-bit bus width 114.54544 MB/s framebuffers, 57.27272 MB/s texture cache, 48-bit bus width]
- ↑ [32-bit bus width, 57.27272 MHz (2x 28.63636 MHz), 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84] 32-bit bus width, 57.27272 MHz (2x 28.63636 MHz), 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84]]
- ↑ [534.77376 megapixels/sec fillrate, 8-bit palettes 534.77376 megapixels/sec fillrate, 8-bit palettes]
- ↑ 68.0 68.1 [FPM DRAM, 16‑bit, 20 MHz FPM DRAM, 16‑bit, 20 MHz]
- ↑ [114.54544 MB/s per SH2 114.54544 MB/s per SH2]
- ↑ [32‑bit, 20 MHz 32‑bit, 20 MHz]
- ↑ [171.81816 MB/s for 3 buses, 114.54544 MB/s for 1 bus 171.81816 MB/s for 3 buses, 114.54544 MB/s for 1 bus]
- ↑ [2 MB/s RAM, 5 MB/s ROM 2 MB/s RAM, 5 MB/s ROM]
- ↑ [16‑bit, 11.29 MHz 16‑bit, 11.29 MHz]
- ↑ [24‑bit, 22.58 MHz 24‑bit, 22.58 MHz]
- ↑ [171.81816 MB/s VDP1, 114.54544 MB/s VDP2 color RAM cache 171.81816 MB/s VDP1, 114.54544 MB/s VDP2 color RAM cache]
- ↑ [16‑bit, 10 MHz 16‑bit, 10 MHz]
- ↑ [FPM DRAM, 16-bit, 22.222222 MHz FPM DRAM, 16-bit, 22.222222 MHz]
- ↑ [FPM DRAM, 16-bit, 25 MHz FPM DRAM, 16-bit, 25 MHz]
References
- ↑ 1.00 1.01 1.02 1.03 1.04 1.05 1.06 1.07 1.08 1.09 1.10 1.11 Sega Saturn hardware notes (2004-04-27)
- ↑ 2.0 2.1 File:Hitachi SuperH Programming Manual.pdf
- ↑ File:SH7604 Hardware Manual.pdf
- ↑ File:SH-2A.pdf, page 2
- ↑ SH7040, SH7041, SH7042, SH7043, SH7044, SH7045, Renesas
- ↑ File:Hitachi SuperH Programming Manual.pdf, page 390
- ↑ 7.0 7.1 7.2 File:SH7604 Hardware Manual.pdf, page 3
- ↑ File:SH7604 Hardware Manual.pdf, page 219
- ↑ 9.00 9.01 9.02 9.03 9.04 9.05 9.06 9.07 9.08 9.09 9.10 9.11 9.12 9.13 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf
- ↑ 10.0 10.1 File:SH7604 Hardware Manual.pdf, page 22
- ↑ File:ST-103-R1-040194.pdf, page 23
- ↑ 12.0 12.1 File:SH7604 Hardware Manual.pdf, page 303
- ↑ File:Hitachi SuperH Programming Manual.pdf, page 31
- ↑ 14.0 14.1 File:Hitachi SuperH Programming Manual.pdf, page 155
- ↑ 15.0 15.1 15.2 15.3 15.4 15.5 15.6 15.7 File:ST-103-R1-040194.pdf
- ↑ 16.0 16.1 File:ST-097-R5-072694.pdf
- ↑ 17.0 17.1 File:ST-TECH.pdf, page 157
- ↑ 18.0 18.1 18.2 18.3 18.4 18.5 18.6 18.7 Sega Saturn (MAME)
- ↑ 19.0 19.1 File:HD40491 datasheet.pdf
- ↑ 20.0 20.1 20.2 20.3 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 12
- ↑ 21.0 21.1 File:ST-077-R2-052594.pdf
- ↑ 22.0 22.1 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 42
- ↑ 23.0 23.1 Sega Saturn FAQ (January 8, 2000)
- ↑ Obsolete Microprocessors
- ↑ 25.0 25.1 25.2 25.3 25.4 File:ST-013-R3-061694.pdf
- ↑ 26.0 26.1 26.2 File:ST-058-R2-060194.pdf
- ↑ 27.0 27.1 27.2 27.3 27.4 27.5 27.6 27.7 File:ST-013-R3-061694.pdf, page 52
- ↑ 28.0 28.1 28.2 28.3 File:ST-013-R3-061694.pdf, page 64
- ↑ 29.0 29.1 File:ST-013-R3-061694.pdf, page 6
- ↑ 30.0 30.1 30.2 File:ST-058-R2-060194.pdf, page 24
- ↑ 31.0 31.1 31.2 STV VDP2 (MAME)
- ↑ 32.0 32.1 File:ST-013-R3-061694.pdf, page 18
- ↑ 33.0 33.1 33.2 33.3 STV VDP1 (MAME)
- ↑ 34.0 34.1 34.2 34.3 34.4 34.5 34.6 File:NextGeneration US 24.pdf, page 64
- ↑ 35.0 35.1 35.2 File:SH7604 Hardware Manual.pdf, page 51
- ↑ 36.0 36.1 36.2 File:Hitachi SuperH Programming Manual.pdf, page 308
- ↑ File:SH7604 Hardware Manual.pdf, page 36
- ↑ 38.0 38.1 File:ST-240-A-SP1-052295.pdf, page 8
- ↑ 39.0 39.1 Design of Digital Systems and Devices (page 97)
- ↑ 3D Polygon Rendering Pipeline (page 50)
- ↑ File:ST-237-R1-051795.pdf, page 51
- ↑ Design of Digital Systems and Devices (page 95)
- ↑ 43.0 43.1 [Sega DTS, March 1996, DSP Demo Sega DTS, March 1996, DSP Demo]
- ↑ 44.0 44.1 44.2 44.3 File:13-APR-94.pdf, page 8
- ↑ 45.0 45.1 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 14
- ↑ 46.0 46.1 46.2 File:ST-013-R3-061694.pdf, page 40
- ↑ File:ST-103-R1-040194.pdf, page 17
- ↑ 48.0 48.1 File:ST-097-R5-072694.pdf, page 93
- ↑ 49.0 49.1 49.2 File:ST-TECH.pdf, page 149
- ↑ File:ST-TECH.pdf, page 152
- ↑ File:ST-103-R1-040194.pdf, page 25
- ↑ File:ST-TECH.pdf, page 163
- ↑ The State of Sega Saturn Homebrew
- ↑ 54.0 54.1 Pure Entertainment Interview
- ↑ File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 34
- ↑ File:TUTORIAL.pdf, page 11
- ↑ 57.0 57.1 57.2 File:ST-TECH.pdf, page 147
- ↑ File:ST-TECH.pdf, page 135
- ↑ File:ST-013-R3-061694.pdf, page 34
- ↑ 60.0 60.1 60.2 60.3 File:ST-013-R3-061694.pdf, page 110
- ↑ File:ST-238-R1-051795.pdf
- ↑ 62.0 62.1 File:ST-238-R1-051795.pdf, page 232
- ↑ 63.0 63.1 File:ST-013-R3-061694.pdf, page 41
- ↑ File:ST-013-R3-061694.pdf, page 24
- ↑ Sega Saturn 3D Capabilities
- ↑ 66.0 66.1 File:ST-058-R2-060194.pdf, page 177
- ↑ File:ST-013-R3-061694.pdf, page 149
- ↑ Sega Saturn Tech Specs
- ↑ Sega System 24 Hardware Notes (2013-06-16)
- ↑ File:ST-013-R3-061694.pdf, page 119
- ↑ File:ST-013-R3-061694.pdf, page 29
- ↑ File:ST-013-R3-061694.pdf, page 81
- ↑ 73.0 73.1 File:ST-013-R3-061694.pdf, page 75
- ↑ File:ST-013-R3-061694.pdf, page 39
- ↑ File:ST-013-R3-061694.pdf, page 35
- ↑ File:ST-013-R3-061694.pdf, page 65
- ↑ File:ST-013-R3-061694.pdf, page 61
- ↑ 78.0 78.1 78.2 78.3 File:TUTORIAL.pdf, page 15
- ↑ 79.0 79.1 79.2 79.3 79.4 79.5 79.6 File:TUTORIAL.pdf, page 8
- ↑ 80.0 80.1 80.2 80.3 80.4 Saturn VDP1 hardware notes (2003-05-17)
- ↑ File:ST-013-R3-061694.pdf, page 44
- ↑ 82.0 82.1 File:SegaVisions US 24.pdf, page 14
- ↑ 83.0 83.1 83.2 83.3 83.4 83.5 83.6 83.7 83.8 File:ST-TECH.pdf, page 142
- ↑ 84.0 84.1 84.2 84.3 File:ST-058-R2-060194.pdf, page 162
- ↑ 85.0 85.1 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 38
- ↑ File:ST-058-R2-060194.pdf, page 163
- ↑ Sonic R
- ↑ 88.0 88.1 88.2 File:TUTORIAL.pdf, page 223
- ↑ 89.0 89.1 89.2 89.3 File:ST-TECH.pdf, page 165
- ↑ 90.0 90.1 [Mass Destruction, developer note Mass Destruction, developer note]
- ↑ 91.0 91.1 [Sega DTS, March 1996, Coefficient Table Madness Demo Sega DTS, March 1996, Coefficient Table Madness Demo]
- ↑ File:Edge UK 030.pdf, page 99
- ↑ 93.0 93.1 93.2 File:ST-058-R2-060194.pdf, page 132
- ↑ 94.0 94.1 File:13-APR-94.pdf, page 12
- ↑ [Sega DTS, March 1996, Dual Rotating Background Demos Sega DTS, March 1996, Dual Rotating Background Demos]
- ↑ File:ST-058-R2-060194.pdf, page 23
- ↑ File:13-APR-94.pdf, page 28
- ↑ File:ST-058-R2-060194.pdf, page 54
- ↑ File:ST-058-R2-060194.pdf, page 79
- ↑ File:ST-058-R2-060194.pdf, page 360
- ↑ 101.0 101.1 101.2 101.3 101.4 File:ST-058-R2-060194.pdf, page 49
- ↑ Sega Saturn interesting finds
- ↑ File:ST-103-R1-040194.pdf, page 39
- ↑ 104.0 104.1 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 26
- ↑ 105.0 105.1 File:HM5241605 datasheet.pdf
- ↑ 106.0 106.1 106.2 106.3 File:UPD4504161 datasheet.pdf
- ↑ File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 51
- ↑ File:TC514260B datasheet.pdf
- ↑ 109.0 109.1 File:HM514260 datasheet.pdf
- ↑ 110.0 110.1 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 37
- ↑ File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 46
- ↑ File:HM514270D datasheet.pdf
- ↑ File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 55
- ↑ File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 32
- ↑ File:SRM20256L datasheet.pdf
- ↑ File:TC574200D datasheet.pdf
- ↑ 「セガサターン拡張RAMカートリッジ 回路図」
- ↑ File:HM514260C datasheet.pdf
- ↑ Sega Saturn Memory Cartridge Interface
- ↑ File:KM48C2100A datasheet.pdf