Difference between revisions of "Sega Saturn/Technical specifications"

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::* 2x DIVU division units: 16/32/64-bit division,{{fileref|SH7604 Hardware Manual.pdf|page=303}} 1,468,531 divides/sec{{ref|39 cycles per divide{{fileref|Hitachi SuperH Programming Manual.pdf|page=155}}|group=fn}}
 
::* 2x DIVU division units: 16/32/64-bit division,{{fileref|SH7604 Hardware Manual.pdf|page=303}} 1,468,531 divides/sec{{ref|39 cycles per divide{{fileref|Hitachi SuperH Programming Manual.pdf|page=155}}|group=fn}}
 
:* [[wikipedia:Bus (computing)|Bus]] width: 64‑bit (2× 32‑bit) internal, 32‑bit external{{fileref|ST-103-R1-040194.pdf}}
 
:* [[wikipedia:Bus (computing)|Bus]] width: 64‑bit (2× 32‑bit) internal, 32‑bit external{{fileref|ST-103-R1-040194.pdf}}
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:* Word length: [[32-bit era|32-bit]]
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:* Word length: 32-bit
 
* System coprocessor: Custom Saturn Control Unit (SCU), with DSP for geometry processing and DMA controller for system control{{fileref|ST-103-R1-040194.pdf}}{{fileref|Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf}}{{fileref|ST-097-R5-072694.pdf}}
 
* System coprocessor: Custom Saturn Control Unit (SCU), with DSP for geometry processing and DMA controller for system control{{fileref|ST-103-R1-040194.pdf}}{{fileref|Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf}}{{fileref|ST-097-R5-072694.pdf}}
 
:* System control processor: 32‑bit fixed‑point registers/instructions, [[wikipedia:Raster interrupt|interrupt]] controller, DMA controller, 3 [[wikipedia:Direct memory access|DMA]] channels
 
:* System control processor: 32‑bit fixed‑point registers/instructions, [[wikipedia:Raster interrupt|interrupt]] controller, DMA controller, 3 [[wikipedia:Direct memory access|DMA]] channels

Latest revision as of 03:18, 30 November 2020

Back to: Sega Saturn.

Technical specifications for the Sega Saturn.

Processors

  • Configuration: Master/Slave
  • 2x CPU cores: 32‑bit RISC instructions/registers, 74.454536 MIPS (37.227268 MIPS each, 1.3 MIPS per MHz),[4][5] up to 4 instructions/cycle (2 instructions/cycle per SH-2)[6]
  • 2x DMA units: 2x DMAC (Direct Memory Access Controller),[7] parallel processing[8]
  • 4x internal fixed‑point math processors:[9] 2x MULT multiplier DSP,[7][10][11] 2x DIVU division units,[7][10] parallel processing[12]
  • 2x MULT multiplier DSP: 57.27272 MOPS[fn 1] fixed-point math (28.63636 MOPS per SH-2)[fn 2]
  • 2x DIVU division units: 16/32/64-bit division,[12] 1,468,531 divides/sec[fn 3]
  • Bus width: 64‑bit (2× 32‑bit) internal, 32‑bit external[15]
  • Word length: 32-bit
  • System coprocessor: Custom Saturn Control Unit (SCU), with DSP for geometry processing and DMA controller for system control[15][9][16]
  • System control processor: 32‑bit fixed‑point registers/instructions, interrupt controller, DMA controller, 3 DMA channels
  • Math coprocessor: Geometry DSP @ 14.31818 MHz, 32‑bit fixed‑point instructions, 6 parallel instructions per cycle,[17] 85.90908 MIPS (6 MIPS per MHz)
  • CD‑ROM CPU: Hitachi SH-1 32‑bit RISC processor @ 20 MHz (20 MIPS)[2] (controlling the CD‑ROM)
  • Contains internal DAC and internal math processor[9]
  • Bus width: 32‑bit internal, 16‑bit external[15]
  • RTC: 1 MHz[15] (real‑time clock)
  • Instruction set: 4‑bit instructions, 890 ns per instruction,[19] 1.123595 MIPS
  • Bus width: 10‑bit internal, 8‑bit external[9]
  • MPEG Video decoder: Sega P/N 315-5765 (Hitachi HD814101FE)
  • MPEG Audio decoder: Hitachi HD814102F

Audio

  • Sound DSP: Yamaha FH1 DSP (Digital Signal Processor) @ 22.58 MHz[22][15] (24‑bit, 128‑step,[23] 4 parallel instructions)
  • Bus width: 24‑bit internal, 16‑bit external[9]
  • Bus width: 16‑bit internal, 16‑bit external

Sound

Main article: Saturn Custom Sound Processor.
  • CD‑DA: 1 streaming CD‑DA channel (16‑bit PCM, 44.1 kHz) from CD
  • Stereo audio output

Video

  • Sega/Hitachi VDP1 @ 28.63636 MHz: Handles sprite/texture and polygon drawing[25][18]
  • Bus width: 48‑bit (3x 16‑bit)[9]
  • Word length: 16-bit
  • Sega/Yamaha VDP2 @ 28.63636 MHz: Backgrounds, scrolling, handles background, scroll and 3D rotation planes[26][18]
  • Bus width: 32‑bit[9]
  • Word length: 32-bit
  • Sony CXA1645M RGB‑Composite Video Encoder[18]

Graphics

  • Graphics pipeline:
  • 3 DSP geometry processors: 2× SH-2 DSP, SCU DSP
  • 2 VDP rendering processors: VDP1 for sprites/textures/polygons, VDP2 for planes/backgrounds/textures
  • Video clock rate: 28.63636 MHz MHz (NTSC),[27][1] 28.4375 MHz (PAL)[27]
  • NTSC dot clock: 7.15909 MHz (lo-res),[1] 14.31818 MHz (hi-res)
  • PAL dot clock: 7.109375 MHz (lo-res), 14.21875 MHz (hi-res)
  • NTSC overscan resolution: 453×263 (lo-res),[1] 907×263 (hi-res)
  • PAL overscan resolution: 454×313 (lo-res), 908×313 (hi-res)
  • Maximum frame rate: 60 FPS (NTSC), 50 FPS (PAL)
  • Color palette: 16,777,216 (VDP2), 32,768 (VDP1)
  • Colors on screen: 256 to 16,777,216 (VDP2), 256 to 32,768 (VDP1)
  • VDP2 colors per background: 16 colors (4-bit) to 16,777,216 colors (24-bit)[30][31]
  • VDP1 colors per sprite/polygon: 16 colors (4-bit) to 32,768 colors (15-bit)[32][33]
  • CLUT: Virtually unlimited number of CLUTs[34]
  • DSP geometry processing: 188 MIPS (million instructions per second)[fn 4]
  • Fixed-point operations: 114 MOPS (million operations per second)[fn 5]
  • Additions: 85 million adds/sec[fn 6]
  • Multiplications: 85 million multiplies/sec[fn 7]
  • 16-bit divisions: 5 million divides/sec[fn 8]
  • Geometry calculations: 114 MOPS fixed-point calculations[fn 9]
  • Transmission bus bandwidth: 143 MB/s
  • Optional MPEG Video CD Card: 704×480 resolution, 30 frames/sec, 16‑bit audio with 44.1 kHz sampling,[47] up to 72 minutes on one CD[20]

SCU DSP

  • SCU math coprocessor: Geometry DSP @ 14.31818 MHz, 32‑bit fixed‑point instructions[16][48][49]
  • Parallel units: 32/48-bit ALU (arithmetic logic unit), 48/64‑bit Multiplier, 32-bit instruction decoder
  • Internal: 4 parallel buses, 32-bit per bus, 128-bit overall bus width, 3 buses at 14.31818 MHz, 1 bus at 28.63636 MHz
  • External: 32-bit, 28.63636 MHz
  • Cache RAM: 2 KB (1 KB data, 1 KB program)[51]
  • Instructions: 6 parallel instructions/cycle (one instruction per unit/bus),[17] 85.90908 MIPS (6 MIPS/MHz)
  • Fixed-point operations: 28.63636 MOPS (million operations per second), 2 MOPS/MHz (2 parallel operations/cycle)
  • Capabilities: Matrix and vector calculations, 3D point transformations, lighting calculations, fixed-point calculations,[49] faster than SH-2,[52] can use DMA to directly fetch and store vertex data, floating-point operations, geometry transformations, voxel rendering acceleration, fast coordinate transformations, lighting computations,[53] transparency calculations[54]
  • Notes: Can only be programmed with assembly language, more difficult to program than SH-2[49]

VDP1

Main article: VDP1 (Saturn).
  • VDP1 @ 28.63636 MHz: Handles sprite/texture and polygon drawing,[25] color calculation and shading,[9] geometry[34]
  • Versions: Sega 315‑5883 (Hitachi HD64440) Video Display Processor 1 (VDP1),[18] Sega 315‑5689 VDP1[9]
  • Adjustable video clock rate: 28.63636 MHz or 26.8465875 MHz (NTSC),[27][1] 28.4375 MHz or 26.8426 MHz (PAL)[27]
  • Parallel data bus structure: 3 parallel data buses (dual framebuffers, texture cache), 48-bit data bus width (16-bit per bus),[55] 171.8184 MB/s bandwidth[fn 18]
  • Parallel data bus cycles: 85.90908 million bus cycles/sec[fn 19]
  • Color palette: 32,768 colors (15-bit RGB) to 16,777,216 (24-bit VDP2 CRAM palette, accessible by VDP1)[56]
  • Colors on screen: 32,768 colors (15-bit RGB) to 1,048,576 colors (15-bit RGB, 32 transparency levels using VDP2 palette)[57]
  • Colors per pixel: 32,768 colors (16bpp, 15-bit RGB), 256 colors (8bpp, 8-bit palette)
  • Framebuffer capabilities: Double buffering, dual 256 KB framebuffers, rotation & scaling,[33] VDP1 framebuffer can be rotated as bitmap layer by VDP2[66]
  • Framebuffer resolution: 512×256, 512×512, 1024×256[67]
  • Overscan resolution: 1708×263 (NTSC), 1820×313 (PAL), 852×525 (31KC), 848×562 (HDTV)[28]
  • Sprite/Texture size: 8×1 to 504×255 texels[70]
  • Colors per sprite/texture in Lo-Res: 16, 64, 128, 256, and 32,768[32]
  • Colors per sprite/texture in Hi-Res: 16, 64, 128, and 256[71]
  • Maximum texels per scanline: 1812 (NTSC),[27] 1820 (PAL)[28]
  • Maximum sprites/textures per scanline: 226 (NTSC), 227 (PAL)
  • Sprite/Polygon size: 32 bytes (flat shading),[46][73] 40 bytes (Gouraud shading),[74] 64–96 bytes (shadows),[60] 72–104 bytes (shadows, Gouraud shading)
  • Texture size: 4 bytes (8×1 texels, 16 colors) to 251.02 KB (504×255 texels, 32,758 colors)[73]
  • Maximum sprites per frame: 16,383 (virtually unlimited),[34] 13,106 (Gouraud shading), 5461–8191 (shadows)
  • Maximum polygons per frame: 16,384 (flat shading), 16,383 (texture mapping), 13,107 (Gouraud shading), 13,106 (texture mapping, Gouraud shading), 8192 (shadows), 8191 (texture mapping, shadows), 7281 (texture mapping, shadows, Gouraud shading)
  • Gouraud shading: 28 MPixels/s (512×512 polygons),
    16 MPixels/s (10×10 polygons)[fn 22]
  • Shadows/Translucency: 28 MPixels/s (VDP2 palette), 5 MPixels/s (RGB)[fn 23]
  • Gouraud shading: 19 MTexels/s (504×255 textures), 9 MTexels/s (10×10 textures)[fn 25]
  • 800,000 polygons/s: Flat shading, 32-pixel polygons
  • 500,000 polygons/s: Flat shading,[82][34] 50-pixel polygons
  • 200,000 polygons/s: Gouraud shading, 32-pixel polygons[fn 27]
  • Texture mapping performance: Lighting[63][80]
  • 300,000 polygons/s: 32-texel textures[fn 28]
  • 200,000 polygons/s: 70-texel textures[fn 29]
  • 140,000 polygons/s: Gouraud shading, 32-texel textures[fn 30]

VDP2

Main article: VDP2 (Saturn).
  • VDP2 @ 57.27272 MHz: Handles background, scroll and 3D rotation planes[26]
  • Versions: Sega 315‑5890 (Yamaha) Video Display Processor 2 (VDP2),[18] Yamaha 315‑5690 VDP2[9]
  • Video clock rate: 26.8426–28.63636 MHz (NTSC), 26.6564–28.4375 MHz (PAL)[27][1]
  • Memory clock rate: 53.6852–57.27272 MHz (NTSC), 53.3128–56.875 MHz (PAL)[fn 31]
  • VDP2 cores: 4 parallel cores (17 units), 28.63636 MHz per core[85]
  • Bus control
  • H/V counter & timing generator
  • Scroll picture block: 8 units (Normal picture coordinate calculation, Rotation picture coordinate calculation, Pattern name control, Window control, Character control, Line picture control, VRAM control, Dot data control)
  • Video process: 7 units (Color offset & shadow, Output data control, Color computing control, Color RAM, Priority control, Color RAM control, Sprite control)
  • 3D infinite planes: Can be manipulated as large polygon objects,[88] with perspective transformation[89][90] and rotation. Can have curved surface and bumps,[91] and be used for grounds, walls, ceilings, seas, skies, etc.
  • Visual effects: Water, fire, fog, heat haze, misting, reflective water surfaces[92]
  • Rotation picture coordinate calculation: Geometry processing unit within Scroll picture block,[85] rotation and transformation of 3D planes,[89] manipulates 3D planes as very large polygons,[88] 24-bit fixed-point operations,[89] 28.63636 MOPS (million operations per second)
  • Planes: 7 layers, 2–6 simultaneous layers (1–4 scrolling 2D backgrounds, 1–2 rotating 3D playfields, 1 back screen)[31][30][93]
  • 2D scrolling backgrounds: Scrolling, parallax scrolling, single-axis 2D rotation[94]
  • NBG0: 16–16,777,216 colors, tilemap (1024×1024 to 2048×2048) or bitmap (512×256 to 1024×512), column/row/line scrolling, scaling
  • NBG1: 16–32,768 colors, tilemap (1024×1024 to 2048×2048) or bitmap (512×256 to 1024×512), column/row/line scrolling, scaling
  • NBG2/NBG3: 16–256 colors, tilemap (1024×1024 to 2048×2048)
  • RBG0: 16–16,777,216 colors, tilemap (2048×2048 to 4096×4096) or bitmap (512×256 to 512×512)
  • RBG1: 16–16,777,216 colors, tilemap (2048×2048 to 4096×4096)
  • Back screen: 1 plain background,[96] 1 to 240 colors (1 color/scanline)
  • Tile capabilities: 8×8 and 16×16 tile sizes,[30] scroll plane up to 8192×8192 pixels,[97] rotating 3D infinite planes up to 4096×4096 pixels each,[93] tile compression, tile-based texture compression, tiled rendering, virtually unlimited draw distance
  • Bitmap capabilities: Bitmap layers can be used as additional framebuffer[98] (with full transparency), displays VDP1 framebuffer as additional bitmap layer, can rotate VDP1 framebuffer[66]
  • Color palette: 16,777,216 colors (24-bit), 32,768 colors (15-bit), 65,536 colors (15-bit with transparency)
  • Colors per plane: 16,777,216 colors (3 planes, Lo-Res), 32,768 colors (4 planes), 16–256 colors (6 planes)[99][100]
  • 2D scrolling planes: 26.8426–229.09088 MPixels/s
  • 16,777,216 colors on screen: 26.8426–28.63636 MPixels/s[fn 32]
  • 32,768 colors per plane: 53.6852–57.27272 MPixels/s[fn 33]
  • 256 colors per plane: 107.3704–114.54544 MPixels/s[fn 34]
  • 16 colors per plane: 214.7408–229.09088 MPixels/s[fn 35]
  • 3D rotation planes: 26.8426–28.63636 MPixels/s[fn 36]
  • 2D scrolling planes: 251.65824–503.31648 MPixels/s[fn 38]
  • Tile fillrate: 3,932,160 tiles/sec, 65,536 tiles per frame[fn 39]
  • 3D rotating playfields: 251.65824–503.31648 MPixels/s[fn 40]
  • Effective polygon fillrate: 1 million texture-mapped polygons/sec (500-texel polygons)

Resolutions

The Saturn supported the following display resolutions:[103]

Progressive

  • 320×224 (Lo‑Res)
  • 320×240 (Lo‑Res)
  • 320×256 (Lo-Res, PAL)
  • 352×224 (Lo‑Res)
  • 352×240 (Lo‑Res)
  • 352×256 (PAL)
  • 640×224
  • 640×240
  • 640×256 (PAL)
  • 704×224
  • 704×240
  • 704×256 (PAL)

Interlaced

  • 320×448
  • 320×512 (PAL)
  • 320×480
  • 352×448
  • 320×480
  • 352×512 (PAL)
  • 640×448 (Hi‑Res)
  • 640×480 (Hi‑Res)
  • 640×512 (Hi‑Res, PAL)
  • 704×448 (Hi‑Res)
  • 704×480 (Hi‑Res)
  • 704×512 (Hi‑Res, PAL)

Memory

  • Total memory: 5–11 MB (5152 KB system, 39,408 bytes cache, 512–5120 KB cartridge, 1 MB card)
  • RAM: 4.549–10.049 MB (4640 KB system, 18,928 bytes cache, 512–5120 KB optional cartridge, 512 KB optional card)
  • ROM: 532–3092 KB (512 KB system, 20 KB cache, 2 MB optional cartridge, 512 KB optional card)
  • System RAM: 4.53125 MB (4640 KB)[44][20]
  • SH2: 8 KB cache (4 KB per SH2)
  • SH1: 4 KB cache
  • SCU DSP: 2 KB RAM cache (1 KB program, 1 KB data)
  • SMPC: 20,976 bytes (496 bytes 4‑bit RAM, 20 KB 10‑bit ROM)[19]
  • VDP2: 4 KB on‑chip color RAM
  • RAM cartridge: 512 KB to 4.5 MB
  • 4 MB Work RAM[fn 54]
  • 512 KB battery backup

Configuration

System RAM buses, all connected through the SCU:[15][44][9]

  • SH2 (×2), SCU, SMPC <–> Work RAM,[fn 55] battery backup SRAM
  • SCU <–> VDP1, VDP2[fn 57]
  • VDP1 <–> Texture cache VRAM[fn 58]
  • VDP1 <–> Framebuffer 0 VRAM[fn 58]
  • VDP1 <–> Framebuffer 1 VRAM[fn 58]
  • VDP2 <–> Background cache VRAM[fn 59]
  • Sound sub‑system bus — SCU, 68EC000, SCSP <‑> Sound RAM[fn 60]
  • CD‑ROM sub‑system bus — SCU, SH1 <‑> CD‑ROM cache/buffer RAM[fn 60]

Bandwidth

  • System bus RAM: 114.54544 MB/s[fn 41]
  • VDP1: 171.81816 MB/s[fn 65]
  • VDP2: 114.54544 MB/s[fn 66] (tiled texture compression up to 534 MB/s)[fn 67]
  • Internal processor bandwidth:

Storage

  • Storage capacity: 680 MB
  • Data transfer rate: 320 KB/s
  • Access time: Under 360 ms
  • Compatibiity: CD‑ROM, Audio CD, CD+G, CD+EG, CD Single (8cm)
  • Optional: Video CD, Photo CD, Digital Karaoke, E-book[34]

Input/Output

  • Two 16‑bit bidirectional parallel I/O ports
  • High-speed serial communications port (Both SH2 SCI channels and SCSP MIDI)
  • Cartridge connector
  • Internal expansion port for video decoder card
  • Composite video/stereo (JP Part No: HSS-0106)
  • NTSC/PAL RF (US Part No.: MK-80116, JP Part No.: HSS-0110)
  • S-Video compatible (JP Part No.: HSS-0105)
  • RGB compatible (JP Part No.: HSS-0109)
  • EDTV compatible (optional)

Power source

  • AC110 volts; 60 Hz (US)
  • AC240 volts; 50 Hz (EU)
  • AC100 volts; 60 Hz (JP)
  • AC240 volts; 60 Hz (AS)
  • AC220 volts; 60 Hz (KR)
  • 4 volt lithium battery to power non-volatile RAM and SMPC internal real-time clock
  • Power Consumption: 25 W

Dimensions

US/European model:

260 mm (10.236")
89 mm (3.504")
230 mm (9.055")


Boot ROM

Main article: Sega Saturn/Boot ROM.

Errata

See VDP1 Errata

Footnotes

  1. ↑ [MOPS (million operations per second) MOPS (million operations per second)]
  2. ↑ [1 operation per cycle[13] 1 operation per cycle[13]]
  3. ↑ [39 cycles per divide[14] 39 cycles per divide[14]]
  4. ↑ [74.454536 MIPS SH-2, 85.90908 MIPS SCU, 28.63636 MIPS VDP2 74.454536 MIPS SH-2, 85.90908 MIPS SCU, 28.63636 MIPS VDP2]
  5. ↑ [2x SH-2 MULT: 57.27272 MOPS[35]
    2x SH-2 DIVU: 1.468531 MOPS (39 cycles per divide)[36]
    SCU DSP: 28.63636 MOPS (add and multiply per cycle)
    VDP2: 28.63636 MOPS 2x SH-2 MULT: 57.27272 MOPS[35]
    2x SH-2 DIVU: 1.468531 MOPS (39 cycles per divide)[36]
    SCU DSP: 28.63636 MOPS (add and multiply per cycle)
    VDP2: 28.63636 MOPS]
  6. ↑ [2x SH-2: 57,272,720 adds/sec (1 cycle per multiply)[35]
    SCU DSP: 14,318,180 multiplies/sec (1 cycle per multiply)
    VDP2: 14.31818 adds/sec 2x SH-2: 57,272,720 adds/sec (1 cycle per multiply)[35]
    SCU DSP: 14,318,180 multiplies/sec (1 cycle per multiply)
    VDP2: 14.31818 adds/sec]
  7. ↑ [2x SH-2: 57,272,720 multiplies/sec (1 cycle per multiply)[37]
    SCU DSP: 14,318,180 multiplies/sec (1 cycle per multiply)
    VDP2: 14.31818 multiplies/sec 2x SH-2: 57,272,720 multiplies/sec (1 cycle per multiply)[37]
    SCU DSP: 14,318,180 multiplies/sec (1 cycle per multiply)
    VDP2: 14.31818 multiplies/sec]
  8. ↑ [2x CPU: 3,579,545 divides/sec (16 cycles per 16-bit divide)[14]
    2x DIVU: 1,468,531 divides/sec (39 cycles per divide)[36] 2x CPU: 3,579,545 divides/sec (16 cycles per 16-bit divide)[14]
    2x DIVU: 1,468,531 divides/sec (39 cycles per divide)[36]]
  9. ↑ [2x SH-2 MULT: 57.27272 MOPS (million operations per second)[35]
    2x SH-2 DIVU: 1.468531 MOPS (39 cycles per divide)[36]
    SCU DSP: 28.63636 MOPS (add and multiply per cycle)
    VDP2: 28.63636 MOPS (only for VDP2's 3D planes) 2x SH-2 MULT: 57.27272 MOPS (million operations per second)[35]
    2x SH-2 DIVU: 1.468531 MOPS (39 cycles per divide)[36]
    SCU DSP: 28.63636 MOPS (add and multiply per cycle)
    VDP2: 28.63636 MOPS (only for VDP2's 3D planes)]
  10. ↑ [Transformation (21 adds/multiplies),[38] projection (4 adds/multiplies)[39] and perspective division (1 divide)[40] per vertex:
    • 894,886 vertices/sec: 894,886 SCU DSP transformations (14 cycles per transform,[38] 2 cycles per projection), 894,886 SH-2 DIVU divisions (1 divide per vertex)
    • 573,644 vertices/sec: 14,341,100 SH-2 MULT DSP transform/projection operations (25 cycles per vertex), 573,644 SH-2 DIVU divisions (1 divide per vertex)
    • 1,011,294 vertices/sec: 41,463,054 SH-2 transform/projection/divide cycles (41 cycles per vertex)
    Transformation (21 adds/multiplies),[38] projection (4 adds/multiplies)[39] and perspective division (1 divide)[40] per vertex:
    • 894,886 vertices/sec: 894,886 SCU DSP transformations (14 cycles per transform,[38] 2 cycles per projection), 894,886 SH-2 DIVU divisions (1 divide per vertex)
    • 573,644 vertices/sec: 14,341,100 SH-2 MULT DSP transform/projection operations (25 cycles per vertex), 573,644 SH-2 DIVU divisions (1 divide per vertex)
    • 1,011,294 vertices/sec: 41,463,054 SH-2 transform/projection/divide cycles (41 cycles per vertex)]
  11. ↑ [8 vertices per cube (6 quad polygons)[41] 8 vertices per cube (6 quad polygons)[41]]
  12. ↑ [8 transformations (168 adds/multiplies), 6 surface normals (72 multiplies, 36 adds),[42] 6 light sources (72 adds/multiplies),[43] 8 projections (32 adds/multiplies) and 8 perspective divisions (24 divides)[39] per cube with 8 vertices and 6 quad polygons:
    • 52,640 cubes/sec: 52,640 SCU DSP cubes (112 transform cycles, 72 surface normal cycles, 72 light source cycles,[43] 16 projection cycles), 1,263,360 SH-2 DIVU divisions (24 divides per cube)
    • 8548 cubes/sec: 2,940,512 SH-2 MULT DSP transform/projection operations (347 cycles per cube), 205,152 SH-2 DIVU divisions (24 divides per cube)
    • 72,614 cubes/sec: 52,862,992 SH-2 transform/projection/divide cycles (728 cycles per cube)
    8 transformations (168 adds/multiplies), 6 surface normals (72 multiplies, 36 adds),[42] 6 light sources (72 adds/multiplies),[43] 8 projections (32 adds/multiplies) and 8 perspective divisions (24 divides)[39] per cube with 8 vertices and 6 quad polygons:
    • 52,640 cubes/sec: 52,640 SCU DSP cubes (112 transform cycles, 72 surface normal cycles, 72 light source cycles,[43] 16 projection cycles), 1,263,360 SH-2 DIVU divisions (24 divides per cube)
    • 8548 cubes/sec: 2,940,512 SH-2 MULT DSP transform/projection operations (347 cycles per cube), 205,152 SH-2 DIVU divisions (24 divides per cube)
    • 72,614 cubes/sec: 52,862,992 SH-2 transform/projection/divide cycles (728 cycles per cube)]
  13. ↑ [8 transformations (168 adds/multiplies), 8 surface normals (96 multiplies, 48 adds), 8 light sources (96 adds/multiplies), 8 projections (32 adds/multiplies) and 8 perspective divisions (24 divides) per cube with 8 vertices and 6 quad polygons:
    • 44,744 cubes/sec: 44,744 SCU DSP cubes (112 transform cycles, 96 surface normal cycles, 96 light source cycles, 16 projection cycles), 1,073,856 SH-2 DIVU divisions (24 divides per cube)
    • 16,444 cubes/sec: 7,235,360 SH-2 MULT DSP transform/projection operations (440 cycles per cube), 394,675 SH-2 DIVU divisions (8 divides per cube)
    • 58,942 cubes/sec: 48,568,208 SH-2 transform/projection/divide cycles (824 cycles per cube)
    8 transformations (168 adds/multiplies), 8 surface normals (96 multiplies, 48 adds), 8 light sources (96 adds/multiplies), 8 projections (32 adds/multiplies) and 8 perspective divisions (24 divides) per cube with 8 vertices and 6 quad polygons:
    • 44,744 cubes/sec: 44,744 SCU DSP cubes (112 transform cycles, 96 surface normal cycles, 96 light source cycles, 16 projection cycles), 1,073,856 SH-2 DIVU divisions (24 divides per cube)
    • 16,444 cubes/sec: 7,235,360 SH-2 MULT DSP transform/projection operations (440 cycles per cube), 394,675 SH-2 DIVU divisions (8 divides per cube)
    • 58,942 cubes/sec: 48,568,208 SH-2 transform/projection/divide cycles (824 cycles per cube)]
  14. ↑ [Multiplexed (57.27272 MB/s VDP1, 57.27272 MB/s VDP2), 16-bit per VDP, 28.63636 MHz[44][45]
    • Maximum VDP1 polygon transfer: 1,789,772 polygons/sec (57.272704 MB/s, 32 bytes per polygon)[46]
    Multiplexed (57.27272 MB/s VDP1, 57.27272 MB/s VDP2), 16-bit per VDP, 28.63636 MHz[44][45]
    • Maximum VDP1 polygon transfer: 1,789,772 polygons/sec (57.272704 MB/s, 32 bytes per polygon)[46]]
  15. ↑ [8-bit, 28.63636 MHz[45] 8-bit, 28.63636 MHz[45]]
  16. ↑ VDP1: 28.63636 MPixels/s (15-bit color), 35.6465 MPixels/s (8-bit color)
    VDP2: 26.8426–28.63636 MPixels/s (24-bit color), 53.6852–57.27272 MPixels/s (15-bit color), 107.3704–114.54544 MPixels/s (8-bit color), 214.7408–229.09088 MPixels/s (4-bit color)
  17. ↑ [VDP1: 28.63636–35.6465 MPixels/s
    VDP2: 251.65824–534.77376 MPixels/s VDP1: 28.63636–35.6465 MPixels/s
    VDP2: 251.65824–534.77376 MPixels/s]
  18. ↑ [57.27272 MB/s per bus 57.27272 MB/s per bus]
  19. ↑ [28.63636 MHz texture cache, 28.63636 MHz draw/render framebuffer, 28.63636 MHz display/erase framebuffer[29] 28.63636 MHz texture cache, 28.63636 MHz draw/render framebuffer, 28.63636 MHz display/erase framebuffer[29]]
  20. ↑ [1 cycle per pixel[27][75][28] 1 cycle per pixel[27][75][28]]
  21. ↑ [28.63636 MPixels/s draw, 14.418 MPixels/s erase/write[76][77] 28.63636 MPixels/s draw, 14.418 MPixels/s erase/write[76][77]]
  22. ↑ [164,576 Gouraud-shaded 10×10 polygons/sec: 57.27272 million parallel bus cycles/sec, 248 cycles overhead per polygon (16 cycles command table fetch,[78] 232 cycles Gouraud shading),[79] 348 cycles per polygon (100 cycles drawing per 100-pixel polygon)[80] 164,576 Gouraud-shaded 10×10 polygons/sec: 57.27272 million parallel bus cycles/sec, 248 cycles overhead per polygon (16 cycles command table fetch,[78] 232 cycles Gouraud shading),[79] 348 cycles per polygon (100 cycles drawing per 100-pixel polygon)[80]]
  23. ↑ [Takes six times longer when using VDP1's RGB mode.[60] When using VDP2 palette mode, the VDP1 draws shadowed/translucent objects at full speed. Takes six times longer when using VDP1's RGB mode.[60] When using VDP2 palette mode, the VDP1 draws shadowed/translucent objects at full speed.]
  24. ↑ [Drawing process is asynchronous,[78] commands/textures read from texture cache and pixels/texels written to rendering framebuffer in parallel (57.27272 million parallel bus cycles/sec),[81] 148 textured 504×255 polygons/sec (386,905 parallel cycles per polygon), 136,363 textured 10×10 polygons/sec (420 parallel cycles per polygon), 189,644 textured 8×8 polygons/sec (302 parallel cycles per polygon)[79] Drawing process is asynchronous,[78] commands/textures read from texture cache and pixels/texels written to rendering framebuffer in parallel (57.27272 million parallel bus cycles/sec),[81] 148 textured 504×255 polygons/sec (386,905 parallel cycles per polygon), 136,363 textured 10×10 polygons/sec (420 parallel cycles per polygon), 189,644 textured 8×8 polygons/sec (302 parallel cycles per polygon)[79]]
  25. ↑ [57.27272 million parallel bus cycles/sec, 147 textured 504×255 polygons/sec (387,137 parallel cycles per polygon), 87,841 textured 10×10 polygons/sec (652 parallel cycles per polygon)[79][80] 57.27272 million parallel bus cycles/sec, 147 textured 504×255 polygons/sec (387,137 parallel cycles per polygon), 87,841 textured 10×10 polygons/sec (652 parallel cycles per polygon)[79][80]]
  26. ↑ [Flat shading: 16 cycles per polygon in 28.63636 MHz texture cache,[78] 1 cycle per pixel in 28.63636 MHz framebuffer Flat shading: 16 cycles per polygon in 28.63636 MHz texture cache,[78] 1 cycle per pixel in 28.63636 MHz framebuffer]
  27. ↑ [57.27272 million parallel bus cycles/sec, 248 cycles overhead per polygon (16 cycles command table fetch,[78] 232 cycles Gouraud shading),[79] 32 cycles drawing per 32-pixel polygon[80] 57.27272 million parallel bus cycles/sec, 248 cycles overhead per polygon (16 cycles command table fetch,[78] 232 cycles Gouraud shading),[79] 32 cycles drawing per 32-pixel polygon[80]]
  28. ↑ [57.27272 million parallel bus cycles/sec, 171 parallel cycles per polygon[79] 57.27272 million parallel bus cycles/sec, 171 parallel cycles per polygon[79]]
  29. ↑ [200,000 texture-mapped polygons/sec,[82][34] 57.27272 million parallel bus cycles/sec, 285 parallel cycles per polygon[79] 200,000 texture-mapped polygons/sec,[82][34] 57.27272 million parallel bus cycles/sec, 285 parallel cycles per polygon[79]]
  30. ↑ [57.27272 million parallel bus cycles/sec, 403 parallel cycles per polygon[79][80] 57.27272 million parallel bus cycles/sec, 403 parallel cycles per polygon[79][80]]
  31. ↑ [4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84] 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84]]
  32. ↑ [2 memory cycles per pixel (8 memory cycles per 4 pixels)[83][101] 2 memory cycles per pixel (8 memory cycles per 4 pixels)[83][101]]
  33. ↑ [1 pixel per memory cycle (4 pixels per 4 memory cycles)[83][101] 1 pixel per memory cycle (4 pixels per 4 memory cycles)[83][101]]
  34. ↑ [2 pixels per memory cycle (4 pixels per 2 memory cycles)[83][101] 2 pixels per memory cycle (4 pixels per 2 memory cycles)[83][101]]
  35. ↑ [4 pixels per memory cycle[83][101] 4 pixels per memory cycle[83][101]]
  36. ↑ [2 memory cycles per pixel (8 memory cycles per 4 pixels)[83][101] 2 memory cycles per pixel (8 memory cycles per 4 pixels)[83][101]]
  37. ↑ [4096×4096 texel texture, 1024×1024 texel texture, 30 frames per second[102] 4096×4096 texel texture, 1024×1024 texel texture, 30 frames per second[102]]
  38. ↑ [1024×1024 to 2048×2048 pixel tilemaps 1024×1024 to 2048×2048 pixel tilemaps]
  39. ↑ [4x 128×128 tiles[93] 4x 128×128 tiles[93]]
  40. ↑ [2048×2048 to 4096×4096 texel textures 2048×2048 to 4096×4096 texel textures]
  41. ↑ 41.0 41.1 41.2 [32‑bit, 28.63636 MHz 32‑bit, 28.63636 MHz]
  42. ↑ [28.63636 MHz, 34 ns[104][105][106] 28.63636 MHz, 34 ns[104][105][106]]
  43. ↑ [22.222222 MHz, 45 ns cycles, 70 ns access[107][108][109] 22.222222 MHz, 45 ns cycles, 70 ns access[107][108][109]]
  44. ↑ [SDRAM, 80-bit SDRAM, 80-bit]
  45. ↑ [16‑bit, 28.63636 MHz, 34 ns[104][105][106] 16‑bit, 28.63636 MHz, 34 ns[104][105][106]]
  46. ↑ [32‑bit, 28.63636 MHz (2x 16-bit), 34 ns[110][106] 32‑bit, 28.63636 MHz (2x 16-bit), 34 ns[110][106]]
  47. ↑ [32‑bit (2x 16-bit), 57.27272 MHz, 17 ns,[110][106] 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84] 32‑bit (2x 16-bit), 57.27272 MHz, 17 ns,[110][106] 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84]]
  48. ↑ [17 MB textures (4096×4096 and 1024×1024 texels, 8-bit palettes) compressed in 512 KB VDP2 memory 17 MB textures (4096×4096 and 1024×1024 texels, 8-bit palettes) compressed in 512 KB VDP2 memory]
  49. ↑ [FPM DRAM, 16‑bit, 20 MHz, 50 ns cycles, 70 ns access[111][112] FPM DRAM, 16‑bit, 20 MHz, 50 ns cycles, 70 ns access[111][112]]
  50. ↑ [FPM DRAM, 16‑bit, 20 MHz, 50 ns cycles, 80 ns access[113][109] FPM DRAM, 16‑bit, 20 MHz, 50 ns cycles, 80 ns access[113][109]]
  51. ↑ NVRAM, 8‑bit, 10 MHz, 100 ns[114][115]
  52. ↑ MROM/EPROM, 16‑bit, 10 MHz[18][116]
  53. ↑ [FPM DRAM, 16-bit, 22.222222 MHz, 45 ns cycles, 70 ns access[117][118] FPM DRAM, 16-bit, 22.222222 MHz, 45 ns cycles, 70 ns access[117][118]]
  54. ↑ [FPM DRAM, 16-bit, 25 MHz, 40 ns cycles, 60 ns access[44][119][120] FPM DRAM, 16-bit, 25 MHz, 40 ns cycles, 60 ns access[44][119][120]]
  55. ↑ [2× SDRAM, 2× FPM DRAM 2× SDRAM, 2× FPM DRAM]
  56. ↑ [80-bit 80-bit]
  57. ↑ [16-bit, 28.63636 MHz 16-bit, 28.63636 MHz]
  58. ↑ 58.0 58.1 58.2 [SDRAM, 16-bit, 28.63636 MHz SDRAM, 16-bit, 28.63636 MHz]
  59. ↑ [2x SDRAM, 32-bit (2x 16-bit),[26] 57.27272 MHz (2x 28.63636 MHz), 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84] 2x SDRAM, 32-bit (2x 16-bit),[26] 57.27272 MHz (2x 28.63636 MHz), 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84]]
  60. ↑ 60.0 60.1 [FPM DRAM, 16-bit, 28.63636 MHz FPM DRAM, 16-bit, 28.63636 MHz]
  61. ↑ [7 buses, 144-bit bus width 7 buses, 144-bit bus width]
  62. ↑ [114.54544 MB/s SDRAM, 88.888888 MB/s FPM DRAM 114.54544 MB/s SDRAM, 88.888888 MB/s FPM DRAM]
  63. ↑ [8‑bit, 10 MHz 8‑bit, 10 MHz]
  64. ↑ [SDRAM, 4 buses, 80-bit bus width, 28.63636 MHz SDRAM, 4 buses, 80-bit bus width, 28.63636 MHz]
  65. ↑ [114.54544 MB/s framebuffers, 57.27272 MB/s texture cache, 48-bit bus width 114.54544 MB/s framebuffers, 57.27272 MB/s texture cache, 48-bit bus width]
  66. ↑ [32-bit bus width, 57.27272 MHz (2x 28.63636 MHz), 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84] 32-bit bus width, 57.27272 MHz (2x 28.63636 MHz), 4 system cycles per per display pixel,[1] 8 VDP2 memory cycles per lo-res display pixel, 4 VDP2 memory cycles per hi-res display pixel,[83] VDP2 memory clock twice as high as system clock, 16-bit access per memory cycle[84]]
  67. ↑ [534.77376 megapixels/sec fillrate, 8-bit palettes 534.77376 megapixels/sec fillrate, 8-bit palettes]
  68. ↑ 68.0 68.1 [FPM DRAM, 16‑bit, 20 MHz FPM DRAM, 16‑bit, 20 MHz]
  69. ↑ [114.54544 MB/s per SH2 114.54544 MB/s per SH2]
  70. ↑ [32‑bit, 20 MHz 32‑bit, 20 MHz]
  71. ↑ [171.81816 MB/s for 3 buses, 114.54544 MB/s for 1 bus 171.81816 MB/s for 3 buses, 114.54544 MB/s for 1 bus]
  72. ↑ [2 MB/s RAM, 5 MB/s ROM 2 MB/s RAM, 5 MB/s ROM]
  73. ↑ [16‑bit, 11.29 MHz 16‑bit, 11.29 MHz]
  74. ↑ [24‑bit, 22.58 MHz 24‑bit, 22.58 MHz]
  75. ↑ [171.81816 MB/s VDP1, 114.54544 MB/s VDP2 color RAM cache 171.81816 MB/s VDP1, 114.54544 MB/s VDP2 color RAM cache]
  76. ↑ [16‑bit, 10 MHz 16‑bit, 10 MHz]
  77. ↑ [FPM DRAM, 16-bit, 22.222222 MHz FPM DRAM, 16-bit, 22.222222 MHz]
  78. ↑ [FPM DRAM, 16-bit, 25 MHz FPM DRAM, 16-bit, 25 MHz]

References

  1. ↑ 1.00 1.01 1.02 1.03 1.04 1.05 1.06 1.07 1.08 1.09 1.10 1.11 Sega Saturn hardware notes (2004-04-27)
  2. ↑ 2.0 2.1 File:Hitachi SuperH Programming Manual.pdf
  3. ↑ File:SH7604 Hardware Manual.pdf
  4. ↑ File:SH-2A.pdf, page 2
  5. ↑ SH7040, SH7041, SH7042, SH7043, SH7044, SH7045, Renesas
  6. ↑ File:Hitachi SuperH Programming Manual.pdf, page 390
  7. ↑ 7.0 7.1 7.2 File:SH7604 Hardware Manual.pdf, page 3
  8. ↑ File:SH7604 Hardware Manual.pdf, page 219
  9. ↑ 9.00 9.01 9.02 9.03 9.04 9.05 9.06 9.07 9.08 9.09 9.10 9.11 9.12 9.13 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf
  10. ↑ 10.0 10.1 File:SH7604 Hardware Manual.pdf, page 22
  11. ↑ File:ST-103-R1-040194.pdf, page 23
  12. ↑ 12.0 12.1 File:SH7604 Hardware Manual.pdf, page 303
  13. ↑ File:Hitachi SuperH Programming Manual.pdf, page 31
  14. ↑ 14.0 14.1 File:Hitachi SuperH Programming Manual.pdf, page 155
  15. ↑ 15.0 15.1 15.2 15.3 15.4 15.5 15.6 15.7 File:ST-103-R1-040194.pdf
  16. ↑ 16.0 16.1 File:ST-097-R5-072694.pdf
  17. ↑ 17.0 17.1 File:ST-TECH.pdf, page 157
  18. ↑ 18.0 18.1 18.2 18.3 18.4 18.5 18.6 18.7 Sega Saturn (MAME)
  19. ↑ 19.0 19.1 File:HD40491 datasheet.pdf
  20. ↑ 20.0 20.1 20.2 20.3 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 12
  21. ↑ 21.0 21.1 File:ST-077-R2-052594.pdf
  22. ↑ 22.0 22.1 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 42
  23. ↑ 23.0 23.1 Sega Saturn FAQ (January 8, 2000)
  24. ↑ Obsolete Microprocessors
  25. ↑ 25.0 25.1 25.2 25.3 25.4 File:ST-013-R3-061694.pdf
  26. ↑ 26.0 26.1 26.2 File:ST-058-R2-060194.pdf
  27. ↑ 27.0 27.1 27.2 27.3 27.4 27.5 27.6 27.7 File:ST-013-R3-061694.pdf, page 52
  28. ↑ 28.0 28.1 28.2 28.3 File:ST-013-R3-061694.pdf, page 64
  29. ↑ 29.0 29.1 File:ST-013-R3-061694.pdf, page 6
  30. ↑ 30.0 30.1 30.2 File:ST-058-R2-060194.pdf, page 24
  31. ↑ 31.0 31.1 31.2 STV VDP2 (MAME)
  32. ↑ 32.0 32.1 File:ST-013-R3-061694.pdf, page 18
  33. ↑ 33.0 33.1 33.2 33.3 STV VDP1 (MAME)
  34. ↑ 34.0 34.1 34.2 34.3 34.4 34.5 34.6 Next Generation, "December 1996" (US; 1996-11-19), page 64
  35. ↑ 35.0 35.1 35.2 File:SH7604 Hardware Manual.pdf, page 51
  36. ↑ 36.0 36.1 36.2 File:Hitachi SuperH Programming Manual.pdf, page 308
  37. ↑ File:SH7604 Hardware Manual.pdf, page 36
  38. ↑ 38.0 38.1 File:ST-240-A-SP1-052295.pdf, page 8
  39. ↑ 39.0 39.1 Design of Digital Systems and Devices (page 97)
  40. ↑ 3D Polygon Rendering Pipeline (page 50)
  41. ↑ File:ST-237-R1-051795.pdf, page 51
  42. ↑ Design of Digital Systems and Devices (page 95)
  43. ↑ 43.0 43.1 [Sega DTS, March 1996, DSP Demo Sega DTS, March 1996, DSP Demo]
  44. ↑ 44.0 44.1 44.2 44.3 File:13-APR-94.pdf, page 8
  45. ↑ 45.0 45.1 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 14
  46. ↑ 46.0 46.1 46.2 File:ST-013-R3-061694.pdf, page 40
  47. ↑ File:ST-103-R1-040194.pdf, page 17
  48. ↑ 48.0 48.1 File:ST-097-R5-072694.pdf, page 93
  49. ↑ 49.0 49.1 49.2 File:ST-TECH.pdf, page 149
  50. ↑ File:ST-TECH.pdf, page 152
  51. ↑ File:ST-103-R1-040194.pdf, page 25
  52. ↑ File:ST-TECH.pdf, page 163
  53. ↑ The State of Sega Saturn Homebrew
  54. ↑ 54.0 54.1 Pure Entertainment Interview
  55. ↑ File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 34
  56. ↑ File:TUTORIAL.pdf, page 11
  57. ↑ 57.0 57.1 57.2 File:ST-TECH.pdf, page 147
  58. ↑ File:ST-TECH.pdf, page 135
  59. ↑ File:ST-013-R3-061694.pdf, page 34
  60. ↑ 60.0 60.1 60.2 60.3 File:ST-013-R3-061694.pdf, page 110
  61. ↑ File:ST-238-R1-051795.pdf
  62. ↑ 62.0 62.1 File:ST-238-R1-051795.pdf, page 232
  63. ↑ 63.0 63.1 File:ST-013-R3-061694.pdf, page 41
  64. ↑ File:ST-013-R3-061694.pdf, page 24
  65. ↑ Sega Saturn 3D Capabilities
  66. ↑ 66.0 66.1 File:ST-058-R2-060194.pdf, page 177
  67. ↑ File:ST-013-R3-061694.pdf, page 149
  68. ↑ Sega Saturn Tech Specs
  69. ↑ Sega System 24 Hardware Notes (2013-06-16)
  70. ↑ File:ST-013-R3-061694.pdf, page 119
  71. ↑ File:ST-013-R3-061694.pdf, page 29
  72. ↑ File:ST-013-R3-061694.pdf, page 81
  73. ↑ 73.0 73.1 File:ST-013-R3-061694.pdf, page 75
  74. ↑ File:ST-013-R3-061694.pdf, page 39
  75. ↑ File:ST-013-R3-061694.pdf, page 35
  76. ↑ File:ST-013-R3-061694.pdf, page 65
  77. ↑ File:ST-013-R3-061694.pdf, page 61
  78. ↑ 78.0 78.1 78.2 78.3 File:TUTORIAL.pdf, page 15
  79. ↑ 79.0 79.1 79.2 79.3 79.4 79.5 79.6 File:TUTORIAL.pdf, page 8
  80. ↑ 80.0 80.1 80.2 80.3 80.4 Saturn VDP1 hardware notes (2003-05-17)
  81. ↑ File:ST-013-R3-061694.pdf, page 44
  82. ↑ 82.0 82.1 Sega Visions, "May 1995" (US; 1995-xx-xx), page 14
  83. ↑ 83.0 83.1 83.2 83.3 83.4 83.5 83.6 83.7 83.8 File:ST-TECH.pdf, page 142
  84. ↑ 84.0 84.1 84.2 84.3 File:ST-058-R2-060194.pdf, page 162
  85. ↑ 85.0 85.1 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 38
  86. ↑ File:ST-058-R2-060194.pdf, page 163
  87. ↑ Sonic R
  88. ↑ 88.0 88.1 88.2 File:TUTORIAL.pdf, page 223
  89. ↑ 89.0 89.1 89.2 89.3 File:ST-TECH.pdf, page 165
  90. ↑ 90.0 90.1 [Mass Destruction, developer note Mass Destruction, developer note]
  91. ↑ 91.0 91.1 [Sega DTS, March 1996, Coefficient Table Madness Demo Sega DTS, March 1996, Coefficient Table Madness Demo]
  92. ↑ Edge, "March 1996" (UK; 1996-02-09), page 99
  93. ↑ 93.0 93.1 93.2 File:ST-058-R2-060194.pdf, page 132
  94. ↑ 94.0 94.1 File:13-APR-94.pdf, page 12
  95. ↑ [Sega DTS, March 1996, Dual Rotating Background Demos Sega DTS, March 1996, Dual Rotating Background Demos]
  96. ↑ File:ST-058-R2-060194.pdf, page 23
  97. ↑ File:13-APR-94.pdf, page 28
  98. ↑ File:ST-058-R2-060194.pdf, page 54
  99. ↑ File:ST-058-R2-060194.pdf, page 79
  100. ↑ File:ST-058-R2-060194.pdf, page 360
  101. ↑ 101.0 101.1 101.2 101.3 101.4 File:ST-058-R2-060194.pdf, page 49
  102. ↑ Sega Saturn interesting finds
  103. ↑ File:ST-103-R1-040194.pdf, page 39
  104. ↑ 104.0 104.1 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 26
  105. ↑ 105.0 105.1 File:HM5241605 datasheet.pdf
  106. ↑ 106.0 106.1 106.2 106.3 File:UPD4504161 datasheet.pdf
  107. ↑ File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 51
  108. ↑ File:TC514260B datasheet.pdf
  109. ↑ 109.0 109.1 File:HM514260 datasheet.pdf
  110. ↑ 110.0 110.1 File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 37
  111. ↑ File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 46
  112. ↑ File:HM514270D datasheet.pdf
  113. ↑ File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 55
  114. ↑ File:Sega Service Manual - Sega Saturn (PAL) - 013-1 - June 1995.pdf, page 32
  115. ↑ File:SRM20256L datasheet.pdf
  116. ↑ File:TC574200D datasheet.pdf
  117. ↑ 「セガサターン拡張RAMカートリッジ　回路図」
  118. ↑ File:HM514260C datasheet.pdf
  119. ↑ Sega Saturn Memory Cartridge Interface
  120. ↑ File:KM48C2100A datasheet.pdf


Sega Saturn
Topics Technical Specifications (Hardware Comparison) | History (Development | Release | Decline and legacy) | List of games (A-M) | List of games (N-Z) | Magazine articles | Promotional material | Merchandise
Hardware Japan | North America | Western Europe | Eastern Europe | South America | Asia | South Korea | Australasia | Africa

HiSaturn Navi | SunSeibu SGX | Sega Titan Video

Add-ons Backup Memory (third-party) | Sega PriFun | Video CD Card (third-party) | Extended RAM Cartridge (third-party) | Twin Advanced ROM System
Controllers Control Pad | Control Pad (Australia) | 3D Control Pad | Arcade Racer | Infrared Control Pad | Mission Stick | Shuttle Mouse | Twin Stick | Virtua Gun | Virtua Stick | Virtua Stick Pro
Online Services/Add-ons NetLink Internet Modem (NetLink Keyboard | NetLink Keyboard Adapter | NetLink Mouse) | Saturn Modem (Floppy Drive | Keyboard)
Connector Cables 21 Pin RGB Cable | Monaural AV Cable | RF Unit | Stereo AV Cable | S-Video Cable | Taisen Cable
Development Hardware Programming Box | Sound Box | E7000 | CartDev | SNASM2 | Address Checker | PSY-Q Development System | MIRAGE Universal CD Emulator
Misc. Hardware 6Player | SBom Multitap‎ | Saturn region converter cartridges | Action Replay | Pro Action Replay | Action Replay Plus | X-Terminator (Version 3) | S-S Promoter | Other cartridges
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