Difference between revisions of "Sega Model 2"
From Sega Retro
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===Model 2 Specifications=== | ===Model 2 Specifications=== | ||
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− | *Board composition: CPU Board | + | *Board composition: CPU Board, Video Board, Communication Board, ROM Board, Sound Board, Feedback Driver Board {{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp}} |
+ | ** Revisions: CPU Board 837-10071, Video Board 837-10072, Communication Board 837-10537, ROM Board 834-10798, Sound Board 837-8679, Drive Board 838-10646 {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}} | ||
*Main [[wikipedia:Central processing unit|CPU]]: [[wikipedia:Intel i960|Intel i960-KB]] @ 25 MHz | *Main [[wikipedia:Central processing unit|CPU]]: [[wikipedia:Intel i960|Intel i960-KB]] @ 25 MHz | ||
** [[wikipedia:Fixed-point arithmetic|Fixed-point arithmetic]]: [[wikipedia:32-bit|32-bit]] [[wikipedia:Reduced instruction set computing|RISC]] [[wikipedia:Instruction set|instructions]] @ 25 [[wikipedia:Instructions per second|MIPS]] {{fileref|I960 datasheet.pdf}} | ** [[wikipedia:Fixed-point arithmetic|Fixed-point arithmetic]]: [[wikipedia:32-bit|32-bit]] [[wikipedia:Reduced instruction set computing|RISC]] [[wikipedia:Instruction set|instructions]] @ 25 [[wikipedia:Instructions per second|MIPS]] {{fileref|I960 datasheet.pdf}} | ||
** [[wikipedia:Floating-point unit|Floating-point unit]]: [[wikipedia:Single-precision floating-point format|32-bit]], [[wikipedia:Double-precision floating-point format|64-bit]] and [[wikipedia:Extended precision|80-bit]] operations @ 13.6 MFLOPS {{fileref|80960KB datasheet.pdf}} | ** [[wikipedia:Floating-point unit|Floating-point unit]]: [[wikipedia:Single-precision floating-point format|32-bit]], [[wikipedia:Double-precision floating-point format|64-bit]] and [[wikipedia:Extended precision|80-bit]] operations @ 13.6 MFLOPS {{fileref|80960KB datasheet.pdf}} | ||
** Bus width: 32-bit | ** Bus width: 32-bit | ||
− | * | + | *Additional CPU: 2× [[Zilog]] [[Z80]] (8-bit & 16-bit instructions @ 1.74 MIPS) |
+ | **Communication Board: 8 MHz {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|http://pdf.datasheetarchive.com/indexerfiles/Scans-068/DSA2IH00225160.pdf}} (1.16 MIPS) | ||
+ | **Feedback Driver: 4 MHz {{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp}} (0.58 MIPS) | ||
}} | }} | ||
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{{multicol| | {{multicol| | ||
* GPU: {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}}{{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp}}{{fileref|NextGeneration US 11.pdf|page=16}} | * GPU: {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}}{{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp}}{{fileref|NextGeneration US 11.pdf|page=16}} | ||
− | ** [[wikipedia:Geometry pipelines|Geometry Engine]] [[wikipedia:Digital signal processor|DSP]] [[wikipedia:Coprocessor|coprocessors]]: 6× [[Fujitsu]] TGP MB86234 @ 16 MHz {{ref|http://members.iinet.net.au/~lantra9jp1/gurudumps/m2status/index.html}}{{fileref|MB86232 datasheet.pdf}} | + | ** [[wikipedia:Geometry pipelines|Geometry Engine]] [[wikipedia:Digital signal processor|DSP]] [[wikipedia:Coprocessor|coprocessors]]: 6× [[Fujitsu]] TGP MB86234 @ 16 MHz {{ref|http://members.iinet.net.au/~lantra9jp1/gurudumps/m2status/index.html}}{{fileref|MB86232 datasheet.pdf}}{{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}} |
+ | *** Revisions: 315-5673, 315-5677, 2× 315-5678, 2× 315-5679 (later updated with 2× 315-5679B in 1994) | ||
*** Coprocessor abilities: [[wikipedia:Decimal floating point|Floating decimal point]] operation function, axis rotation operation function, 3D [[wikipedia:Matrix (mathematics)|matrix operation]] function, [[wikipedia:Arithmetic logic unit|ALU]], [[wikipedia:Direct memory access|DMA]] controllers, T&L (transform, clipping, lighting) {{ref|http://wiki.mamedev.org/index.php/TGP:Index}} | *** Coprocessor abilities: [[wikipedia:Decimal floating point|Floating decimal point]] operation function, axis rotation operation function, 3D [[wikipedia:Matrix (mathematics)|matrix operation]] function, [[wikipedia:Arithmetic logic unit|ALU]], [[wikipedia:Direct memory access|DMA]] controllers, T&L (transform, clipping, lighting) {{ref|http://wiki.mamedev.org/index.php/TGP:Index}} | ||
*** [[wikipedia:Floating point unit|Floating-point units]]: 32-bit operations @ 96 MFLOPS (16 MFLOPS each) | *** [[wikipedia:Floating point unit|Floating-point units]]: 32-bit operations @ 96 MFLOPS (16 MFLOPS each) | ||
*** Fixed-point arithmetic: 32-bit instructions @ 96 MIPS (16 MIPS each) | *** Fixed-point arithmetic: 32-bit instructions @ 96 MIPS (16 MIPS each) | ||
*** Bus width: 192-bit (32-bit each) | *** Bus width: 192-bit (32-bit each) | ||
− | ** [[wikipedia:Z-buffering|Z-Sort]] & [[wikipedia:Clipping (computer graphics)|Clip]] Hardware: | + | *** Located on CPU Board |
− | ** [[wikipedia:Render output unit|Hardware Renderer]]: [[Lockheed Martin]] Custom [[wikipedia:Rasterization|rasterization]] & [[wikipedia:Texture mapping|texture mapping]] hardware | + | ** Graphics card: [[Sega]] Video Board 837-10072 @ 50 MHz {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|http://hico-srv004.pixhotel.fr/sites/default/files/gamoovernet/20110520120039-lapin252-IMG-0112.JPG}} |
− | ** [[wikipedia:Tile engine|Tilemap engine]]: [[Sega System 24]] tilemap engine | + | *** Graphics chipset: Sega 315-5292 (32 MHz), 315-5644 (32 MHz), 315-5645 (32 MHz), 315-5646 (50 MHz), 315-5647 (50 MHz), 315-5712 (40 MHz), 2× 315-5725 (50 MHz) |
+ | *** [[wikipedia:Z-buffering|Z-Sort]] & [[wikipedia:Clipping (computer graphics)|Clip]] Hardware: Sega Z-Sort & Clip Hardware | ||
+ | *** [[wikipedia:Render output unit|Hardware Renderer]]: [[Lockheed Martin]] Custom [[wikipedia:Rasterization|rasterization]] & [[wikipedia:Texture mapping|texture mapping]] hardware | ||
+ | *** [[wikipedia:Tile engine|Tilemap engine]]: Sega 315-5292 tilemap generator ([[Sega System 24]] tilemap engine) {{ref|http://imame4all.googlecode.com/svn-history/r146/Reloaded/trunk/src/mame/video/segaic16.c}} | ||
* Display resolution: 496×384 pixels, 24 Hz [[wikipedia:Horizontal scan rate|HSync]], [[wikipedia:Progressive scan|progressive scan]] (non-interlaced), double-buffering {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}} | * Display resolution: 496×384 pixels, 24 Hz [[wikipedia:Horizontal scan rate|HSync]], [[wikipedia:Progressive scan|progressive scan]] (non-interlaced), double-buffering {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}} | ||
* Overscan resolution: 656×496 pixels | * Overscan resolution: 656×496 pixels | ||
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** [[wikipedia:Microtexture|Microtexture]] size: Up to 128×128 pixels | ** [[wikipedia:Microtexture|Microtexture]] size: Up to 128×128 pixels | ||
* [[wikipedia:Digital geometry|Geometric]] performance: [http://www.gamezero.com/team-0/whats_new/past/news9504.html 500,000] textured polygons/sec, 900,000 vectors/sec | * [[wikipedia:Digital geometry|Geometric]] performance: [http://www.gamezero.com/team-0/whats_new/past/news9504.html 500,000] textured polygons/sec, 900,000 vectors/sec | ||
− | * Rendering [[wikipedia:Fillrate|fillrate]]: | + | * Rendering [[wikipedia:Fillrate|fillrate]]: 82 million [[pixel]]s/sec (50 million pixels/sec polygons, 32 million [[pixel]]s/sec tilemaps) |
}} | }} | ||
====Memory==== | ====Memory==== | ||
{{multicol| | {{multicol| | ||
− | *Memory: Up to 61.8 [[Byte|MB]] (10.625 MB main, 35,424 [[Byte|KB]] video, 16,960 KB audio, 18 KB other) | + | * Memory: Up to 61.8 [[Byte|MB]] (10.625 MB main, 35,424 [[Byte|KB]] video, 16,960 KB audio, 18 KB other) |
* System [[RAM]]: 9776 KB (9.546875 MB) {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}} | * System [[RAM]]: 9776 KB (9.546875 MB) {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}} | ||
** Main RAM: 1152 KB | ** Main RAM: 1152 KB | ||
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** Audio RAM: 576 KB | ** Audio RAM: 576 KB | ||
** Other RAM: 18 KB (16 KB backup [[SRAM]]/[[wikipedia:Non-volatile random-access memory|NVRAM]], 2 MB extra RAM) | ** Other RAM: 18 KB (16 KB backup [[SRAM]]/[[wikipedia:Non-volatile random-access memory|NVRAM]], 2 MB extra RAM) | ||
+ | * CPU cache: 768 bytes {{fileref|I960 datasheet.pdf}} | ||
* Game [[ROM]]: Up to 54.25 MB ([http://mamedb.com/game/vcop 9.5 MB] main, [http://mamedb.com/game/daytona 28.75 MB] video, 16 MB audio) | * Game [[ROM]]: Up to 54.25 MB ([http://mamedb.com/game/vcop 9.5 MB] main, [http://mamedb.com/game/daytona 28.75 MB] video, 16 MB audio) | ||
+ | }} | ||
+ | |||
+ | ====Bandwidth==== | ||
+ | {{multicol| | ||
+ | * Main RAM bandwidth: 78.144091 MB/sec | ||
+ | ** i960: 66.7 MB/sec (32-bit) {{fileref|80960KB datasheet.pdf}} | ||
+ | ** Z80: 11.444091 MB/sec (8-bit) | ||
+ | * VRAM bandwidth: 880.566272 MB/sec {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|http://hico-srv004.pixhotel.fr/sites/default/files/gamoovernet/20110520120039-lapin252-IMG-0112.JPG}} | ||
+ | ** TGP: 366.210938 MB/sec (6× 32-bit, 16 MHz) {{ref|http://www.datasheets360.com/pdf/-1398907357463554714}} | ||
+ | ** Video Board: 514.355334 MB/sec | ||
+ | *** 315-5292 & 315-5644: 29.343826 MB/sec (2× 16-bit, 7.692308 MHz) {{ref|http://pdf.datasheetarchive.com/indexerfiles/Scans-056/DSAIH000125375.pdf}} | ||
+ | *** 315-5645: 27.247837 MB/sec (16-bit, 14.285714 MHz) {{ref|http://matthieu.benoit.free.fr/cross/data_sheets/MB84256A.pdf}} | ||
+ | *** 315-5646 & 315-5647: 381.469726 MB/sec (2× 32-bit, 50 MHz) | ||
+ | *** 315-5712: 76.293945 MB/sec (16-bit, 40 MHz) {{ref|http://pdf.datasheetarchive.com/datasheetsmain/Datasheets-39/DSA-764435.pdf}} | ||
+ | * Audio RAM bandwidth: 19.073486 MB/sec (16-bit, 10 MHz) | ||
}} | }} | ||
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*** Audio RAM: 576 KB | *** Audio RAM: 576 KB | ||
*** Other RAM: 18 KB | *** Other RAM: 18 KB | ||
+ | ** CPU cache: 768 bytes | ||
** Game ROM: Up to 132.25 MB (34 MB main, 82.25 MB video,{{ref|http://mamedb.com/game/dynamcop}} 16 MB audio) | ** Game ROM: Up to 132.25 MB (34 MB main, 82.25 MB video,{{ref|http://mamedb.com/game/dynamcop}} 16 MB audio) | ||
}} | }} | ||
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*** Audio RAM: 576 KB | *** Audio RAM: 576 KB | ||
*** Other RAM: 18 KB | *** Other RAM: 18 KB | ||
− | ** Internal DSP RAM: 512 KB SRAM (256 KB per DSP) {{fileref|ADSP-2106 datasheet.pdf}} | + | ** Internal processor memory: 512.75 KB |
+ | *** CPU cache: 768 bytes | ||
+ | *** DSP RAM: 512 KB SRAM (256 KB per DSP) {{fileref|ADSP-2106 datasheet.pdf}} | ||
** Game [[ROM]]: Up to 132.25 MB (34 MB main, 82.25 MB video, 16 MB audio) | ** Game [[ROM]]: Up to 132.25 MB (34 MB main, 82.25 MB video, 16 MB audio) | ||
}} | }} |
Revision as of 09:41, 24 November 2015
Sega Model 2 | |||||
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Manufacturer: Sega | |||||
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The Sega Model 2 is an arcade system board originally debuted by Sega in 1993 as a successor to the Sega Model 1 board. It is an extension of the Model 1 hardware, most notably introducing the concept of texture-mapped polygons, allowing for more realistic 3D graphics (for its time). The Model 2 board was an important milestone for the arcade industry, and helped launch several key arcade franchises of the 90s, including Daytona USA, Virtua Cop, Sega Rally Championship, Dead or Alive, Virtua Striker, Cyber Troopers Virtual-On and The House of the Dead.
The Model 2 was engineered with help from GE Aerospace (acquired by Martin Marietta in 1993, now part of Lockheed Martin), who designed the texture-mapping chip incorporated by the Model 2, which combined it with Sega's in-house polygon geometry engine.[1] The Model 2's development was led by famed game designer Yu Suzuki. The arcade board debuted along with Daytona USA, a game which was finished and copyrighted in 1993, and debuted at the JAMMA arcade show in August 1993. [2]
There four versions of the system: the original Model 2 and the Model 2A-CRX, Model 2B-CRX and Model 2C-CRX variants. Model 2 and 2A-CRX used a custom DSP with internal code for the geometrizer while 2B-CRX and 2C-CRX used well documented DSPs and uploaded the geometrizer code at startup to the DSP. The Model 2 was succeeded by the Sega Model 3 in 1996.
History
It was a further advancement of the earlier Model 1 system. The most noticeable improvement was texture mapping, which enabled polygons to be painted with bitmap images, as opposed to the limited monotone flat shading that Model 1 supported. The Model 2 also introduced the use of texture filtering and texture anti-aliasing,[1] as well as trilinear filtering.[3] It was the most powerful game system in its time, equivalent to the power of a PC graphics card in 1998, five years after the Model 2's release. [3]
Designed by Sega AM2's Yu Suzuki, he stated that the Model 2's texture mapping chip originated "from military equipment from Lockheed Martin, which was formerly General Electric Aerial & Space's textural mapping technology. It cost $2 million dollars to use the chip. It was part of flight-simulation equipment that cost $32 million. I asked how much it would cost to buy just the chip and they came back with $2 million. And I had to take that chip and convert it for video game use, and make the technology available for the consumer at 5,000 yen ($50)" ($84 in 2014) per machine. He said "it was tough but we were able to make it for 5,000 yen. Nobody at Sega believed me when I said I wanted to purchase this technology for our games."[4] Suzuki stated that, in "the end," it "was a hit and the industry gained mass-produced texture-mapping as a result." For Virtua Fighter 2, he also utilized motion capture technology, introducing it to the game industry. [5]
There were also issues working on the new CPU,[4] the Intel i960-KB, which had just released in 1993.[6] Suzuki stated that when working "on a brand new CPU, the debugger doesn't exist yet. The latest hardware doesn't work because it's full of bugs. And even if a debugger exists, the debugger itself is full of bugs. So, I had to debug the debugger. And of course with new hardware there's no library or system, so I had to create all of that, as well. It was a brutal cycle." [4]
In a late 1998 interview, Read3D's Jon Lenyo, a former employee of GE Aerospace (later Lockheed Martin), stated that Sega's development for the Model 2 can be traced back as early as November 1990, when he and other GE Aerospace employees visited Sega and demonstrated the trilinear texture filtering and shading capabilities of their technology. As Sega was already working on the Sega Model 1 internally, they eventually incorporated GE Aerospace's technology into the Model 2. [3]
Despite its high price tag of around $15,000 [3] (equivalent to $24489 in 2014), the Model 2 platform was very successful. It featured some of the highest grossing arcade games of all time: Daytona USA, Virtua Fighter 2, Cyber Troopers Virtual-On, The House of the Dead, and Dead or Alive, to name a few. Sega sold 65,000 units of the Model 2 annually,[3] and eventually sold over 130,000 units by 1996, amounting to over $1.95 billion revenue from hardware cabinet sales (130,000 units[7][8] at $15,000 each),[3][9] equivalent to over $3.18 billion in 2014, making it one of the best-selling arcade systems of all time.
According to Yu Suzuki, the Sega Model 2B-CRX arcade system board developed for Fighting Vipers "has a slightly faster processing speed" and "a higher response to displaying more polygons".[10]
Technical Specifications
Model 2 Specifications
- Board composition: CPU Board, Video Board, Communication Board, ROM Board, Sound Board, Feedback Driver Board [11]
- Revisions: CPU Board 837-10071, Video Board 837-10072, Communication Board 837-10537, ROM Board 834-10798, Sound Board 837-8679, Drive Board 838-10646 [12]
- Main CPU: Intel i960-KB @ 25 MHz
- Fixed-point arithmetic: 32-bit RISC instructions @ 25 MIPS [13]
- Floating-point unit: 32-bit, 64-bit and 80-bit operations @ 13.6 MFLOPS [14]
- Bus width: 32-bit
- Additional CPU: 2× Zilog Z80 (8-bit & 16-bit instructions @ 1.74 MIPS)
Sound
- Sound CPU: Motorola 68000 @ 10 MHz (16-bit & 32-bit instructions @ 1.75 MIPS)
- Sound chip: 2× Sega 315-5560 Custom MultiPCM
- Sound timer: Yamaha YM3834 @ 8 MHz (Model 2 only)
Graphics
- GPU: [17][11][1]
- Geometry Engine DSP coprocessors: 6× Fujitsu TGP MB86234 @ 16 MHz [18][19][12]
- Revisions: 315-5673, 315-5677, 2× 315-5678, 2× 315-5679 (later updated with 2× 315-5679B in 1994)
- Coprocessor abilities: Floating decimal point operation function, axis rotation operation function, 3D matrix operation function, ALU, DMA controllers, T&L (transform, clipping, lighting) [20]
- Floating-point units: 32-bit operations @ 96 MFLOPS (16 MFLOPS each)
- Fixed-point arithmetic: 32-bit instructions @ 96 MIPS (16 MIPS each)
- Bus width: 192-bit (32-bit each)
- Located on CPU Board
- Graphics card: Sega Video Board 837-10072 @ 50 MHz [12][21]
- Graphics chipset: Sega 315-5292 (32 MHz), 315-5644 (32 MHz), 315-5645 (32 MHz), 315-5646 (50 MHz), 315-5647 (50 MHz), 315-5712 (40 MHz), 2× 315-5725 (50 MHz)
- Z-Sort & Clip Hardware: Sega Z-Sort & Clip Hardware
- Hardware Renderer: Lockheed Martin Custom rasterization & texture mapping hardware
- Tilemap engine: Sega 315-5292 tilemap generator (Sega System 24 tilemap engine) [22]
- Geometry Engine DSP coprocessors: 6× Fujitsu TGP MB86234 @ 16 MHz [18][19][12]
- Display resolution: 496×384 pixels, 24 Hz HSync, progressive scan (non-interlaced), double-buffering [17]
- Overscan resolution: 656×496 pixels
- Refresh rates: 60 Hz, 30 Hz [17]
- Frame rates: 30–60 frames/sec
- Color depth: 16,777,216 (24-bit true color)
- Graphical features: Flat shading, texture mapping, perspective correction, Texture filtering, texture anti-aliasing, microtexture, diffuse reflection, specular reflection, alpha blending, transparency, rasterization, mipmapping, level of detail, Z-sorting, T&L (transform, clipping, and lighting),[17][23] trilinear filtering [3]
- Texture map resolution: Up to 1024×2048 pixels
- Microtexture size: Up to 128×128 pixels
- Geometric performance: 500,000 textured polygons/sec, 900,000 vectors/sec
- Rendering fillrate: 82 million pixels/sec (50 million pixels/sec polygons, 32 million pixels/sec tilemaps)
Memory
Bandwidth
Model 2A-CRX Specifications
Model 2A-CRX, released in 1994, featured upgraded sound capabilities and increased ROM capacity:
- Sound CPU: Motorola 68000 @ 12 MHz (16-bit & 32-bit instructions @ 2.1 MIPS)
- Sound chip: Yamaha SCSP
- Memory: Up to 142 MB (35.125 MB main, 90,208 KB video, 16,960 KB audio, 18 KB other)
- System RAM: 9776 KB (9.546875 MB)
- Main RAM: 1152 KB
- VRAM: 5984 KB
- Audio RAM: 576 KB
- Other RAM: 18 KB
- CPU cache: 768 bytes
- Game ROM: Up to 132.25 MB (34 MB main, 82.25 MB video,[28] 16 MB audio)
- System RAM: 9776 KB (9.546875 MB)
Model 2B-CRX Specifications
Model 2A-CRX, released in 1995, featured upgraded geometry engine DSP coprocessors and increased VRAM:
- GPU: [17]
- Geometry Engine DSP coprocessors: 2× Analog Devices ADSP-21062 SHARC [29]
- Coprocessor abilities: Floating decimal point operation function, axis rotation operation function, 3D matrix operation function, SOC, ALU, T&L
- Floating-point units: 32-bit & 40-bit operations @ 240 MFLOPS (120 MFLOPS each)
- Fixed-point arithmetic: 32-bit instructions @ 80 MIPS (40 MIPS each)
- Data bus width: 96-bit (48-bit each)
- DMA controllers: 20 DMA channels (10 channels each), 480 MB/sec transfer rate (240 MB/sec each)
- Z-Sort & Clip Hardware: Sega Z-Sort & Clip Hardware
- Hardware Renderer: Lockheed Martin Custom rasterization & texture mapping hardware
- Tilemap engine: Sega System 24 tilemap engine
- Geometry Engine DSP coprocessors: 2× Analog Devices ADSP-21062 SHARC [29]
- Rendering fillrate: 120 million pixels/sec (2 million pixels per frame)
- Memory: Up to 150.21 MB (35.125 MB main, 99,332 KB video, 16,960 KB audio, 18 KB other)
Model 2C-CRX Specifications
Model 2A-CRX, released in 1996, featured an upgraded GPU chipset and optional sound board:
- GPU:
- GPU coprocessors: 2× Fujitsu TGPx4 MB86235 [17][23]
- Coprocessor abilities: Geometry Engine DSP, Z-sorters, clipping, hardware renderers, floating decimal point operation function, axis rotation operation function, 3D matrix operation function, ALU, DMA controllers, T&L
- Floating-point units: 32-bit & 40-bit operations @ 160 MFLOPS (80 MFLOPS each)
- Fixed-point arithmetic: 32-bit & 64-bit instructions @ 240 MIPS (120 MIPS each)
- Bus width: 192-bit (96-bit each: 64-bit SDRAM, 32-bit SRAM)
- Tilemap engine: Sega System 24 tilemap engine
- GPU coprocessors: 2× Fujitsu TGPx4 MB86235 [17][23]
- Graphical features: Gouraud shading, hidden surface, Z-buffering, point sampling, bilinear filtering, trilinear filtering [30]
- Geometric performance: [23]
- 800,000 textured polygons/sec, with lighting and flat shading (400,000 per GPU)
- 490,000 textured polygons/sec, with lighting and Gouraud shading (245,000 per GPU)
- Fillrate performance: [23]
- Optional MPEG sound board: DSB2
- Additional sound CPU: Motorola 68000 (16-bit & 32-bit instructions)
- Additional sound chip: NEC µD65654GF102
List of Games
Model 2
- Daytona USA (1993)
- Daytona USA Deluxe '93 (1993)
- Desert Tank (1994)
- Virtua Cop (1994)
Model 2A-CRX
- Virtua Fighter 2 (1994)
- Manx TT Superbike (1995)
- Sega Rally Championship (1995)
- Sega Rally Pro Drivin' (1995?)
- Sky Target (1995)
- Virtua Cop 2 (1995)
- Dead or Alive (1996)
- Dynamite Baseball (1996)
- Dynamite Cop (1996)
- Pilot Kids (1999)
- Virtua Fighter 2.1 (1996)
- Motor Raid (1997)
- Zero Gunner (1997)
Model 2B-CRX
- Fighting Vipers (1995)
- Gunblade NY (1995)
- Indy 500 (1995)
- Rail Chase 2 (1995)
- Virtua Striker (1995)
- Dead or Alive (1996)
- Dynamite Baseball (1996)
- Dynamite Cop (1996)
- Last Bronx (1996)
- Pilot Kids (1999)
- Sonic the Fighters (1996)
- Super GT 24H (1996)
- Cyber Troopers Virtual-On (1996)
- Dynamite Baseball 97 (1997)
- Zero Gunner (1997)
Model 2C-CRX
- Dynamite Cop (1996)
- Over Rev (1997)
- Power Sled (1996)
- Sega Ski Super G (1996)
- Sega Touring Car Championship (1996)
- Sega Water Ski (1996)
- Wave Runner (1996)
- The House of the Dead (1997)
- Top Skater (1997)
- Behind Enemy Lines (1998)
Other
- Ultimate Domain (unreleased) - Developed by Atlus. Previewed in Mean Machines Sega #51.
Gallery
A typical ROM (Virtua Cop)
Model 2A ROM (Dead or Alive)
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