Difference between revisions of "Sega Model 2"

Revision as of 13:33, 25 December 2015

Sega Model 2

Manufacturer: Sega

Variants: Model 2A-CRX, Model 2B-CRX, Model 2C-CRX

Add-ons: DSB1/DSB2 (Model 2C-CRX)

Release	Date	RRP	Code

The Sega Model 2 is an arcade system board originally debuted by Sega in 1993 as a successor to the Sega Model 1 board. It is an extension of the Model 1 hardware, most notably introducing the concept of texture-mapped polygons, allowing for more realistic 3D graphics for its time. The Model 2 board was an important milestone for the arcade industry, and helped launch several key arcade franchises of the 1990s, including Daytona USA, Virtua Cop, Sega Rally Championship, Dead or Alive, Virtua Striker, Cyber Troopers Virtual-On and The House of the Dead.

The Model 2 was engineered with help from GE Aerospace (acquired by Martin Marietta in 1993, now part of Lockheed Martin), who designed the texture-mapping chip incorporated by the Model 2, which combined it with Sega's in-house polygon geometry engine.^[1] The Model 2's development was led by famed Sega AM2 game designer Yu Suzuki. The arcade board debuted along with Daytona USA, a game which was finished and copyrighted in 1993, and debuted at the JAMMA arcade show in August 1993. ^[2]

There are four versions of the system: the original Model 2, and the Model 2A-CRX, Model 2B-CRX and Model 2C-CRX variants. Model 2 and 2A-CRX used a custom DSP with internal code for the geometrizer, while 2B-CRX and 2C-CRX used well documented DSPs and uploaded the geometrizer code at startup to the DSP. The Model 2 was succeeded in 1996 by the Sega Model 3, which in turn was succeeded by the Sega NAOMI, Sega Hikaru and Sega NAOMI 2.

History

It was a further advancement of the earlier Model 1 system. The most noticeable improvement was texture mapping, which enabled polygons to be painted with bitmap images, as opposed to the limited monotone flat shading that Model 1 supported. The Model 2 also introduced the use of texture filtering and texture anti-aliasing,^[1] as well as trilinear filtering.^[3] It was the most powerful game system in its time, equivalent to the power of a PC graphics card in 1998, five years after the Model 2's release. ^[3]

Designed by Sega AM2's Yu Suzuki, he stated that the Model 2's texture mapping chip originated "from military equipment from Lockheed Martin, which was formerly General Electric Aerial & Space's textural mapping technology. It cost $2 million dollars to use the chip. It was part of flight-simulation equipment that cost $32 million. I asked how much it would cost to buy just the chip and they came back with $2 million. And I had to take that chip and convert it for video game use, and make the technology available for the consumer at 5,000 yen ($50)" ($84 in 2014) per machine. He said "it was tough but we were able to make it for 5,000 yen. Nobody at Sega believed me when I said I wanted to purchase this technology for our games."^[4] Suzuki stated that, in "the end," it "was a hit and the industry gained mass-produced texture-mapping as a result." For Virtua Fighter 2, he also utilized motion capture technology, introducing it to the game industry. ^[5]

There were also issues working on the new CPU,^[4] the Intel i960-KB, which had just released in 1993.^[6] Suzuki stated that when working "on a brand new CPU, the debugger doesn't exist yet. The latest hardware doesn't work because it's full of bugs. And even if a debugger exists, the debugger itself is full of bugs. So, I had to debug the debugger. And of course with new hardware there's no library or system, so I had to create all of that, as well. It was a brutal cycle." ^[4]

In a late 1998 interview, Read3D's Jon Lenyo, a former employee of GE Aerospace (later Lockheed Martin), stated that Sega's development for the Model 2 can be traced back as early as November 1990, when he and other GE Aerospace employees visited Sega and demonstrated the trilinear texture filtering and shading capabilities of their technology. As Sega was already working on the Sega Model 1 internally, they eventually incorporated GE Aerospace's technology into the Model 2. ^[3]

Despite its high price tag of around $15,000 ^[3] (equivalent to $24489 in 2014), the Model 2 platform was very successful. It featured some of the highest grossing arcade games of all time: Daytona USA, Virtua Fighter 2, Cyber Troopers Virtual-On, The House of the Dead, and Dead or Alive, to name a few. Sega sold 65,000 units of the Model 2 annually,^[3] and eventually sold over 130,000 units by 1996, amounting to over $1.95 billion revenue from hardware cabinet sales (130,000 units^[7]^[8] at $15,000 each),^[3]^[9] equivalent to over $3.18 billion in 2014, making it one of the best-selling arcade systems of all time.

According to Yu Suzuki, the Sega Model 2B-CRX arcade system board developed for Fighting Vipers "has a slightly faster processing speed" and "a higher response to displaying more polygons".^[10]

Technical Specifications

Model 2 Specifications

Board composition: CPU Board, Video Board, Communication Board, ROM Board, Sound Board, Feedback Driver Board ^[11]
- Revisions: CPU Board 837-10071 (50 MHz), Video Board 837-10072 (50 MHz), Communication Board 837-10537, ROM Board 834-10798, Sound Board 837-8679 (20 MHz), Drive Board 838-10646 ^[12]
Main CPU: Intel i960-KB @ 25 MHz
- Fixed-point arithmetic: 32‑bit RISC instructions @ 25 MIPS ^[13]
- Floating-point unit: 32/64/80‑bit operations @ 13.6 MFLOPS ^[14]
- Bus width: 32‑bit
Additional CPU: 2× Zilog Z80 (8/16‑bit instructions @ 1.74 MIPS)
- Communication Board: 8 MHz ^[12]^[15] (1.16 MIPS)
- Feedback Driver: 4 MHz ^[11] (0.58 MIPS)

Sound

Sound CPU: Motorola 68000 @ 10 MHz (16/32‑bit instructions @ 1.75 MIPS)
Sound chip: 2× Sega 315‑5560 Custom MultiPCM
- PCM channels: 56
- PCM sample ROM: Up to 16 MB (8 MB per PCM chip)
- PCM quality: 16‑bit depth, 44.1 kHz sampling rate (CD quality) ^[16]
Sound timer: Yamaha YM3834 @ 8 MHz (Model 2 only)

Graphics

Graphical specifications of the Sega Model 2: ^[17]^[11]^[1]

GPU:
- 6× Fujitsu TGP MB86234
- Sega Video Board 837-10072
GPU Geometry Engine DSP coprocessors: 6× Fujitsu TGP MB86234 @ 16 MHz ^[18]^[19]^[12]
- Revisions: 315‑5673, 315‑5677, 2× 315‑5678, 2× 315‑5679 (later updated with 2× 315‑5679B in 1994)
- Coprocessor abilities: Floating decimal point operation function, axis rotation operation function, 3D matrix operation function, ALU, DMA controllers, T&L (transform, clipping, lighting) ^[20]
- Floating-point units: 32‑bit operations @ 96 MFLOPS (16 MFLOPS each)
- Fixed-point arithmetic: 32‑bit instructions @ 96 MIPS (16 MIPS each)
- Bus width: 192‑bit (32‑bit each)
- Notes: Located on CPU Board. DSP are modified by Sega with custom microcode for coprocessor and T&L capabilities. ^[20]
GPU graphics card: Sega Video Board 837-10072 @ 50 MHz ^[12]^[21]
- Sega Z-sorting & clipping chipset: 315‑5644 (32 MHz), 315‑5645 (32 MHz), 315‑5712 (40 MHz), 2× 315‑5725 (50 MHz)
- Lockheed Martin rasterization & texture mapping renderer units: 315‑5646 (50 MHz), 315‑5647 (50 MHz)
- Sega System 24 tilemap engine: 315‑5292 tilemap generator (32 MHz) ^[22]
Display: Up to 50-inch display ^[23]
Display resolution: 496×384 pixels, 24 Hz HSync, progressive scan (non-interlaced), double-buffering
- Overscan resolution: 656×496
Refresh rate: 60 Hz, 30 Hz ^[17]
- Frame rate: 60 frames/sec (60 Hz),^[24] 30 frames/sec (30 Hz)
Pixel clock rate: 19.523 MHz (656×496, 60 Hz)
Color depth: 16,777,216 (24‑bit), 65,536 (16‑bit)
Graphical features: Flat shading, texture mapping, perspective correction, texture filtering, texture anti-aliasing, microtexture, diffuse reflection, specular reflection, alpha blending, transparency, rasterization, mipmapping, LOD,^[17] trilinear filtering ^[3]
- Texture map resolution: Up to 1024×2048 pixels
- Microtexture size: Up to 128×128 pixels
Geometric performance: 900,000 vectors/sec
Polygon performance:
- 500,000 polygons/sec: Lighting, textures, 24‑bit color ^[25]
- 300,000 polygons/sec: Lighting, textures, 24‑bit color, all effects ^[26]
Fillrate:
- Rendering: 82 MPixels/s (50 MPixels/s polygons, 32 MPixels/s tilemaps)
- Texturing: 82 MTexels/s

Memory

Memory: Up to 62 MB (10,881 KB main, 35,460 KB video, 16,960 KB audio, 18 KB other)
System RAM: 9776 KB (9.546875 MB) ^[17]
- Main RAM: 1152 KB (1.125 MB)
- VRAM: 5984 KB (1 MB framebuffer VRAM, 64 KB coprocessor buffer SRAM/SDRAM, 4 MB texture SRAM/SDRAM, 128 KB luma, 32 KB geometry, 576 KB tiles, 64 KB colors)
- Audio RAM: 576 KB
- Other RAM: 2064 KB (16 KB backup SRAM/NVRAM, 2 MB extra RAM)
Internal processor memory: 36.75 KB
- CPU cache: 768 bytes ^[13]
- TGP internal RAM: 36 KB (6 KB per TGP) ^[19]
Game ROM: Up to 54.25 MB
- Main ROM: 9.5 MB (EPROM, MROM)
- Video ROM: 28.75 MB (MROM)
- Audio ROM: 16 MB (MROM)

Bandwidth

System RAM bandwidth: 974 MB/sec
- Main RAM bandwidth: 112 MB/sec
  - i960: 100 MB/sec (32‑bit, 25 MHz)
  - Z80: 12 MB/sec (2× 8‑bit, 8/4 MHz)
- VRAM bandwidth: 883.34066 MB/sec ^[12]^[21]
  - TGP: 384 MB/sec (6× 32‑bit, 16 MHz) ^[27]
  - Video Board: 499.34066 MB/sec
    - 315‑5292 & 315‑5644: 30.769232 MB/sec (2× 16‑bit, 7.692308 MHz) ^[28]
    - 315‑5645: 28.571428 MB/sec (16‑bit, 14.285714 MHz) ^[29]
    - 315‑5646 & 315‑5647: 400 MB/sec (2× 32‑bit, 50 MHz)
    - 315‑5712: 40 MB/sec (8‑bit, 40 MHz) ^[30]
- Audio RAM bandwidth: 20 MB/sec (16‑bit, 10 MHz)
Internal processor bandwidth: 484 MB/sec
- CPU cache: 100 MB/sec (32‑bit, 25 MHz)
- TGP internal RAM: 384 MB/sec (6× 32‑bit, 16 MHz)
Game ROM bandwidth: 933–1000 MB/sec (5× 32‑bit) ^[12]^[11]
- EPROM: 133–200 MB/sec (32‑bit, 33–50 MHz, 20–30 ns) ^[31]^[32]
- MROM: 800 MB/sec (4× 32‑bit, 50 MHz)

Model 2A-CRX Specifications

Model 2A-CRX, released in 1994, featured upgraded sound capabilities and increased ROM capacity:

Sound CPU: Motorola 68000 @ 12 MHz (16/32‑bit instructions @ 2.1 MIPS)
Sound chip: Yamaha SCSP
- PCM channels: 56
- PCM sample ROM: Up to 16 MB
- PCM quality: 16‑bit depth, 44.1 kHz sampling rate (CD quality)
- SCSP features: 128-step DSP, 32 PCM/FM/MIDI/LFO channels
Memory: Up to 142 MB (35,969 KB main, 90,244 KB video, 16,960 KB audio, 2064 KB other)
- System RAM: 9776 KB (9.546875 MB)
  - Main RAM: 1152 KB (1.125 MB)
  - VRAM: 5984 KB (5.84375 MB)
  - Audio RAM: 576 KB
  - Other RAM: 2064 KB (2.015625 MB)
- Internal processor memory: 36.75 KB
  - CPU cache: 768 bytes
  - TGP internal RAM: 36 KB
- Game ROM: Up to 132.25 MB (34 MB main, 82.25 MB video,^[33] 16 MB audio)

Model 2B-CRX Specifications

Model 2A-CRX, released in 1995, featured upgraded geometry engine DSP coprocessors and increased VRAM: ^[17]

GPU Geometry Engine DSP coprocessors: 2× ADSP-21062 SHARC ^[34]
- Coprocessor abilities: Floating decimal point operation function, axis rotation operation function, 3D matrix operation function, SOC, ALU, T&L
- Floating-point units: 32/40‑bit operations, 240 MFLOPS peak (120 MFLOPS each), 160 MFLOPS sustained
- Fixed-point arithmetic: 32‑bit instructions @ 80 MIPS (40 MIPS each)
- Data bus width: 96‑bit (48‑bit each)
- DMA controllers: 20 DMA channels (10 channels each), 480 MB/sec transfer rate (240 MB/sec each)
Polygon performance: ^[35]
- 800,000 polygons/sec: Lighting (200 FLOPS per polygon)
- 600,000 polygons/sec: Lighting, textures (272 FLOPS per polygon, 266 IPS per polygon)
Fillrate:
- Rendering: 120 MPixels/s (2 MPixels per frame)
- Texturing: 120 MTexels/s
Memory: Up to 150.21 MB (35.125 MB main, 99,332 KB video, 16,960 KB audio, 18 KB other)
- System RAM: 18,388 KB (17.957031 MB) ^[11]
  - Main RAM: 1152 KB (1.125 MB)
  - VRAM: 14,596 KB (1.5 MB framebuffer VRAM, 8228 KB coprocessor buffer SRAM/SDRAM, 4 MB texture SRAM/SDRAM, 64 KB luma, 32 KB geometry, 576 KB tiles, 64 KB colors)
  - Audio RAM: 576 KB
  - Other RAM: 2064 KB (2.015625 MB)
- Internal processor memory: 512.75 KB
  - CPU cache: 768 bytes
  - DSP internal RAM: 512 KB SRAM (256 KB per DSP) ^[34]
- Game ROM: Up to 132.25 MB (34 MB main, 82.25 MB video, 16 MB audio)

Model 2C-CRX Specifications

Model 2A-CRX, released in 1996, featured an upgraded GPU chipset and optional MPEG sound boards:

GPU coprocessors: 2× Fujitsu TGPx4 MB86235 @ 40 MHz ^[17]^[35]
- Coprocessor abilities: Geometry Engine DSP, Z-sorters, clipping, hardware renderers, floating decimal point operation function, axis rotation operation function, 3D matrix operation function, ALU, DMA controllers, T&L
- Floating-point units: 32/40‑bit operations @ 160 MFLOPS (80 MFLOPS each)
- Fixed-point arithmetic: 32/64‑bit instructions @ 240 MIPS (120 MIPS each)
- Bus width: 192‑bit (96‑bit each; 64‑bit SDRAM, 32‑bit SRAM)
Graphical features: Gouraud shading, hidden surface, Z-buffering, point sampling, bilinear filtering, trilinear filtering ^[36]
Polygon performance: ^[35]
- 800,000 polygons/sec: Lighting, textures, flat shading (200 FLOPS per polygon, 266 IPS per polygon)
- 600,000 polygons/sec: Lighting, textures, flat shading, Z-sorting (272 FLOPS per polygon)
- 490,000 polygons/sec: Lighting, textures, Gouraud shading (326 FLOPS per polygon)
- 366,000 polygons/sec: Lighting, textures, Gouraud shading, Z-sorting (438 FLOPS per polygon)
Fillrate: ^[35]
- Rendering: 190 MPixels/s (95 MPixels/s per GPU)
- Texturing: 190 MTexels/s (95 MTexels/s per GPU)
Optional MPEG sound board: DSB1
- Sound CPU: Zilog Z80 (8/16‑bit instructions)
- Sound chip: NEC µD65654GF102
Optional MPEG sound board: DSB2
- Sound CPU: Motorola 68000 (16/32‑bit instructions)
- Sound chip: NEC µD65654GF102

List of Games

Other

Ultimate Domain (unreleased) - Developed by Atlus. Previewed in Mean Machines Sega #51.

Gallery

CPU
Video PCB
A typical ROM (Virtua Cop)
Model 2A CPU
Model 2A video PCB
Model 2A ROM (Dead or Alive)
Model 2B CPU/Video PCB
Model 2B filter PCB
Model 2B communications PCB
A Model 2B ROM
Model 2C PCB

Sega arcade boards
Originating in arcades
77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 VIC Dual G80 Zaxxon VCO Object System 1 LaserDisc Appoooh Hang-On System 2 System 16 OutRun Gigas X Board Y Board System 24 System 18 System 32 Model 1 Model 2 H1 Board Model 3 ↑ ^1.0 ^1.1 File:NextGeneration US 11.pdf, page 16 ↑ File:EGM US 051.pdf, page 222 ↑ ^3.0 ^3.1 ^3.2 ^3.3 ^3.4 ^3.5 ^3.6 http://www.thg.ru/smoke/19991022/print.html ↑ ^4.0 ^4.1 ^4.2 htt (Wayback Machine: 2013-11-13 17:41) ↑ http://www.gamasutra.com/view/news/228512/Yu_Suzuki_recalls_using_military_tech_to_make_Virtua_Fighter_2.php ↑ http://pdf.datasheetcatalog.com/datasheet/Intel/mXqwttu.pdf ↑ http://archive.today/XN3rz ↑ http://tinyurl.com/nyb7y3s ↑ http://www.assemblergames.com/forums/showthread.php?47028-Early-concept-of-Daytona-USA-at-Summer-CES-1993-Not-on-Model-2-but-Compu-Scene ↑ File:SSM_UK_02.pdf, page 21 ↑ ^11.0 ^11.1 ^11.2 ^11.3 ^11.4 https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp ↑ ^12.0 ^12.1 ^12.2 ^12.3 ^12.4 ^12.5 http://www.tvspels-nostalgi.com/pcb_sega.htm ↑ ^13.0 ^13.1 File:I960 datasheet.pdf ↑ File:80960KB datasheet.pdf ↑ http://pdf.datasheetarchive.com/indexerfiles/Scans-068/DSA2IH00225160.pdf ↑ File:ST-077-R2-052594.pdf ↑ ^17.0 ^17.1 ^17.2 ^17.3 ^17.4 ^17.5 https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp ↑ http://members.iinet.net.au/~lantra9jp1/gurudumps/m2status/index.html ↑ ^19.0 ^19.1 File:MB86232 datasheet.pdf ↑ ^20.0 ^20.1 http://wiki.mamedev.org/index.php/TGP:Index ↑ ^21.0 ^21.1 http://hico-srv004.pixhotel.fr/sites/default/files/gamoovernet/20110520120039-lapin252-IMG-0112.JPG ↑ http://imame4all.googlecode.com/svn-history/r146/Reloaded/trunk/src/mame/video/segaic16.c ↑ File:EGM US 059.pdf, page 68 ↑ File:VirtuaFighter2 Model2 Flyer.pdf, page 2 ↑ http://www.gamezero.com/team-0/whats_new/past/news9504.html ↑ File:DaytonaUSA Model2 Flyer.pdf, page 2 ↑ File:TC5588P datasheet.pdf ↑ File:TC518128CPL datasheet.pdf ↑ http://matthieu.benoit.free.fr/cross/data_sheets/MB84256A.pdf ↑ http://pdf.datasheetarchive.com/datasheetsmain/Datasheets-39/DSA-764435.pdf ↑ File:AM27C1024 datasheet.pdf ↑ File:MX27C1024 datasheet.pdf ↑ http://mamedb.com/game/dynamcop ↑ ^34.0 ^34.1 File:ADSP-2106 datasheet.pdf ↑ ^35.0 ^35.1 ^35.2 ^35.3 File:3DGraphicsProcessorChipSet.pdf ↑ File:3D-CG System with Video Texturing.pdf
Console-based hardware
84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 SG-1000 System E System C Mega-Tech System Mega Play Sega Titan Video NAOMI Hikaru NAOMI 2 Atomiswave System SP Chihiro Triforce
PC-based hardware
05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Lindbergh Europa-R RingEdge RingWide RingEdge 2 Nu Nu 1.1 Nu 2 ALLS

[:File:NextGeneration_US_11.pdf_p16-1] 1.0 ^1.1 File:NextGeneration US 11.pdf, page 16

[:File:EGM_US_051.pdf_p222-2] File:EGM US 051.pdf, page 222

[http:.2F.2Fwww.thg.ru.2Fsmoke.2F19991022.2Fprint.html-3] 3.0 ^3.1 ^3.2 ^3.3 ^3.4 ^3.5 ^3.6 http://www.thg.ru/smoke/19991022/print.html

[http:.2F.2Fweb.archive.org.2Fweb.2F20131113174154.2Fwww.1up.com.2Ffeatures.2Fdisappearance-suzuki-part-1-4] 4.0 ^4.1 ^4.2 htt (Wayback Machine: 2013-11-13 17:41)

[http:.2F.2Fwww.gamasutra.com.2Fview.2Fnews.2F228512.2FYu_Suzuki_recalls_using_military_tech_to_make_Virtua_Fighter_2.php-5] ttp://www.gamasutra.com/view/news/228512/Yu_Suzuki_recalls_using_military_tech_to_make_Virtua_Fighter_2.php

[http:.2F.2Fpdf.datasheetcatalog.com.2Fdatasheet.2FIntel.2FmXqwttu.pdf-6] ttp://pdf.datasheetcatalog.com/datasheet/Intel/mXqwttu.pdf

[http:.2F.2Farchive.today.2FXN3rz-7] ttp://archive.today/XN3rz

[http:.2F.2Ftinyurl.com.2Fnyb7y3s-8] ttp://tinyurl.com/nyb7y3s

[http:.2F.2Fwww.assemblergames.com.2Fforums.2Fshowthread.php.3F47028-Early-concept-of-Daytona-USA-at-Summer-CES-1993-Not-on-Model-2-but-Compu-Scene-9] ttp://www.assemblergames.com/forums/showthread.php?47028-Early-concept-of-Daytona-USA-at-Summer-CES-1993-Not-on-Model-2-but-Compu-Scene

[:File:SSM_UK_02.pdf_p21-10] File:SSM_UK_02.pdf, page 21

[https:.2F.2Fgithub.com.2Fmamedev.2Fmame.2Fblob.2Fmaster.2Fsrc.2Fmame.2Fdrivers.2Fmodel2.cpp-11] 11.0 ^11.1 ^11.2 ^11.3 ^11.4 https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp

[http:.2F.2Fwww.tvspels-nostalgi.com.2Fpcb_sega.htm-12] 12.0 ^12.1 ^12.2 ^12.3 ^12.4 ^12.5 http://www.tvspels-nostalgi.com/pcb_sega.htm

[:File:I960_datasheet.pdf_p-13] 13.0 ^13.1 File:I960 datasheet.pdf

[:File:80960KB_datasheet.pdf_p-14] File:80960KB datasheet.pdf

[http:.2F.2Fpdf.datasheetarchive.com.2Findexerfiles.2FScans-068.2FDSA2IH00225160.pdf-15] ttp://pdf.datasheetarchive.com/indexerfiles/Scans-068/DSA2IH00225160.pdf

[:File:ST-077-R2-052594.pdf_p-16] File:ST-077-R2-052594.pdf

[https:.2F.2Fgithub.com.2Fmamedev.2Fmame.2Fblob.2Fmaster.2Fsrc.2Fmame.2Fvideo.2Fmodel2.cpp-17] 17.0 ^17.1 ^17.2 ^17.3 ^17.4 ^17.5 https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp

[http:.2F.2Fmembers.iinet.net.au.2F.7Elantra9jp1.2Fgurudumps.2Fm2status.2Findex.html-18] ttp://members.iinet.net.au/~lantra9jp1/gurudumps/m2status/index.html

[:File:MB86232_datasheet.pdf_p-19] 19.0 ^19.1 File:MB86232 datasheet.pdf

[http:.2F.2Fwiki.mamedev.org.2Findex.php.2FTGP:Index-20] 20.0 ^20.1 http://wiki.mamedev.org/index.php/TGP:Index

[http:.2F.2Fhico-srv004.pixhotel.fr.2Fsites.2Fdefault.2Ffiles.2Fgamoovernet.2F20110520120039-lapin252-IMG-0112.JPG-21] 21.0 ^21.1 http://hico-srv004.pixhotel.fr/sites/default/files/gamoovernet/20110520120039-lapin252-IMG-0112.JPG

[http:.2F.2Fimame4all.googlecode.com.2Fsvn-history.2Fr146.2FReloaded.2Ftrunk.2Fsrc.2Fmame.2Fvideo.2Fsegaic16.c-22] ttp://imame4all.googlecode.com/svn-history/r146/Reloaded/trunk/src/mame/video/segaic16.c

[:File:EGM_US_059.pdf_p68-23] File:EGM US 059.pdf, page 68

[:File:VirtuaFighter2_Model2_Flyer.pdf_p2-24] File:VirtuaFighter2 Model2 Flyer.pdf, page 2

[http:.2F.2Fwww.gamezero.com.2Fteam-0.2Fwhats_new.2Fpast.2Fnews9504.html-25] ttp://www.gamezero.com/team-0/whats_new/past/news9504.html

[:File:DaytonaUSA_Model2_Flyer.pdf_p2-26] File:DaytonaUSA Model2 Flyer.pdf, page 2

[:File:TC5588P_datasheet.pdf_p-27] File:TC5588P datasheet.pdf

[:File:TC518128CPL_datasheet.pdf_p-28] File:TC518128CPL datasheet.pdf

[http:.2F.2Fmatthieu.benoit.free.fr.2Fcross.2Fdata_sheets.2FMB84256A.pdf-29] ttp://matthieu.benoit.free.fr/cross/data_sheets/MB84256A.pdf

[http:.2F.2Fpdf.datasheetarchive.com.2Fdatasheetsmain.2FDatasheets-39.2FDSA-764435.pdf-30] ttp://pdf.datasheetarchive.com/datasheetsmain/Datasheets-39/DSA-764435.pdf

[:File:AM27C1024_datasheet.pdf_p-31] File:AM27C1024 datasheet.pdf

[:File:MX27C1024_datasheet.pdf_p-32] File:MX27C1024 datasheet.pdf

[http:.2F.2Fmamedb.com.2Fgame.2Fdynamcop-33] ttp://mamedb.com/game/dynamcop

[:File:ADSP-2106_datasheet.pdf_p-34] 34.0 ^34.1 File:ADSP-2106 datasheet.pdf

[:File:3DGraphicsProcessorChipSet.pdf_p-35] 35.0 ^35.1 ^35.2 ^35.3 File:3DGraphicsProcessorChipSet.pdf

[:File:3D-CG_System_with_Video_Texturing.pdf_p-36] File:3D-CG System with Video Texturing.pdf

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@@ Line 46: / Line 46: @@
 ** Revisions: CPU Board 837-10071 (50&nbsp;MHz), Video Board 837-10072 (50&nbsp;MHz), Communication Board 837-10537, ROM Board 834-10798, Sound Board 837-8679 (20&nbsp;MHz), Drive Board 838-10646 {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}
 *Main [[wikipedia:Central processing unit|CPU]]: [[wikipedia:Intel i960|Intel i960-KB]] @ 25&nbsp;MHz
-** [[wikipedia:Fixed-point arithmetic|Fixed-point arithmetic]]: 32-bit [[wikipedia:Reduced instruction set computing|RISC]] [[wikipedia:Instruction set|instructions]] @ 25&nbsp;[[wikipedia:Instructions per second|MIPS]] {{fileref|I960 datasheet.pdf}}
+** [[wikipedia:Fixed-point arithmetic|Fixed-point arithmetic]]: 32‑bit [[wikipedia:Reduced instruction set computing|RISC]] [[wikipedia:Instruction set|instructions]] @ 25&nbsp;[[wikipedia:Instructions per second|MIPS]] {{fileref|I960 datasheet.pdf}}
-** [[wikipedia:Floating-point unit|Floating-point unit]]: [[wikipedia:Single-precision floating-point format|32]]/[[wikipedia:Double-precision floating-point format|64]]/[[wikipedia:Extended precision|80-bit]] operations @ 13.6&nbsp;MFLOPS {{fileref|80960KB datasheet.pdf}}
+** [[wikipedia:Floating-point unit|Floating-point unit]]: [[wikipedia:Single-precision floating-point format|32]]/[[wikipedia:Double-precision floating-point format|64]]/[[wikipedia:Extended precision|80‑bit]] operations @ 13.6&nbsp;MFLOPS {{fileref|80960KB datasheet.pdf}}
-** Bus width: [[wikipedia:32-bit|32-bit]]
+** Bus width: [[wikipedia:32-bit|32‑bit]]
-*Additional CPU: 2× [[Zilog]] [[Z80]] (8/16-bit instructions @ 1.74&nbsp;MIPS)
+*Additional CPU: 2×&nbsp;[[Zilog]] [[Z80]] (8/16‑bit instructions @ 1.74&nbsp;MIPS)
 **Communication Board: 8&nbsp;MHz {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|http://pdf.datasheetarchive.com/indexerfiles/Scans-068/DSA2IH00225160.pdf}} (1.16&nbsp;MIPS)
 **Feedback Driver: 4&nbsp;MHz {{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp}} (0.58&nbsp;MIPS)
@@ Line 56: / Line 56: @@
 ====Sound====
 {{multicol|
-* Sound CPU: [[Motorola 68000]] @ 10&nbsp;MHz (16/32-bit instructions @ 1.75&nbsp;MIPS)
+* Sound CPU: [[Motorola 68000]] @ 10&nbsp;MHz (16/32‑bit instructions @ 1.75&nbsp;MIPS)
-* [[wikipedia:Sound chip|Sound chip]]: 2× Sega 315-5560 Custom MultiPCM
+* [[wikipedia:Sound chip|Sound chip]]: 2×&nbsp;Sega 315‑5560 Custom MultiPCM
 ** [[Pulse-code modulation|PCM]] channels: 56
 ** PCM sample [[ROM]]: Up to 16&nbsp;[[Byte|MB]] (8&nbsp;MB per PCM chip)
-** PCM quality: 16-bit [[wikipedia:Audio bit depth|depth]], [[wikipedia:44,100 Hz|44.1&nbsp;kHz]] [[wikipedia:Sampling rate|sampling rate]] ([[Compact disc|CD]] [[wikipedia:Sound quality|quality]]) {{fileref|ST-077-R2-052594.pdf}}
+** PCM quality: 16‑bit [[wikipedia:Audio bit depth|depth]], [[wikipedia:44,100 Hz|44.1&nbsp;kHz]] [[wikipedia:Sampling rate|sampling rate]] ([[Compact disc|CD]] [[wikipedia:Sound quality|quality]]) {{fileref|ST-077-R2-052594.pdf}}
 * Sound timer: [[Yamaha]] [[YM2612|YM3834]] @ 8&nbsp;MHz (Model 2 only)
 }}
@@ Line 68: / Line 68: @@
 {{multicol|
 * GPU:
-** 6× Fujitsu TGP MB86234
+** 6×&nbsp;Fujitsu TGP MB86234
 ** Sega Video Board 837-10072
-* GPU [[wikipedia:Geometry pipelines|Geometry Engine]] [[wikipedia:Digital signal processor|DSP]] [[wikipedia:Coprocessor|coprocessors]]: 6× [[Fujitsu]] TGP MB86234 @ 16&nbsp;MHz {{ref|http://members.iinet.net.au/~lantra9jp1/gurudumps/m2status/index.html}}{{fileref|MB86232 datasheet.pdf}}{{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}
+* GPU [[wikipedia:Geometry pipelines|Geometry Engine]] [[wikipedia:Digital signal processor|DSP]] [[wikipedia:Coprocessor|coprocessors]]: 6×&nbsp;[[Fujitsu]] TGP MB86234 @ 16&nbsp;MHz {{ref|http://members.iinet.net.au/~lantra9jp1/gurudumps/m2status/index.html}}{{fileref|MB86232 datasheet.pdf}}{{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}
-** Revisions: 315-5673, 315-5677, 2× 315-5678, 2× 315-5679 (later updated with 2× 315-5679B in 1994)
+** Revisions: 315‑5673, 315‑5677, 2×&nbsp;315‑5678, 2×&nbsp;315‑5679 (later updated with 2×&nbsp;315‑5679B in 1994)
 ** Coprocessor abilities: [[wikipedia:Decimal floating point|Floating decimal point]] operation function, axis rotation operation function, 3D [[wikipedia:Matrix (mathematics)|matrix operation]] function, [[wikipedia:Arithmetic logic unit|ALU]], [[wikipedia:Direct memory access|DMA]] controllers, [[wikia:w:c:gaming:Transform, clipping, and lighting|T&L (transform, clipping, lighting)]] {{ref|http://wiki.mamedev.org/index.php/TGP:Index}}
-** [[wikipedia:Floating point unit|Floating-point units]]: 32-bit operations @ 96&nbsp;MFLOPS (16&nbsp;MFLOPS each)
+** [[wikipedia:Floating point unit|Floating-point units]]: 32‑bit operations @ 96&nbsp;MFLOPS (16&nbsp;MFLOPS each)
-** Fixed-point arithmetic: 32-bit instructions @ 96&nbsp;MIPS (16&nbsp;MIPS each)
+** Fixed-point arithmetic: 32‑bit instructions @ 96&nbsp;MIPS (16&nbsp;MIPS each)
-** Bus width: 192-bit (32-bit each)
+** Bus width: 192‑bit (32‑bit each)
 ** Notes: Located on CPU Board. DSP are modified by Sega with custom microcode for coprocessor and T&L capabilities. {{ref|http://wiki.mamedev.org/index.php/TGP:Index}}
 * GPU graphics card: [[Sega]] Video Board 837-10072 @ 50&nbsp;MHz {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|http://hico-srv004.pixhotel.fr/sites/default/files/gamoovernet/20110520120039-lapin252-IMG-0112.JPG}}
-** Sega [[wikipedia:Z-buffering|Z-sorting]] & [[wikipedia:Clipping (computer graphics)|clipping]] chipset: 315-5644 (32&nbsp;MHz), 315-5645 (32&nbsp;MHz), 315-5712 (40&nbsp;MHz), 2× 315-5725 (50&nbsp;MHz)
+** Sega [[wikipedia:Z-buffering|Z-sorting]] & [[wikipedia:Clipping (computer graphics)|clipping]] chipset: 315‑5644 (32&nbsp;MHz), 315‑5645 (32&nbsp;MHz), 315‑5712 (40&nbsp;MHz), 2×&nbsp;315‑5725 (50&nbsp;MHz)
-** [[Lockheed Martin]] [[wikipedia:Rasterization|rasterization]] & [[wikipedia:Texture mapping|texture mapping]] [[wikipedia:Render output unit|renderer units]]: 315-5646 (50&nbsp;MHz), 315-5647 (50&nbsp;MHz)
+** [[Lockheed Martin]] [[wikipedia:Rasterization|rasterization]] & [[wikipedia:Texture mapping|texture mapping]] [[wikipedia:Render output unit|renderer units]]: 315‑5646 (50&nbsp;MHz), 315‑5647 (50&nbsp;MHz)
-** [[Sega System 24]] [[wikipedia:Tile engine|tilemap engine]]: 315-5292 tilemap generator (32&nbsp;MHz) {{ref|http://imame4all.googlecode.com/svn-history/r146/Reloaded/trunk/src/mame/video/segaic16.c}}
+** [[Sega System 24]] [[wikipedia:Tile engine|tilemap engine]]: 315‑5292 tilemap generator (32&nbsp;MHz) {{ref|http://imame4all.googlecode.com/svn-history/r146/Reloaded/trunk/src/mame/video/segaic16.c}}
 * Display: Up to 50-inch display {{fileref|EGM US 059.pdf|page=68}}
 * Display [[resolution]]: 496×384 pixels, 24&nbsp;Hz [[wikipedia:Horizontal scan rate|HSync]], [[wikipedia:Progressive scan|progressive scan]] (non-interlaced), [https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp double-buffering]
@@ Line 87: / Line 87: @@
 ** [[wikipedia:Frame rate|Frame rate]]: 60&nbsp;frames/sec (60&nbsp;Hz),{{fileref|VirtuaFighter2 Model2 Flyer.pdf|page=2}} 30&nbsp;frames/sec (30&nbsp;Hz)
 * [[Pixel]] clock rate: 19.523&nbsp;MHz (656×496, 60&nbsp;Hz)
-* [[Palette|Color depth]]: 16,777,216 ([http://www.gamezero.com/team-0/whats_new/past/news9504.html 24-bit]), 65,536 (16-bit)
+* [[Palette|Color depth]]: 16,777,216 ([http://www.gamezero.com/team-0/whats_new/past/news9504.html 24‑bit]), 65,536 (16‑bit)
 * Graphical features: [[wikipedia:Flat shading|Flat shading]], [[wikipedia:Texture mapping|texture mapping]], [[wikipedia:Texture mapping#Perspective correctness|perspective correction]], [[wikipedia:Texture filtering|texture filtering]], [[wikipedia:Spatial anti-aliasing|texture anti-aliasing]], [[wikipedia:Microtexture|microtexture]], [[wikipedia:Diffuse reflection|diffuse reflection]], [[wikipedia:Specular reflection|specular reflection]], [[wikipedia:Alpha blending|alpha blending]], [[wikipedia:Transparency (graphic)|transparency]], [[wikipedia:Rasterization|rasterization]], [[wikipedia:Mipmap|mipmapping]], [[wikipedia:Level of detail|LOD]],{{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}} [[wikipedia:Trilinear filtering|trilinear filtering]] {{ref|http://www.thg.ru/smoke/19991022/print.html}}
 ** [[wikipedia:Texture mapping|Texture map]] resolution: Up to 1024×2048 pixels
@@ Line 93: / Line 93: @@
 * [[wikipedia:Digital geometry|Geometric]] performance: 900,000 vectors/sec
 * Polygon performance:
-** 500,000 polygons/sec: Lighting, textures, 24-bit color {{ref|http://www.gamezero.com/team-0/whats_new/past/news9504.html}}
+** 500,000 polygons/sec: Lighting, textures, 24‑bit color {{ref|http://www.gamezero.com/team-0/whats_new/past/news9504.html}}
-** 300,000 polygons/sec: Lighting, textures, 24-bit color, all effects {{fileref|DaytonaUSA Model2 Flyer.pdf|page=2}}
+** 300,000 polygons/sec: Lighting, textures, 24‑bit color, all effects {{fileref|DaytonaUSA Model2 Flyer.pdf|page=2}}
 * [[Fillrate]]:
 ** Rendering: 82&nbsp;[[Pixel|MPixels/s]] (50&nbsp;MPixels/s polygons, 32&nbsp;MPixels/s tilemaps)
@@ Line 121: / Line 121: @@
 * System RAM bandwidth: 974&nbsp;MB/sec
 ** Main RAM bandwidth: 112&nbsp;MB/sec
-*** i960: 100&nbsp;MB/sec (32-bit, 25&nbsp;MHz)
+*** i960: 100&nbsp;MB/sec (32‑bit, 25&nbsp;MHz)
-*** Z80: 12&nbsp;MB/sec (2× 8-bit, 8/4&nbsp;MHz)
+*** Z80: 12&nbsp;MB/sec (2×&nbsp;8‑bit, 8/4&nbsp;MHz)
 ** VRAM bandwidth: 883.34066&nbsp;MB/sec {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|http://hico-srv004.pixhotel.fr/sites/default/files/gamoovernet/20110520120039-lapin252-IMG-0112.JPG}}
-*** TGP: 384&nbsp;MB/sec (6× 32-bit, 16&nbsp;MHz) {{fileref|TC5588P datasheet.pdf}}
+*** TGP: 384&nbsp;MB/sec (6×&nbsp;32‑bit, 16&nbsp;MHz) {{fileref|TC5588P datasheet.pdf}}
 *** Video Board: 499.34066&nbsp;MB/sec
-**** 315-5292 & 315-5644: 30.769232&nbsp;MB/sec (2× 16-bit, 7.692308&nbsp;MHz) {{fileref|TC518128CPL datasheet.pdf}}
+**** 315‑5292 & 315‑5644: 30.769232&nbsp;MB/sec (2×&nbsp;16‑bit, 7.692308&nbsp;MHz) {{fileref|TC518128CPL datasheet.pdf}}
-**** 315-5645: 28.571428&nbsp;MB/sec (16-bit, 14.285714&nbsp;MHz) {{ref|http://matthieu.benoit.free.fr/cross/data_sheets/MB84256A.pdf}}
+**** 315‑5645: 28.571428&nbsp;MB/sec (16‑bit, 14.285714&nbsp;MHz) {{ref|http://matthieu.benoit.free.fr/cross/data_sheets/MB84256A.pdf}}
-**** 315-5646 & 315-5647: 400&nbsp;MB/sec (2× 32-bit, 50&nbsp;MHz)
+**** 315‑5646 & 315‑5647: 400&nbsp;MB/sec (2×&nbsp;32‑bit, 50&nbsp;MHz)
-**** 315-5712: 40&nbsp;MB/sec (8-bit, 40&nbsp;MHz) {{ref|http://pdf.datasheetarchive.com/datasheetsmain/Datasheets-39/DSA-764435.pdf}}
+**** 315‑5712: 40&nbsp;MB/sec (8‑bit, 40&nbsp;MHz) {{ref|http://pdf.datasheetarchive.com/datasheetsmain/Datasheets-39/DSA-764435.pdf}}
-** Audio RAM bandwidth: 20&nbsp;MB/sec (16-bit, 10&nbsp;MHz)
+** Audio RAM bandwidth: 20&nbsp;MB/sec (16‑bit, 10&nbsp;MHz)
 * Internal processor bandwidth: 484&nbsp;MB/sec
-** CPU cache: 100&nbsp;MB/sec (32-bit, 25&nbsp;MHz)
+** CPU cache: 100&nbsp;MB/sec (32‑bit, 25&nbsp;MHz)
-** TGP internal RAM: 384&nbsp;MB/sec (6× 32-bit, 16&nbsp;MHz)
+** TGP internal RAM: 384&nbsp;MB/sec (6×&nbsp;32‑bit, 16&nbsp;MHz)
-* Game ROM bandwidth: 933–1000&nbsp;MB/sec (5× 32-bit) {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp}}
+* Game ROM bandwidth: 933–1000&nbsp;MB/sec (5×&nbsp;32‑bit) {{ref|http://www.tvspels-nostalgi.com/pcb_sega.htm}}{{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/model2.cpp}}
-** EPROM: 133–200&nbsp;MB/sec (32-bit, 33–50 MHz, 20–30 [[wikipedia:Nanosecond|ns]]) {{fileref|AM27C1024 datasheet.pdf}}{{fileref|MX27C1024 datasheet.pdf}}
+** EPROM: 133–200&nbsp;MB/sec (32‑bit, 33–50 MHz, 20–30 [[wikipedia:Nanosecond|ns]]) {{fileref|AM27C1024 datasheet.pdf}}{{fileref|MX27C1024 datasheet.pdf}}
-** MROM: 800&nbsp;MB/sec (4× 32-bit, 50 MHz)
+** MROM: 800&nbsp;MB/sec (4×&nbsp;32‑bit, 50 MHz)
 }}
@@ Line 143: / Line 143: @@
 {{multicol|
-* Sound CPU: Motorola 68000 @ 12&nbsp;MHz (16/32-bit instructions @ 2.1&nbsp;MIPS)
+* Sound CPU: Motorola 68000 @ 12&nbsp;MHz (16/32‑bit instructions @ 2.1&nbsp;MIPS)
 * [[wikipedia:Sound chip|Sound chip]]: [[Saturn Custom Sound Processor|Yamaha SCSP]]
 ** PCM channels: 56
 ** PCM sample ROM: Up to 16&nbsp;MB
-** PCM quality: 16-bit depth, 44.1&nbsp;kHz sampling rate (CD quality)
+** PCM quality: 16‑bit depth, 44.1&nbsp;kHz sampling rate (CD quality)
 ** SCSP features: 128-step DSP, 32 PCM/[[wikipedia:Frequency modulation synthesis|FM]]/[[MIDI]]/[[wikipedia:Low-frequency oscillation|LFO]] channels
 *Memory: Up to 142&nbsp;MB (35,969&nbsp;KB main, 90,244&nbsp;KB video, 16,960&nbsp;KB audio, 2064&nbsp;KB other)
@@ Line 165: / Line 165: @@
 {{multicol|
-* GPU Geometry Engine DSP coprocessors: 2× ADSP-21062 SHARC {{fileref|ADSP-2106 datasheet.pdf}}
+* GPU Geometry Engine DSP coprocessors: 2×&nbsp;ADSP-21062 SHARC {{fileref|ADSP-2106 datasheet.pdf}}
 ** Coprocessor abilities: Floating decimal point operation function, axis rotation operation function, 3D matrix operation function, [[wikipedia:System on a chip|SOC]], ALU, T&L
-** Floating-point units: 32/[[wikipedia:Extended precision|40-bit]] operations, 240&nbsp;MFLOPS peak (120&nbsp;MFLOPS each), 160&nbsp;MFLOPS sustained
+** Floating-point units: 32/[[wikipedia:Extended precision|40‑bit]] operations, 240&nbsp;MFLOPS peak (120&nbsp;MFLOPS each), 160&nbsp;MFLOPS sustained
-** Fixed-point arithmetic: 32-bit instructions @ 80&nbsp;MIPS (40&nbsp;MIPS each)
+** Fixed-point arithmetic: 32‑bit instructions @ 80&nbsp;MIPS (40&nbsp;MIPS each)
-** Data bus width: 96-bit ([[wikipedia:48-bit|48-bit]] each)
+** Data bus width: 96‑bit ([[wikipedia:48-bit|48‑bit]] each)
 ** DMA controllers: 20 DMA channels (10 channels each), 480&nbsp;MB/sec transfer rate (240&nbsp;MB/sec each)
 * Polygon performance: {{fileref|3DGraphicsProcessorChipSet.pdf}}
@@ Line 193: / Line 193: @@
 {{multicol|
-* GPU coprocessors: 2× Fujitsu TGPx4 MB86235 @ 40&nbsp;MHz {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}}{{fileref|3DGraphicsProcessorChipSet.pdf}}
+* GPU coprocessors: 2×&nbsp;Fujitsu TGPx4 MB86235 @ 40&nbsp;MHz {{ref|https://github.com/mamedev/mame/blob/master/src/mame/video/model2.cpp}}{{fileref|3DGraphicsProcessorChipSet.pdf}}
 ** Coprocessor abilities: Geometry Engine DSP, Z-sorters, clipping, hardware renderers, floating decimal point operation function, axis rotation operation function, 3D matrix operation function, ALU, DMA controllers, T&L
-** Floating-point units: 32/40-bit operations @ 160&nbsp;MFLOPS (80&nbsp;MFLOPS each)
+** Floating-point units: 32/40‑bit operations @ 160&nbsp;MFLOPS (80&nbsp;MFLOPS each)
-** Fixed-point arithmetic: 32/[[wikipedia:64-bit computing|64-bit]] instructions @ 240&nbsp;MIPS (120&nbsp;MIPS each)
+** Fixed-point arithmetic: 32/[[wikipedia:64‑bit computing|64‑bit]] instructions @ 240&nbsp;MIPS (120&nbsp;MIPS each)
-** Bus width: 192-bit (96-bit each; 64-bit SDRAM, 32-bit SRAM)
+** Bus width: 192‑bit (96‑bit each; 64‑bit SDRAM, 32‑bit SRAM)
 * Graphical features: [[Gouraud shading]], [[wikipedia:Hidden surface determination|hidden surface]], [[wikipedia:Z-buffering|Z-buffering]], [[wikipedia:Nearest-neighbor interpolation|point sampling]], [[wikipedia:Bilinear filtering|bilinear filtering]], trilinear filtering {{fileref|3D-CG System with Video Texturing.pdf}}
 * Polygon performance: {{fileref|3DGraphicsProcessorChipSet.pdf}}
@@ Line 208: / Line 208: @@
 ** Texturing: 190&nbsp;MTexels/s (95&nbsp;MTexels/s per GPU)
 * Optional MPEG sound board: DSB1
-** Sound CPU: Zilog Z80 (8/16-bit instructions)
+** Sound CPU: Zilog Z80 (8/16‑bit instructions)
 ** Sound chip: [[NEC]] µD65654GF102
 * Optional MPEG sound board: DSB2
-** Sound CPU: Motorola 68000 (16/32-bit instructions)
+** Sound CPU: Motorola 68000 (16/32‑bit instructions)
 ** Sound chip: NEC µD65654GF102
 }}