Difference between revisions of "Sega Mega Drive/Technical specifications"

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Technical specifications for the Sega Mega Drive.

CPU

Main CPU: Motorola 68000

Clock rate: 7.670454 MHz (NTSC), 7.600489 MHz (PAL)
The 68000 has a 24‑bit address space, allowing access to up to 16 MB of memory. Sega's memory map for the Mega Drive allowed games to be up to 4 MB without the use of a memory mapper; games that tried to go up to 10 MB would find their memory maps crushed by the Sega CD (which took the second 4 MB block) and Sega 32X (which took 2 MB of the third 4 MB block). All devices are memory mapped.

Games using save memory also needed to have the memory in the cartridge map; larger games, such as Phantasy Star IV, used a mapper to swap out cart space for SRAM during a save.

Instruction set: 16‑bit and 32‑bit CISC instructions
Data bus width: 32-bit internal,^[3] 16‑bit external^[4]
External data bus clock rate: 3.800245–5 MHz (5 MB/s external data access bandwidth)^[5]
Arithmetic logic units: 16-bit data ALU, 32-bit address ALU (2x 16-bit ALU)^[6]

Sound CPU: Zilog Z80

Clock rate: 3.579545 MHz (NTSC), 3.546894 MHz (PAL)
Some games did not use the Z80, other games used it only for sample playback, but most used it for sound processing
8 KB program RAM which the 68000 and the Z80 can freely write to (though the 68000 must request the Z80 bus)
Can access 32 KB of the 68000 memory map at once (while it should be used for accessing the cartridge, setting the bank register elsewhere can work on some hardware)
Instruction set: 8‑bit and 16‑bit instructions
Data bus width: 8‑bit

CPU instruction performance: 1.861363 MIPS (NTSC), 1.844386 MIPS (PAL)^[7]

68000 performance: 1.342329 MIPS (NTSC), 1.330086 MIPS (PAL)
Z80 performance: 0.519034 MIPS (NTSC), 0.5143 MIPS (PAL)

Audio

See YM2612 and Sega Master System/Technical specifications for further information

FM sound chip: Yamaha YM2612, clocked at the 68000 clock speed (7.670454 MHz in NTSC, 7.600489 MHz in PAL)

Most Mega Drive 2 and Genesis 3 systems actually use the core from the chip's CMOS equivalent, the YM3438 integrated into Sega-Yamaha ASIC (FC1004/FF1004/FJ3002/FQ8007)^[1]
Output frequency: 53.267 kHz (NTSC), 52.781 kHz (PAL)^[8]
Sound channels: 6

Default hardware configuration: 6 FM channels
Alternative hardware configuration: 5 FM channels, 1 PCM channel

6 channels of FM synthesis, Operator Type‑N

The third channel can enter a Special Mode, or multifrequency mode, where each individual operator has a different frequency
FM sample rate: 53.267 kHz (NTSC), 52.781 kHz (PAL)
FM operators: 4 operators per channel, 24 operators total

The sixth channel can enter a DAC mode where the sound program constantly streams 8‑bit unsigned PCM data to mix directly into the output waveform

PCM sample rate: Controlled by software, up to 26.3 kHz
Software mixing capabilities: Custom sound drivers can allow multiple PCM channels and audio compression^[9]^[10]

PSG sound chip: Sega PSG (SN76496),^[11] clocked at the Z80 clock speed (3.579545 MHz in NTSC, 3.546894 MHz in PAL) and built into the VDP — same as with the Master System

4 audio channels: Three channels of pure square wave tones, and one noise channel

The noise channel can play either white noise or "periodic noise" either at one of three preset frequencies or using the frequency of the third tone channel (consequently, that channel will be mute)

Clone of the SN76489 with different noise LFSR and frequency counter implementations

The cartridge connector has two pins which allow stereo sound mixing directly from cart. No game used this, however, but the 32X uses it for its PWM audio
The Mega Drive 1 has mono audio output from the TV output and stereo output from a built‑in headphone jack, plus a built‑in volume control. Future models drop the headphone jack and do stereo output from the TV output

Graphics

GPU: Sega 315‑5313 VDP (Yamaha YM7101)^[1]^[12]

Integrated circuit: Sega-Yamaha IC6 (with sound chips)^[1]
An evolution of the Sega Master System VDP (which is, in turn, an evolution of the TMS9918)
All TMS9918 modes were removed and replaced with several new modes
Controls background playfields and foreground sprites^[13]
Clock rate: 13.423294 MHz (NTSC), 13.300856 MHz (PAL)
Pixel clock rate: 6.711647 MHz (NTSC), 6.650428 MHz (PAL)
Internal data bus: 16-bit^[14]
External data buses: 16-bit CPU bus,^[14] 8/16-bit VRAM bus (Dual Port VRAM, 16-bit RAM/SAM, 8-bit RAM)
IRQ interrupt capabilities: IRQ6 VBlank interrupt, IRQ4 H‑Int (Horizontal Interrupt) scanline interrupt^[15]
DMA unit: Capable of DMA, high-speed fills and memory transfers, can transfer data from 68000 address space to VRAM/CRAM/VSRAM during active display and VBlank^[16]
Pixel format: Packed pixel

RGB/Composite Video Encoder DAC: Sony CXA1145 (NTSC/PAL)^[1]^[17] / Fujitsu MB3514 (PAL)^[12]^[18]

Colorburst clock frequency: 3.579545 MHz (NTSC), 4.433618 MHz (PAL)^[19]

Progressive scan resolutions:

NTSC: 320×224 ("40 column mode"), 256×224 ("32 column mode")
PAL: 320×224, 256×224, 320×240, 256×240

Interlaced resolutions:

NTSC: 320×448, 256×448
PAL: 320×448, 256×448, 320×480, 256×480
Note: "Interlaced mode" doubles the height of all resolutions; it was used by some games, such as Sonic 2 for two‑player mode.

Overscan resolutions:

Progressive scan: 427×262 (NTSC), 423×312 (PAL)^[20]
Interlaced: 427×524 (NTSC), 423×624 (PAL)

Tilemap resolutions: 256×256 to 512×512 and 1024×256
Refresh rate: 59.92274 Hz (NTSC), 49.701459 Hz (PAL)^[21]

Maximum frame rate: 59.92274 frames/sec (NTSC), 49.701459 frames/sec (PAL)

Four graphics planes: 2 scrolling tile planes (grids of tiles), "window" tile plane (cannot be transparent), sprite plane

Tilemap background planes: 2 scrolling planes, with horizontal and vertical tile flipping, individual tile priority, 6 tilemap sizes (256x256, 256x512, 256x1024, 512x256, 512x512, 1024x256),^[22] 32 bytes per tile,^[22] 16 colors per tile

Scrolling capabilities: Parallax scrolling, line and row scrolling, vertical and horizontal line scrolling, column scrolling.^[23]^[24]
40–64 scrolling layers: Each of the 2 tilemap planes can be split into multiple scrolling layers, 32 one-tile rows and 20 two-tile columns. Each scanline, row and column can be scrolled at different rates, and each row can be overlapped.^[23]^[25]

Background window plane, behind scrolling planes^[24]
Sprite plane: 80 sprites on screen, 20 sprites per scanline, 16 colors per sprite,^[26] integer sprite zooming^[27] (up to 320x224),^[24] definable sprite priorities, 32 bytes per sprite tile,^[13] sprite flipping, virtual 512×512 sprite space,^[28] sprites can be combined into larger sprites, up to 1280 sprite tiles (80x 32×32 sprites)

16 sprite sizes: 8×8, 8×16, 8×24, 8×32, 16×8, 16×16, 16×24, 16×32, 24×8, 24×16, 24×24, 24×32, 32×8, 32×16, 32×24, 32×32^[29]

Note: Priorities can be defined between planes.^[13]

Color palette:^[28]

Standard: 512 colors (9-bit RGB)
Shadow/Highlight mode: 1536 colors

Colors on screen:^[28]^[25]

Standard: 61–64 colors
Shadow/Highlight: 114–192 colors
Mid‑frame palette swap: 75–256 colors (see Blast Processing below)
Direct color: 256–512 colors (see Blast Processing below)

Colors per pixel: 16 colors (4‑bit)^[16]

Mid‑frame palette swap: 16 colors (4-bit) to 256 colors (8-bit)
Direct color: 256 colors (8-bit) to 512 colors (9-bit)

Shadow/Highlight: Hardware lighting,^[28] shadow generation (matching each character's shape),^[24] triples color palette and colors on screen, increases colors per tile
Video RAM: 64 KB VRAM (Dual-Port VRAM) — used to store graphics tiles, mappings for all layers, and horizontal scrolling^[30]

Scroll A Pattern Table: 2 KB (256x256) to 8 KB (512x512, 1024x256) for background tilemap plane A
Scroll B Pattern Table: 2 KB (256x256) to 8 KB (512x512, 1024x256) for background tilemap plane B
Window Pattern Name Table: 2 KB (256x224, 256x240) to 4 KB (320x224, 320x240) for static window plane
H Scroll Data Table: 1 KB for horizontal scrolling
Sprite Attribute Table: 512 bytes (256x224, 256x240) to 1 KB (320x224, 320x240) for sprite attributes
Pattern Generator Table: 2 KB to 56.5 KB for background tiles (64 to 1808 tiles, 32 KB per tile)
Sprite Generator Table: Up to 40 KB for sprite tiles (up to 1280 tiles, 32 KB per tile)
SAM buffer: 256 bytes separate cache within VRAM chips, for sending continuous stream of video screen refresh data to VDP while it reads/writes VRAM

VDP internal cache: 232 bytes

64 9‑bit words (72 bytes) of internal CRAM (Color RAM) — used to store the color palette

64 colors split into four 16‑color lines; each tile can be drawn with one of these four color lines
The first color in each line is transparent and any color of the entire palette can be used as a "background color" (when no pixels are drawn at a location); consequently the Mega Drive can display 61 colors on screen at once (unless raster effects or the Shadow/Highlight modes are used, in which case this number increases depending on the extent used)
Colors are 9‑bit RGB with 3 bits per color component, allowing for 512 colors
Shadow/Highlight modes increase color gamut (183—192 colors on screen, out of 1536 color palette)

80 bytes internal VSRAM (Vertical Scrolling RAM) — used for vertical scrolling (10‑bit words, up to 20 different vertical scroll values for each of the two scrolling playfields)^[29]
80 bytes internal sprite buffer — 8 bytes per sprite^[31]^[32]

Other features: Semi‑transparency, FIFO memory circuit design, read/write of one line buffer method for drawing^[24]

DMA

See Sega Mega Drive/Hardware comparison (Super NES) for technical comparison with SNES

The term "Blast Processing" was primarily a reference to the Mega Drive VDP graphics processor's powerful DMA unit that could handle DMA (direct memory access) operations at significantly faster speeds than the Super NES.^[33] The Mega Drive's DMA unit is part of the VDP, which is located on the same Sega-Yamaha IC6 integrated circuit as the sound chips.^[1] In comparison, the Super Nintendo's DMA unit is part of its Ricoh 5A22 CPU.^[34] The combination of the VDP's high-speed DMA unit with the 68000 CPU as well as faster memory is essentially what gives the Mega Drive a significant performance advantage over the SNES.

The Mega Drive could write to VRAM during active display, VBlank, and HBlank,^[29] whereas the SNES could only do so during VBlank and HBlank. The Mega Drive had higher memory bandwidth and was capable of quicker DMA transfer rates, giving it a faster performance than the SNES,^[35] and helped give the Mega Drive a higher fillrate, higher gameplay resolution, faster parallax scrolling, fast data blitting, and high frame-rate with many moving objects on screen, and allowed it to display more unique tiles (background and sprite tiles) and large sprites (32×32 and higher) on screen, and quickly transfer more unique tiles and large sprites (16×16 and higher) on screen.

The Mega Drive's DMA capabilities also helped give it more flexibility, allowing the hardware to be programmed in various different ways. Combining the CPU's fast arithmetic with the VDP's fast DMA, it could replicate some of the SNES's hardware features with software programming, such as larger 64×64 sprites (combining 32×32 sprites), background scaling and rotation (like the Sega X Board and Mode 7), and direct color (increasing colors on screen). Other programmable capabilities include mid-frame palette swaps (increasing colors per scanline), bitmap framebuffers, sprite scaling and rotation, and ray casting. The optional Sega Virtua Processor (SVP) cartridge enhancement chip provided for faster polygon rendering, though it was only used by a single game due to its high cost.

Later on, various homebrew software for the Mega Drive implemented software 3D polygon graphics rendering with a performance almost approaching the SNES's optional Super FX (SFX) cartridge enhancement chip,^[36]^[37]^[38]^[39].

DMA controller: Sega 315‑5313 VDP (Yamaha YM7101) DMA unit^[40]^[20]

VRAM transfer per scanline: 205 bytes per VBlank scanline, 18 bytes per active scanline
CRAM/VSRAM transfer per scanline: 410 bytes per VBlank scanline, 36 bytes per active scanline
VBlank scanlines in standard 224-line display: 38 (NTSC), 88 (PAL)
VBlank scanlines in custom 192-line display: 70 (NTSC), 120 (PAL)
VBlank scanlines in custom 160-line display: 103 (NTSC), 153 (PAL)^[41]
Refresh rate: 59.92274 Hz (NTSC), 49.701459 Hz (PAL)

VRAM bandwidth: 8–11.764705 MB/s (NTSC), 8–8.333333 MB/s (PAL) (see Memory below)^[40]^[20]

Maximum DMA transfer rate: 3.21845 MB/s (inactive display)
Maximum DMA transfer per frame: 53.71 KB (NTSC), 63.96 KB (PAL)
DMA transfer per frame during active display: 11.822–23.995 KB (NTSC), 22.072–34.245 KB (PAL)^{[n 1]}
DMA transfer rate during active display: 708.406 KB/s to 1.437846 MB/s (NTSC), 1.09701 MB/s to 1.702026 MB/s (PAL)^{[n 2]}

CRAM/VSRAM cache bandwidth: 26.846588 MB/s (NTSC), 26.601712 MB/s (PAL) (see Memory below)^[40]^[20]

Maximum DMA transfer rate: 6.4369 MB/s (inactive display)
Maximum DMA transfer per frame: 107.42 KB (NTSC), 127.92 KB (PAL)
DMA transfer per frame during active display: 23.644–47.99 KB (NTSC), 44.144–68.490 KB (PAL)^{[n 3]}
DMA transfer rate during active display: 1.416813–2.875692 MB/s (NTSC), 2.194021–3.404052 MB/s (PAL)^{[n 4]}

Pixel fillrate: 6.934358 MPixels/s (NTSC), 6.650428 MPixels/s (PAL)

Maximum write fillrate: 6.4369 MPixels/s, 410 pixels/scanline
Maximum write per frame: 107,420 pixels (NTSC), 127,920 pixels (PAL)
Write per frame during active display: 23,644–47,990 pixels (NTSC), 44,144–68,490 pixels (PAL)^{[n 5]}
Write fillrate during active display: 1.416813–2.875692 MPixels/s (NTSC), 2.194021–3.404052 MPixels/s (PAL)^{[n 6]}

Tile fillrate: 1808 tiles per frame,^[22] 108,340 tiles/sec (NTSC), 89,860 tiles/sec (PAL)

Texel fillrate: 115,712 texels (1808x 8×8 tiles) per frame, 6.934358 MTexels/s (NTSC), 5.751055 MTexels/s (PAL)
Tile transfer per frame during active display: 369–749 tiles (NTSC), 689–1070 tiles (PAL)^{[n 7]}

Sprite fillrate: 80 sprites/frame, 4793 sprites/sec (NTSC), 3976 sprites/sec (PAL)

Sprite texel fillrate: 320 texels/scanline, 81,920 texels (80× 32×32 sprites) per frame,^[28] 4.90887 MTexels/s (NTSC), 4.071543 MTexels/s (PAL)
Sprite tile fillrate: 1280 sprite tiles (80x 32×32 sprites) per frame, 76,701 sprite tiles/sec (NTSC), 63,617 sprite tiles/sec (PAL)
Sprite display per frame: 80 sprites (8×8 to 32×32), 20 sprites (64×64), 4 sprites (128×128)

Sprite display per scanline: 20 sprites (8×8 to 16×16), 13 sprites (24×24), 10 sprites (32×32), 5 sprites (64×64)

Sprite transfer per frame during standard 224-line active display:

NTSC: 80 sprites (8×8 to 16×16), 41 sprites (24×24), 23 sprites (32×32), 5 sprites (64×64)
PAL: 80 sprites (8×8 to 16×16), 76 sprites (24×24), 43 sprites (32×32), 10 sprites (64×64)

Sprite transfer per frame during custom 160-line active display:

NTSC: 80 sprites (8×8 to 24×24), 46 sprites (32×32), 11 sprites (64×64)
PAL: 80 sprites (8×8 to 24×24), 66 sprites (32×32), 16 sprites (64×64)

Effective fillrate: 2 tilemaps (256×256 to 512×512), 80 sprites (8×8 to 32×32)

Effective tile fillrate: 1808–9472 tiles/frame, 108,340–567,588 tiles/sec
Effective pixel fillrate: 115,712–606,208 pixels/frame, 6.934358–36.325644 MPixels/s

Programmable custom resolutions:

Display resolutions: 128×160 to 320×160, 128×224 to 160×224
Background tilemap planes: 128×160 to 768×512^[42]
Bitmap framebuffer: Single/Double buffering, 128×160 to 320×408^{[n 8]}

Mid-frame palette swap: Can use DMA to change color while drawing each scanline, sending more data/colors to the CRAM and DAC^[43]^[24]

Colors on screen: 75 colors (Sonic 2) to 512 colors (demo with scrolling background)
Shadow/Highlight colors on screen: 114 colors (Sonic 2 prototype) to 1536 colors (demo with scrolling background)
Colors per pixel: 16 colors (4-bit) to 256 colors (8-bit)
Color palette: Up to 4096 colors (12-bit) for static bitmap images^[44]

Direct color: Can use DMA to reprogram CRAM from a color palette to a direct color display^[35]

Colors on screen: 256 colors (8-bit) to 512 colors (9-bit)

Static bitmap images: Up to 4096 colors (12-bit)^[44]

Colors per pixel: 256 colors (8-bit) to 512 colors (9-bit)
Resolutions: 160×224, 128×224

3D polygon graphics: Capable of 3D polygons with stock Mega Drive hardware (without needing enhancement chips), capable of 3D texture mapping,^[45] can use DMA to render bitmap framebuffer (double-buffered) that displays 3D polygons^[36]^[41]

Vertex transformations: 10,000 vertices/sec (767 cycles/vertex), 500 vertices/frame
Polygon transformations: 3300 polygons/sec (2301 cycles/triangle), 166 polygons/frame
Framebuffer rendering: 256×160, double-buffered, 15–30 FPS^[46]^{[n 9]}
Flat shading: 1800 polygons/sec^{[n 10]}
Texture mapping: 1000 polygons/sec^{[n 11]}

Full motion video (FMV) playback:

Compression formats: RNC,^[50] LZSS, LZ77, Huffman
Video bitrate: 4.608 Mbps, 576 Kbps, 24 KB per frame^[51]
Maximum quality: 320×224 resolution, 8-bit color, 30 fps^[50]^[51]

Other DMA programmable capabilities: Scaling and rotation (like Sega X Board and Mode 7),^[52]^[53] ray casting
Optional cartridge enhancement chip: Sega Virtua Processor (only used in Virtua Racing), enhances Mega Drive's 3D polygon performance. It can calculate geometry for 50,000 polygons/sec and render 20,000 polygons/sec. It also has higher memory, bandwidth, fillrate, framebuffer resolution, and frame rate.

Memory

System RAM: 136 KB

Main RAM: 64 KB (repeated over the upper 2 MB of address space)
VRAM: 64 KB

FPM DRAM: 64 KB
SAM buffer cache: 256 bytes^[54]^[55]

Audio RAM: 8 KB

VDP internal cache: 232 bytes^[28]

CRAM (Color RAM): 72 bytes (576 bits)
VSRAM (Vertical Scrolling RAM): 80 bytes (640 bits)
Sprite cache: 80 bytes (640 bits)^[31]^[32]

Cartridge memory: 512–8224 KB

ROM: 512 KB (4 Mbits) to 8 MB (64 Mbits)^[56]^[57]
SRAM: 8 KB to 32 KB^[58]

Configuration

System memory buses:^[1]

16‑bit system bus — 68000 & VDP <‑> Main RAM & Cartridge ROM/RAM
8‑bit system bus — Z80 & YM2612 <‑> Audio RAM
8/16‑bit video bus — VDP <‑> VRAM

System RAM chips:^[12]^[54]

Main RAM: 16‑bit (2x 8‑bit), PSRAM, 5.263157 MHz (190 ns)^[59]^[60]

CPU access: 3.800245–5 MHz (200–263 ns)

VRAM: 8/16-bit Dual‑Port VRAM, 16-bit RAM/SAM, 8-bit RAM (see Mega Drive PCB revisions)^[61]^[62]

Performance: 13.423294 MHz (NTSC, 74 ns), 13.300856 MHz (PAL, 75 ns)
FPM DRAM: 2048-bit internal (8x 256-bit arrays), 8-bit external (2x 4‑bit), 8.333333 MHz (120 ns),^[55]^[63] 8 MHz (125 ns, when reading SAM)^[55]
SAM buffer cache: 8-bit (2x 4‑bit), 13.423294 MHz (NTSC, 74 ns), 13.300856 MHz (PAL, 75 ns), VDP reads continuous stream of video screen refresh data from SAM while reading/writing DRAM^[64]

Audio RAM: 8‑bit, SRAM/XRAM, 3.030303 MHz (330 ns)^[65]^[66]^[67]^[68]

Cartridge ROM chips: 16‑bit^[69]

Most cartridges: MROM, 5 MHz (200 ns)^[70]^[71]^[5]
Some cartridges: MROM/EPROM, 7.670454 MHz (NTSC), 7.600489 MHz (PAL), 130–131 ns^[71]^[72]

Bandwidth

System RAM bandwidth: 26.979911MB/s (NTSC), 26.857473 MB/s (PAL)

Main RAM: 10.526314 MB/s (16-bit, 5.263157 MHz)

CPU access: 5 MB/s

VRAM: 13.423294 MB/s (NTSC), 13.300856 MB/s (PAL)

FPM DRAM: 8.333333 MB/s (RAM), 8 MB/s (when reading SAM)
SAM buffer cache: 13.423294 MB/s (NTSC), 13.300856 MB/s (PAL)

Audio RAM: 3.030303 MB/s (8-bit, 3.030303 MHz)

Z80 access: 1.193182 MB/s (NTSC), 1.182298 MB/s (PAL)^[73]

Cartridge ROM bandwidth: 10 MB/s (most cartridges), 15.200978–15.340906 MB/s (some cartridges)

68000 access: 5 MB/s (5 MHz)
Z80 access: 1.191969 MB/s (NTSC), 1.181096 MB/s (PAL)^[75]

Internal processor bandwidth:

68000 internal bus: 30.681812 MB/s (NTSC, 32-bit, 7.670454 MHz), 30.401956 MB/s (PAL, 32-bit, 7.600489 MHz)
Z80 internal bus: 3.579545 MB/s (NTSC), 3.546894 MB/s (PAL)
VDP internal RAM cache: 26.846588 MB/s (NTSC, 16-bit, 13.423294 MHz), 26.601712 MB/s (PAL, 16-bit, 13.423294 MHz)

Memory map

Main article: Sega Mega Drive/Memory map.

Input

Controller input: Two male DE-9 controller ports; one female DE-9 expansion port (early MD1s only)

Controller ports support two modes: parallel and serial
Parallel supports 7‑bit bidirectional, with the console setting the direction of each bit.
Parallel also supports optional active‑low interrupts on the TH line. (mapped to 68000 IRQ 2)
Serial mode supports up to 4800 bps. (used by the Mega Modem on port 3)

Expansion port: Used for Sega CD.

Provides access to /FDC ($A120xx) and /DISK to indicate Sega CD presence.
Maps Sega CD PRG RAM to $000000 when no cartridge is present, $400000 otherwise.

Enhancements

Sega Virtua Processor

Main article: Sega Virtua Processor.

Add-ons

Notes

↑
[DMA transfer per frame during active display:
- 224-line display: 11.822 KB (NTSC), 22.072 KB (PAL)
- 192-line display: 17.806 KB (NTSC), 28.056 KB (PAL)
- 160-line display: 23.995 KB (NTSC), 34.245 KB (PAL)
DMA transfer per frame during active display:
- 224-line display: 11.822 KB (NTSC), 22.072 KB (PAL)
- 192-line display: 17.806 KB (NTSC), 28.056 KB (PAL)
- 160-line display: 23.995 KB (NTSC), 34.245 KB (PAL)]
↑
[DMA transfer rate during active display:
- 224-line display: 708.406 KB/s (NTSC), 1.09701 MB/s (PAL)
- 192-line display: 1.066984 MB/s (NTSC), 1.394424 MB/s (PAL)
- 160-line display: 1.437846 MB/s (NTSC), 1.702026 MB/s (PAL)
DMA transfer rate during active display:
- 224-line display: 708.406 KB/s (NTSC), 1.09701 MB/s (PAL)
- 192-line display: 1.066984 MB/s (NTSC), 1.394424 MB/s (PAL)
- 160-line display: 1.437846 MB/s (NTSC), 1.702026 MB/s (PAL)]
↑
[DMA transfer per frame during active display:
- 224-line display: 23.644 KB (NTSC), 44.144 KB (PAL)
- 160-line display: 47.99 KB (NTSC), 68.490 KB (PAL)
DMA transfer per frame during active display:
- 224-line display: 23.644 KB (NTSC), 44.144 KB (PAL)
- 160-line display: 47.99 KB (NTSC), 68.490 KB (PAL)]
↑
[DMA transfer rate during active display:
- 224-line display: 1.416813 MB/s (NTSC), 2.194021 MB/s (PAL)
- 160-line display: 2.875692 MB/s (NTSC), 3.404052 MB/s (PAL)
DMA transfer rate during active display:
- 224-line display: 1.416813 MB/s (NTSC), 2.194021 MB/s (PAL)
- 160-line display: 2.875692 MB/s (NTSC), 3.404052 MB/s (PAL)]
↑
[Write per frame during active display:
- 224-line display: 23,644 pixels (NTSC), 44,144 pixels (PAL)
- 160-line display: 47,990 pixels (NTSC), 68,490 pixels (PAL)
Write per frame during active display:
- 224-line display: 23,644 pixels (NTSC), 44,144 pixels (PAL)
- 160-line display: 47,990 pixels (NTSC), 68,490 pixels (PAL)]
↑
[Write fillrate during active display:
- 224-line display: 1.416813 MPixels/s (NTSC), 2.194021 MPixels/s (PAL)
- 160-line display: 2.875692 MPixels/s (NTSC), 3.404052 MPixels/s (PAL)
Write fillrate during active display:
- 224-line display: 1.416813 MPixels/s (NTSC), 2.194021 MPixels/s (PAL)
- 160-line display: 2.875692 MPixels/s (NTSC), 3.404052 MPixels/s (PAL)]
↑
[Tile transfer per frame during active display:
- Standard 224-line display: 369 tiles (NTSC), 689 tiles (PAL)
- Custom 160-line display: 749 tiles (NTSC), 1070 tiles (PAL)
Tile transfer per frame during active display:
- Standard 224-line display: 369 tiles (NTSC), 689 tiles (PAL)
- Custom 160-line display: 749 tiles (NTSC), 1070 tiles (PAL)]
↑
[Bitmap framebuffer:
- Single buffering: 128×160 to 512×256 and 320×408
- Double buffering: 128×160 to 256×256 and 320×204
Bitmap framebuffer:
- Single buffering: 128×160 to 512×256 and 320×408
- Double buffering: 128×160 to 256×256 and 320×204]
↑ [40 KB memory, 614.4 KB/s (15 FPS) to 1.2288 MB/s (30 FPS) bandwidth, 2.383275 CPU cycles per byte VRAM DMA transfer, 1.464285 MHz (15 FPS) to 2.928568 MHz (30 FPS) DMA, 4.741885 MHz (30 FPS) to 6.206168 MHz (15 FPS) remaining for polygons 40 KB memory, 614.4 KB/s (15 FPS) to 1.2288 MB/s (30 FPS) bandwidth, 2.383275 CPU cycles per byte VRAM DMA transfer, 1.464285 MHz (15 FPS) to 2.928568 MHz (30 FPS) DMA, 4.741885 MHz (30 FPS) to 6.206168 MHz (15 FPS) remaining for polygons]
↑
[32-pixel polygons, 15 FPS, scanline rendering, 250 cycles/scanline per poly,^[47]^[48] 3301 cycles/poly (32-pixel), 166 polygons/frame
- Polygon memory: 40 bytes/poly, 6.485 KB memory (166 polygons/frame), 72 KB/s bandwidth (1800 polygons/sec)
32-pixel polygons, 15 FPS, scanline rendering, 250 cycles/scanline per poly,^[47]^[48] 3301 cycles/poly (32-pixel), 166 polygons/frame
- Polygon memory: 40 bytes/poly, 6.485 KB memory (166 polygons/frame), 72 KB/s bandwidth (1800 polygons/sec)]
↑ [38 cycles/texel,^[49] 2432 draw cycles per 8×8 texel texture, 77 cycles DMA transfer (32 bytes) per 8×8 texel texture, 5810 cycles (2509 texture cycles) per 8×8 texel polygon 38 cycles/texel,^[49] 2432 draw cycles per 8×8 texel texture, 77 cycles DMA transfer (32 bytes) per 8×8 texel texture, 5810 cycles (2509 texture cycles) per 8×8 texel polygon]

References

↑ ^1.0 ^1.1 ^1.2 ^1.3 ^1.4 ^1.5 ^1.6 File:Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf
↑ https://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h
↑ Hardware and Computer Organization, page 136
↑ http://www.digitpress.com/faq/megadrive.htm
↑ ^5.0 ^5.1 Ben Heck’s 16-Bit Console Wars! (6:07) (The Ben Heck Show)
↑ The 68000 Microprocessor, page 5
↑ Obsolete Microprocessors
↑ Yamaha YM2612 Emulation Core
↑ ResComp 1.5 (April 2016)
↑ Dual PCM
↑ SN76496 (MAME)
↑ ^12.0 ^12.1 ^12.2 Mega Drive PCB revisions
↑ ^13.0 ^13.1 ^13.2 File:GenesisTechnicalOverview.pdf, page 2
↑ ^14.0 ^14.1 File:GenesisTechnicalOverview.pdf, page 15
↑ Genesis (MESS)
↑ ^16.0 ^16.1 File:GenesisTechnicalOverview.pdf, page 3
↑ File:CXA1145P datasheet.pdf
↑ File:MB3514 datasheet.pdf
↑ 315-5313 Information
↑ ^20.0 ^20.1 ^20.2 ^20.3 File:GenesisTechnicalOverview.pdf, page 14
↑ Genesis Plus
↑ ^22.0 ^22.1 ^22.2 File:GenesisTechnicalOverview.pdf, page 13
↑ ^23.0 ^23.1 File:GenesisTechnicalOverview.pdf, page 46
↑ ^24.0 ^24.1 ^24.2 ^24.3 ^24.4 ^24.5 How Sega Built the Genesis: Masami Ishikawa Inteview (Polygon)
↑ ^25.0 ^25.1 Sega Genesis Comparison
↑ Sega Programming FAQ (October 18, 1995)
↑ Sega Master System VDP Documentation
↑ ^28.0 ^28.1 ^28.2 ^28.3 ^28.4 ^28.5 Sega Genesis VDP Documentation
↑ ^29.0 ^29.1 ^29.2 File:GenesisTechnicalOverview.pdf
↑ File:GenesisTechnicalOverview.pdf, page 79
↑ ^31.0 ^31.1 VDP: Sprites
↑ ^32.0 ^32.1 VDP Sprite (SGDK)
↑ Blast Processing 101
↑ SNES hardware specifications
↑ ^35.0 ^35.1 Sega Genesis vs Super Nintendo
↑ ^36.0 ^36.1 3D math engine (SGDK)
↑ Interview: Lee Actor (Sterling Software Programmer)
↑ Star Fox 3D Tech Demo on Sega Genesis
↑ Star Fox 3D Tech Demo on Sega Genesis: Version 2 Using DMA
↑ ^40.0 ^40.1 ^40.2 File:GenesisTechnicalOverview.pdf, page 45
↑ ^41.0 ^41.1 Bitmap engine (SGDK)
↑ Sonic the Hedgehog 2 (The Cutting Room Floor)
↑ The Man Responsible For Sega's Blast Processing (Nintendo Life)
↑ ^44.0 ^44.1 How a SEGA GLITCH created stunning images
↑ D Polygonal Texturé - MegaDrive/Genesis (YouTube)
↑ Star Fox 3D Tech Demo on Sega Genesis: Version 2 Using DMA (YouTube)
↑ Polygon cycles
↑ 3D on the Sega Genesis is possible (SpritesMind)
↑ 3D on the Sega Genesis is possible
↑ ^50.0 ^50.1 SONIC 3D's Intro Sequence Is Impossible To Fit On A Cartridge - Right?
↑ ^51.0 ^51.1 Was Sega CD FMV really the best the Sega Mega Drive / Genesis Could do? Mike's Mega Drive FMV codec
↑ Sega Genesis Games That Pushed The Limits of Graphics & Sound (Racket Boy)
↑ Mode 7 demo for Genesis/MD (SpritesMind)
↑ ^54.0 ^54.1 File:Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf, page 8
↑ ^55.0 ^55.1 ^55.2 File:UPD41264 datasheet.pdf
↑ 2010's Sega Mega Drive RPG Pier Solar coming to Xbox 360, PC and Mac in HD, Eurogamer
↑ SSFII Genesis Technical Information (2000-07-26)
↑ MegaDrive/Genesis Pinouts
↑ File:HM65256B datasheet.pdf
↑ File:TC51832 datasheet.pdf
↑ File:HM53461 datasheet.pdf
↑ File:KM424C64 datasheet.pdf
↑ File:MB81461 datasheet.pdf
↑ Understanding VRAM and SGRAM Operation (page 3) (IBM)
↑ File:TMM2063P datasheet.pdf
↑ File:UPD4168 datasheet.pdf
↑ File:KM6264B datasheet.pdf
↑ File:LC3664R datasheet.pdf
↑ ROM Part Numbers
↑ File:MB834200A datasheet.pdf
↑ ^71.0 ^71.1 File:MB838200B datasheet.pdf
↑ File:M27C322 datasheet.pdf
↑ ^73.0 ^73.1 File:Zilog Z80 Programmer's Reference Manual.pdf, page 33
↑ Zilog Z80 (Mega Drive Wiki)
↑ [3 cycles per byte,^[73] 100 cycles per 32 KB bank switch^[74] 3 cycles per byte,^[73] 100 cycles per 32 KB bank switch^[74]]

Sega Mega Drive
Topics	Technical specifications (Hardware comparison) \| History \| List of games \| Magazine articles \| Promotional material \| Merchandise \| Cartridges \| TradeMark Security System
Hardware	Japan \| North America \| Western Europe \| Eastern Europe \| South America \| Asia \| South Korea \| Australasia \| Africa EZ Games \| Genesis 3 \| LaserActive \| Mega Jet \| Mega PC \| Mega Play \| Mega-Tech System \| Mega 6 \| Nomad \| Teradrive \| Mega Drive Mini \| Mega Drive Mini 2 New Mega Drive \| Tianli VCD/DVD Players \| "Consoles on a chip" \| Licensed clones (Magic 2 \| Mega Game II \| Power Pegasus \| Super Bitman) Unlicensed clones
Add-ons	Game Box \| Power Base Converter \| Mega-CD \| 32X (Mega-CD 32X) \| Mega Modem \| Demo System DS-16
Cases	Sega Genesis Nomad Carrying Case \| System Carry Case
Controllers	Control Pad \| Six Button Control Pad \| 6 Button Arcade Pad \| Arcade Power Stick 6B \| Konami Justifier \| MK-1470 Action Chair \| Activator \| Arcade Power Stick \| Keyboard \| MegaFire \| Mouse \| Mega Stick \| Menacer \| Remote Arcade System \| Ten Key Pad \| Third Party Controllers
Accessories	4 Way Play \| AC adaptor \| Cleaning System \| Control Pad Extension Cord \| Game Factory \| Genesis Speakers \| Headset \| HeartBeat Catalyst \| Microphone \| Region converter cartridges \| Mega Terminal \| Nomad PowerBack \| RF Unit \| SCART Cable \| Stereo Audio Video Cable \| Team Player \| Video Monitor Cable \| Third-party AC adaptors \| Third Party Accessories
Network services	Sega Channel \| Sega Game Toshokan \| Mega Anser \| Mega Net \| TeleBradesco Residência \| XB∀ND
Development tools	ERX 308P \| ERX 318P \| Sprobe \| SNASM68K \| SNASM2 (Mega Drive) \| SNASM2 (32X) \| PSY-Q Development System (Mega Drive) \| PSY-Q Development System (32X) \| 32X CartDev \| Sega Mars Development Aid System \| Sega 32X Development Target
Unreleased	Edge 16 \| Floppy Disk Drive \| Mega Play 1010 \| Sega VR \| Teleplay System \| Video Jukebox

[DMA_transfer_per_frame_during_active_display:.0A.2A_224-line_display:_11.822_KB_.28NTSC.29.2C_22.072_KB_.28PAL.29.0A.2A_192-line_display:_17.806_KB_.28NTSC.29.2C_28.056_KB_.28PAL.29.0A.2A_160-line_display:_23.995_KB_.28NTSC.29.2C_34.245_KB_.28PAL.29-42] [DMA transfer per frame during active display:
224-line display: 11.822 KB (NTSC), 22.072 KB (PAL)

192-line display: 17.806 KB (NTSC), 28.056 KB (PAL)

160-line display: 23.995 KB (NTSC), 34.245 KB (PAL)
DMA transfer per frame during active display:
224-line display: 11.822 KB (NTSC), 22.072 KB (PAL)

192-line display: 17.806 KB (NTSC), 28.056 KB (PAL)

160-line display: 23.995 KB (NTSC), 34.245 KB (PAL)]

[2] 224-line display: 11.822 KB (NTSC), 22.072 KB (PAL)

[3] 192-line display: 17.806 KB (NTSC), 28.056 KB (PAL)

[4] 160-line display: 23.995 KB (NTSC), 34.245 KB (PAL)

[5] 224-line display: 11.822 KB (NTSC), 22.072 KB (PAL)

[6] 192-line display: 17.806 KB (NTSC), 28.056 KB (PAL)

[7] 160-line display: 23.995 KB (NTSC), 34.245 KB (PAL)]

[DMA_transfer_rate_during_active_display:.0A.2A_224-line_display:_708.406_KB.2Fs_.28NTSC.29.2C_1.09701_MB.2Fs_.28PAL.29.0A.2A_192-line_display:_1.066984_MB.2Fs_.28NTSC.29.2C_1.394424_MB.2Fs_.28PAL.29.0A.2A_160-line_display:_1.437846_MB.2Fs_.28NTSC.29.2C_1.702026_MB.2Fs_.28PAL.29-43] [DMA transfer rate during active display:
224-line display: 708.406 KB/s (NTSC), 1.09701 MB/s (PAL)

192-line display: 1.066984 MB/s (NTSC), 1.394424 MB/s (PAL)

160-line display: 1.437846 MB/s (NTSC), 1.702026 MB/s (PAL)
DMA transfer rate during active display:
224-line display: 708.406 KB/s (NTSC), 1.09701 MB/s (PAL)

192-line display: 1.066984 MB/s (NTSC), 1.394424 MB/s (PAL)

160-line display: 1.437846 MB/s (NTSC), 1.702026 MB/s (PAL)]

[9] 224-line display: 708.406 KB/s (NTSC), 1.09701 MB/s (PAL)

[10] 192-line display: 1.066984 MB/s (NTSC), 1.394424 MB/s (PAL)

[11] 160-line display: 1.437846 MB/s (NTSC), 1.702026 MB/s (PAL)

[12] 224-line display: 708.406 KB/s (NTSC), 1.09701 MB/s (PAL)

[13] 192-line display: 1.066984 MB/s (NTSC), 1.394424 MB/s (PAL)

[14] 160-line display: 1.437846 MB/s (NTSC), 1.702026 MB/s (PAL)]

[DMA_transfer_per_frame_during_active_display:.0A.2A_224-line_display:_23.644_KB_.28NTSC.29.2C_44.144_KB_.28PAL.29.0A.2A_160-line_display:_47.99_KB_.28NTSC.29.2C_68.490_KB_.28PAL.29-44] [DMA transfer per frame during active display:
224-line display: 23.644 KB (NTSC), 44.144 KB (PAL)

160-line display: 47.99 KB (NTSC), 68.490 KB (PAL)
DMA transfer per frame during active display:
224-line display: 23.644 KB (NTSC), 44.144 KB (PAL)

160-line display: 47.99 KB (NTSC), 68.490 KB (PAL)]

[16] 224-line display: 23.644 KB (NTSC), 44.144 KB (PAL)

[17] 160-line display: 47.99 KB (NTSC), 68.490 KB (PAL)

[18] 224-line display: 23.644 KB (NTSC), 44.144 KB (PAL)

[19] 160-line display: 47.99 KB (NTSC), 68.490 KB (PAL)]

[DMA_transfer_rate_during_active_display:.0A.2A_224-line_display:_1.416813_MB.2Fs_.28NTSC.29.2C_2.194021_MB.2Fs_.28PAL.29.0A.2A_160-line_display:_2.875692_MB.2Fs_.28NTSC.29.2C_3.404052_MB.2Fs_.28PAL.29-45] [DMA transfer rate during active display:
224-line display: 1.416813 MB/s (NTSC), 2.194021 MB/s (PAL)

160-line display: 2.875692 MB/s (NTSC), 3.404052 MB/s (PAL)
DMA transfer rate during active display:
224-line display: 1.416813 MB/s (NTSC), 2.194021 MB/s (PAL)

160-line display: 2.875692 MB/s (NTSC), 3.404052 MB/s (PAL)]

[21] 224-line display: 1.416813 MB/s (NTSC), 2.194021 MB/s (PAL)

[22] 160-line display: 2.875692 MB/s (NTSC), 3.404052 MB/s (PAL)

[23] 224-line display: 1.416813 MB/s (NTSC), 2.194021 MB/s (PAL)

[24] 160-line display: 2.875692 MB/s (NTSC), 3.404052 MB/s (PAL)]

[Write_per_frame_during_active_display:.0A.2A_224-line_display:_23.2C644_pixels_.28NTSC.29.2C_44.2C144_pixels_.28PAL.29.0A.2A_160-line_display:_47.2C990_pixels_.28NTSC.29.2C_68.2C490_pixels_.28PAL.29-46] [Write per frame during active display:
224-line display: 23,644 pixels (NTSC), 44,144 pixels (PAL)

160-line display: 47,990 pixels (NTSC), 68,490 pixels (PAL)
Write per frame during active display:
224-line display: 23,644 pixels (NTSC), 44,144 pixels (PAL)

160-line display: 47,990 pixels (NTSC), 68,490 pixels (PAL)]

[26] 224-line display: 23,644 pixels (NTSC), 44,144 pixels (PAL)

[27] 160-line display: 47,990 pixels (NTSC), 68,490 pixels (PAL)

[28] 224-line display: 23,644 pixels (NTSC), 44,144 pixels (PAL)

[29] 160-line display: 47,990 pixels (NTSC), 68,490 pixels (PAL)]

[Write_fillrate_during_active_display:.0A.2A_224-line_display:_1.416813_MPixels.2Fs_.28NTSC.29.2C_2.194021_MPixels.2Fs_.28PAL.29.0A.2A_160-line_display:_2.875692_MPixels.2Fs_.28NTSC.29.2C_3.404052_MPixels.2Fs_.28PAL.29-47] [Write fillrate during active display:
224-line display: 1.416813 MPixels/s (NTSC), 2.194021 MPixels/s (PAL)

160-line display: 2.875692 MPixels/s (NTSC), 3.404052 MPixels/s (PAL)
Write fillrate during active display:
224-line display: 1.416813 MPixels/s (NTSC), 2.194021 MPixels/s (PAL)

160-line display: 2.875692 MPixels/s (NTSC), 3.404052 MPixels/s (PAL)]

[31] 224-line display: 1.416813 MPixels/s (NTSC), 2.194021 MPixels/s (PAL)

[32] 160-line display: 2.875692 MPixels/s (NTSC), 3.404052 MPixels/s (PAL)

[33] 224-line display: 1.416813 MPixels/s (NTSC), 2.194021 MPixels/s (PAL)

[34] 160-line display: 2.875692 MPixels/s (NTSC), 3.404052 MPixels/s (PAL)]

[Tile_transfer_per_frame_during_active_display:.0A.2A_Standard_224-line_display:_369_tiles_.28NTSC.29.2C_689_tiles_.28PAL.29.0A.2A_Custom_160-line_display:_749_tiles_.28NTSC.29.2C_1070_tiles_.28PAL.29-48] [Tile transfer per frame during active display:
Standard 224-line display: 369 tiles (NTSC), 689 tiles (PAL)

Custom 160-line display: 749 tiles (NTSC), 1070 tiles (PAL)
Tile transfer per frame during active display:
Standard 224-line display: 369 tiles (NTSC), 689 tiles (PAL)

Custom 160-line display: 749 tiles (NTSC), 1070 tiles (PAL)]

[36] Standard 224-line display: 369 tiles (NTSC), 689 tiles (PAL)

[37] Custom 160-line display: 749 tiles (NTSC), 1070 tiles (PAL)

[38] Standard 224-line display: 369 tiles (NTSC), 689 tiles (PAL)

[39] Custom 160-line display: 749 tiles (NTSC), 1070 tiles (PAL)]

[Bitmap_framebuffer:.0A.2A_Single_buffering:_128.C3.97160_to_512.C3.97256_and_320.C3.97408.0A.2A_Double_buffering:_128.C3.97160_to_256.C3.97256_and_320.C3.97204-50] [Bitmap framebuffer:
Single buffering: 128×160 to 512×256 and 320×408

Double buffering: 128×160 to 256×256 and 320×204
Bitmap framebuffer:
Single buffering: 128×160 to 512×256 and 320×408

Double buffering: 128×160 to 256×256 and 320×204]

[41] Single buffering: 128×160 to 512×256 and 320×408

[42] Double buffering: 128×160 to 256×256 and 320×204

[43] Single buffering: 128×160 to 512×256 and 320×408

[44] Double buffering: 128×160 to 256×256 and 320×204]

[40_KB_memory.2C_614.4_KB.2Fs_.2815_FPS.29_to_1.2288_MB.2Fs_.2830_FPS.29_bandwidth.2C_2.383275_CPU_cycles_per_byte_VRAM_DMA_transfer.2C_1.464285_MHz_.2815_FPS.29_to_2.928568_MHz_.2830_FPS.29_DMA.2C_4.741885_MHz_.2830_FPS.29_to_6.206168_MHz_.2815_FPS.29_remaining_for_polygons-55] [40 KB memory, 614.4 KB/s (15 FPS) to 1.2288 MB/s (30 FPS) bandwidth, 2.383275 CPU cycles per byte VRAM DMA transfer, 1.464285 MHz (15 FPS) to 2.928568 MHz (30 FPS) DMA, 4.741885 MHz (30 FPS) to 6.206168 MHz (15 FPS) remaining for polygons 40 KB memory, 614.4 KB/s (15 FPS) to 1.2288 MB/s (30 FPS) bandwidth, 2.383275 CPU cycles per byte VRAM DMA transfer, 1.464285 MHz (15 FPS) to 2.928568 MHz (30 FPS) DMA, 4.741885 MHz (30 FPS) to 6.206168 MHz (15 FPS) remaining for polygons]

[32-pixel_polygons.2C_15_FPS.2C_.5B.5Bwikipedia:Scanline_rendering.7Cscanline_rendering.5D.5D.2C_250_cycles.2Fscanline_per_poly.2C.7F.27.22.60UNIQ--ref-00000099-QINU.60.22.27.7F.7F.27.22.60UNIQ--ref-0000009A-QINU.60.22.27.7F_3301_cycles.2Fpoly_.2832-pixel.29.2C_166_polygons.2Fframe.0A.2A_Polygon_memory:_40_bytes.2Fpoly.2C_6.485_KB_memory_.28166_polygons.2Fframe.29.2C_72_KB.2Fs_bandwidth_.281800_polygons.2Fsec.29-58] [32-pixel polygons, 15 FPS, scanline rendering, 250 cycles/scanline per poly,^[47]^[48] 3301 cycles/poly (32-pixel), 166 polygons/frame
Polygon memory: 40 bytes/poly, 6.485 KB memory (166 polygons/frame), 72 KB/s bandwidth (1800 polygons/sec)
32-pixel polygons, 15 FPS, scanline rendering, 250 cycles/scanline per poly,^[47]^[48] 3301 cycles/poly (32-pixel), 166 polygons/frame
Polygon memory: 40 bytes/poly, 6.485 KB memory (166 polygons/frame), 72 KB/s bandwidth (1800 polygons/sec)]

[47] Polygon memory: 40 bytes/poly, 6.485 KB memory (166 polygons/frame), 72 KB/s bandwidth (1800 polygons/sec)

[48] Polygon memory: 40 bytes/poly, 6.485 KB memory (166 polygons/frame), 72 KB/s bandwidth (1800 polygons/sec)]

[38_cycles.2Ftexel.2C.7F.27.22.60UNIQ--ref-0000009C-QINU.60.22.27.7F_2432_draw_cycles_per_8.C3.978_texel_texture.2C_77_cycles_DMA_transfer_.2832_bytes.29_per_8.C3.978_texel_texture.2C_5810_cycles_.282509_texture_cycles.29_per_8.C3.978_texel_polygon-60] [38 cycles/texel,^[49] 2432 draw cycles per 8×8 texel texture, 77 cycles DMA transfer (32 bytes) per 8×8 texel texture, 5810 cycles (2509 texture cycles) per 8×8 texel polygon 38 cycles/texel,^[49] 2432 draw cycles per 8×8 texel texture, 77 cycles DMA transfer (32 bytes) per 8×8 texel texture, 5810 cycles (2509 texture cycles) per 8×8 texel polygon]

[:File:Sega_Service_Manual_-_Genesis_II_-_Mega_Drive_II_.28PAL.29_-_001_-_June_1993.pdf_p-1] 1.0 ^1.1 ^1.2 ^1.3 ^1.4 ^1.5 ^1.6 File:Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf

[https:.2F.2Fgithub.com.2Fekeeke.2FGenesis-Plus-GX.2Fblob.2Fmaster.2Fcore.2Fsystem.h-2] ttps://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h

[.5Bhttps:.2F.2Fbooks.google.co.uk.2Fbooks.3Fid.3DO7dacPpJm0UC.26pg.3DPA136_.27.27Hardware_and_Computer_Organization.27.27.2C_page_136.5D-3] Hardware and Computer Organization, page 136

[http:.2F.2Fwww.digitpress.com.2Ffaq.2Fmegadrive.htm-4] ttp://www.digitpress.com/faq/megadrive.htm

[.5Bhttps:.2F.2Fwww.youtube.com.2Fwatch.3Fv.3DyGzgKCsrNHM.3Ft.3D6m7s_Ben_Heck.E2.80.99s_16-Bit_Console_Wars.21_.286:07.29.5D_.28.27.27.5B.5Bwikipedia:Benjamin_Heckendorn.7CThe_Ben_Heck_Show.5D.5D.27.27.29-5] 5.0 ^5.1 Ben Heck’s 16-Bit Console Wars! (6:07) (The Ben Heck Show)

[.5Bhttps:.2F.2Fbooks.google.co.uk.2Fbooks.3Fid.3DO2DTBwAAQBAJ.26pg.3DPA5_.27.27The_68000_Microprocessor.27.27.2C_page_5.5D-6] The 68000 Microprocessor, page 5

[.5Bhttp:.2F.2Fwww.drolez.com.2Fretro.2F_Obsolete_Microprocessors.5D-7] Obsolete Microprocessors

[.5Bhttps:.2F.2Fgithub.com.2FRetroAchievements.2FRASuite.2Fblob.2Fmaster.2Fbizhawk.2FBizHawk.Emulation.Common.2FSound.2FYM2612.cs_Yamaha_YM2612_Emulation_Core.5D-8] Yamaha YM2612 Emulation Core

[.5Bhttps:.2F.2Fgithub.com.2FStephane-D.2FSGDK.2Fblob.2Fmaster.2Fbin.2Frescomp.txt_ResComp_1.5_.28April_2016.29.5D-9] ResComp 1.5 (April 2016)

[.5Bhttp:.2F.2Fsonicresearch.org.2Fcommunity.2Findex.php.3Fthreads.2Fdual-pcm.4791.2F_Dual_PCM.5D-10] Dual PCM

[.5Bhttps:.2F.2Fgithub.com.2Fmamedev.2Fhistoric-mame.2Fblob.2Fmaster.2Fsrc.2Femu.2Fsound.2Fsn76496.c_SN76496_.28MAME.29.5D-11] SN76496 (MAME)

[Mega_Drive_PCB_revisions-12] 12.0 ^12.1 ^12.2 Mega Drive PCB revisions

[:File:GenesisTechnicalOverview.pdf_p2-13] 13.0 ^13.1 ^13.2 File:GenesisTechnicalOverview.pdf, page 2

[:File:GenesisTechnicalOverview.pdf_p15-14] 14.0 ^14.1 File:GenesisTechnicalOverview.pdf, page 15

[.5Bhttps:.2F.2Fgithub.com.2Fmamedev.2Fmess-cvs.2Fblob.2Fmaster.2Fsrc.2Fdrivers.2Fgenesis.c_Genesis_.28MESS.29.5D-15] Genesis (MESS)

[:File:GenesisTechnicalOverview.pdf_p3-16] 16.0 ^16.1 File:GenesisTechnicalOverview.pdf, page 3

[:File:CXA1145P_datasheet.pdf_p-17] File:CXA1145P datasheet.pdf

[:File:MB3514_datasheet.pdf_p-18] File:MB3514 datasheet.pdf

[.5Bhttp:.2F.2Fcgfm2.emuviews.com.2Ftxt.2Fvdppin.txt_315-5313_Information.5D-19] 315-5313 Information

[:File:GenesisTechnicalOverview.pdf_p14-20] 20.0 ^20.1 ^20.2 ^20.3 File:GenesisTechnicalOverview.pdf, page 14

[.5Bhttps:.2F.2Fgithub.com.2Fjasarien.2FProvenance.2Fblob.2Fmaster.2FPVGenesis.2FPVGenesis.2FGenesis.2FGenesisCore.2Fgenplusgx_source.2Fsystem.c_Genesis_Plus.5D-21] Genesis Plus

[:File:GenesisTechnicalOverview.pdf_p13-22] 22.0 ^22.1 ^22.2 File:GenesisTechnicalOverview.pdf, page 13

[:File:GenesisTechnicalOverview.pdf_p46-23] 23.0 ^23.1 File:GenesisTechnicalOverview.pdf, page 46

[.5Bhttp:.2F.2Fwww.polygon.com.2Ffeatures.2F2015.2F2.2F3.2F7952705.2Fsega-genesis-masami-ishikawa_How_Sega_Built_the_Genesis:_Masami_Ishikawa_Inteview.5D_.28.5B.5Bwikipedia:Polygon_.28website.29.7CPolygon.5D.5D.29-24] 24.0 ^24.1 ^24.2 ^24.3 ^24.4 ^24.5 How Sega Built the Genesis: Masami Ishikawa Inteview (Polygon)

[.5Bhttp:.2F.2Fwww.gamepilgrimage.com.2Fcontent.2Fsega-genesis-vs-super-nintendo_Sega_Genesis_Comparison.5D-25] 25.0 ^25.1 Sega Genesis Comparison

[.5Bhttps:.2F.2Fgamefaqs.gamespot.com.2Fgenesis.2F916377-genesis.2Ffaqs.2F9755_Sega_Programming_FAQ_.28October_18.2C_1995.29.5D-26] Sega Programming FAQ (October 18, 1995)

[.5Bhttp:.2F.2Fdreamjam.co.uk.2Femuviews.2Ftxt.2Fmsvdp.txt_Sega_Master_System_VDP_Documentation.5D-27] Sega Master System VDP Documentation

[.5Bhttp:.2F.2Fdreamjam.co.uk.2Femuviews.2Ftxt.2Fgenvdp.txt_Sega_Genesis_VDP_Documentation.5D-28] 28.0 ^28.1 ^28.2 ^28.3 ^28.4 ^28.5 Sega Genesis VDP Documentation

[:File:GenesisTechnicalOverview.pdf_p-29] 29.0 ^29.1 ^29.2 File:GenesisTechnicalOverview.pdf

[:File:GenesisTechnicalOverview.pdf_p79-30] File:GenesisTechnicalOverview.pdf, page 79

[.5Bhttp:.2F.2Fmd.squee.co.2FVDP.23Sprites_VDP:_Sprites.5D-31] 31.0 ^31.1 VDP: Sprites

[.5Bhttps:.2F.2Fgithub.com.2FStephane-D.2FSGDK.2Fblob.2Fmaster.2Finc.2Fvdp_spr.h_VDP_Sprite_.28SGDK.29.5D-32] 32.0 ^32.1 VDP Sprite (SGDK)

[.5Bhttp:.2F.2Ftrixter.oldskool.org.2F2008.2F12.2F05.2Fblast-processing-101.2F_Blast_Processing_101.5D-33] Blast Processing 101

[.5Bhttp:.2F.2Fproblemkaputt.de.2Ffullsnes.htm_SNES_hardware_specifications.5D-34] SNES hardware specifications

[.5Bhttp:.2F.2Fwww.gamepilgrimage.com.2Fcontent.2Fsega-genesis-vs-super-nintendo_Sega_Genesis_vs_Super_Nintendo.5D-35] 35.0 ^35.1 Sega Genesis vs Super Nintendo

[.5Bhttps:.2F.2Fgithub.com.2FStephane-D.2FSGDK.2Fblob.2Fmaster.2Finc.2Fmaths3D.h_3D_math_engine_.28SGDK.29.5D-36] 36.0 ^36.1 3D math engine (SGDK)

[.5Bhttp:.2F.2Fwww.sega-16.com.2F2008.2F05.2Finterview-lee-actor.2F_Interview:_Lee_Actor_.28Sterling_Software_Programmer.29.5D-37] Interview: Lee Actor (Sterling Software Programmer)

[.5Bhttps:.2F.2Fwww.youtube.com.2Fwatch.3Fv.3DYUZpF2JLF4s_Star_Fox_3D_Tech_Demo_on_Sega_Genesis.5D-38] Star Fox 3D Tech Demo on Sega Genesis

[.5Bhttps:.2F.2Fwww.youtube.com.2Fwatch.3Fv.3DoHLc0AzD85g_Star_Fox_3D_Tech_Demo_on_Sega_Genesis:_Version_2_Using_DMA.5D-39] Star Fox 3D Tech Demo on Sega Genesis: Version 2 Using DMA

[:File:GenesisTechnicalOverview.pdf_p45-40] 40.0 ^40.1 ^40.2 File:GenesisTechnicalOverview.pdf, page 45

[.5Bhttps:.2F.2Fgithub.com.2FStephane-D.2FSGDK.2Fblob.2Fmaster.2Finc.2Fbmp.h_Bitmap_engine_.28SGDK.29.5D-41] 41.0 ^41.1 Bitmap engine (SGDK)

[.5Bhttps:.2F.2Ftcrf.net.2FSonic_the_Hedgehog_2_.28Genesis.29_Sonic_the_Hedgehog_2_.28The_Cutting_Room_Floor.29.5D-49] Sonic the Hedgehog 2 (The Cutting Room Floor)

[.5Bhttp:.2F.2Fwww.nintendolife.com.2Fnews.2F2015.2F11.2Fthe_man_responsible_for_segas_blast_processing_gimmick_is_sorry_for_creating_that_ghastly_phrase_The_Man_Responsible_For_Sega.27s_Blast_Processing.5D_.28.5B.5Bwikipedia:Nintendo_Life.7CNintendo_Life.5D.5D.29-51] The Man Responsible For Sega's Blast Processing (Nintendo Life)

[.5Bhttps:.2F.2Fwww.youtube.com.2Fwatch.3Fv.3Do8qgArSqMsc_How_a_SEGA_GLITCH_created_stunning_images.5D-52] 44.0 ^44.1 How a SEGA GLITCH created stunning images

[.5Bhttps:.2F.2Fwww.youtube.com.2Fwatch.3Fv.3DGgQxJjP2XFc_D_Polygonal_Textur.C3.A9_-_MegaDrive.2FGenesis_.28YouTube.29.5D-53] D Polygonal Texturé - MegaDrive/Genesis (YouTube)

[.5Bhttps:.2F.2Fwww.youtube.com.2Fwatch.3Fv.3DoHLc0AzD85g_Star_Fox_3D_Tech_Demo_on_Sega_Genesis:_Version_2_Using_DMA_.28YouTube.29.5D-54] Star Fox 3D Tech Demo on Sega Genesis: Version 2 Using DMA (YouTube)

[.5Bhttp:.2F.2Fwww.sega-16.com.2Fforum.2Fshowthread.php.3F26488-Cycles-cycles-and-cycles.21.26p.3D627804.26viewfull.3D1.23post627804_Polygon_cycles.5D-56] Polygon cycles

[.5Bhttp:.2F.2Fgendev.spritesmind.net.2Fforum.2Fviewtopic.php.3Fp.3D23322.26sid.3D3dca9ad5e595f35217790cdeb4252b9a.23p23322_3D_on_the_Sega_Genesis_is_possible_.28SpritesMind.29.5D-57] 3D on the Sega Genesis is possible (SpritesMind)

[.5Bhttp:.2F.2Fwww.sega-16.com.2Fforum.2Fshowthread.php.3F26395-3D-on-the-Sega-Genesis-is-possible.26p.3D624237.26viewfull.3D1.23post624237_3D_on_the_Sega_Genesis_is_possible.5D-59] 3D on the Sega Genesis is possible

[.5Bhttps:.2F.2Fwww.youtube.com.2Fwatch.3Fv.3DIehwV2K60r8_SONIC_3D.27s_Intro_Sequence_Is_Impossible_To_Fit_On_A_Cartridge_-_Right.3F.5D-61] 50.0 ^50.1 SONIC 3D's Intro Sequence Is Impossible To Fit On A Cartridge - Right?

[.5Bhttps:.2F.2Fwww.youtube.com.2Fwatch.3Fv.3D7jHNu3eZvQQ_Was_Sega_CD_FMV_really_the_best_the_Sega_Mega_Drive_.2F_Genesis_Could_do.3F_Mike.27s_Mega_Drive_FMV_codec.5D-62] 51.0 ^51.1 Was Sega CD FMV really the best the Sega Mega Drive / Genesis Could do? Mike's Mega Drive FMV codec

[.5Bhttp:.2F.2Fwww.racketboy.com.2Fretro.2Fsega.2Fgenesis.2Fbest-sega-genesis-graphics-sound_Sega_Genesis_Games_That_Pushed_The_Limits_of_Graphics_.26_Sound_.28Racket_Boy.29.5D-63] Sega Genesis Games That Pushed The Limits of Graphics & Sound (Racket Boy)

[.5Bhttp:.2F.2Fgendev.spritesmind.net.2Fforum.2Fviewtopic.php.3Ff.3D8.26t.3D1959_Mode_7_demo_for_Genesis.2FMD_.28SpritesMind.29.5D-64] Mode 7 demo for Genesis/MD (SpritesMind)

[:File:Sega_Service_Manual_-_Genesis_II_-_Mega_Drive_II_.28PAL.29_-_001_-_June_1993.pdf_p8-65] 54.0 ^54.1 File:Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf, page 8

[:File:UPD41264_datasheet.pdf_p-66] 55.0 ^55.1 ^55.2 File:UPD41264 datasheet.pdf

[.5Bhttp:.2F.2Fwww.eurogamer.net.2Farticles.2F2012-11-09-2010s-sega-mega-drive-rpg-pier-solar-coming-to-xbox-360-pc-and-mac-in-hd_2010.27s_Sega_Mega_Drive_RPG_Pier_Solar_coming_to_Xbox_360.2C_PC_and_Mac_in_HD.5D.2C_.5B.5Bwikipedia:Eurogamer.7CEurogamer.5D.5D-67] 2010's Sega Mega Drive RPG Pier Solar coming to Xbox 360, PC and Mac in HD, Eurogamer

[SSFII_Genesis_Technical_Information_.282000-07-26.29-68] SSFII Genesis Technical Information (2000-07-26)

[MegaDrive.2FGenesis_Pinouts-69] MegaDrive/Genesis Pinouts

[:File:HM65256B_datasheet.pdf_p-70] File:HM65256B datasheet.pdf

[:File:TC51832_datasheet.pdf_p-71] File:TC51832 datasheet.pdf

[:File:HM53461_datasheet.pdf_p-72] File:HM53461 datasheet.pdf

[:File:KM424C64_datasheet.pdf_p-73] File:KM424C64 datasheet.pdf

[:File:MB81461_datasheet.pdf_p-74] File:MB81461 datasheet.pdf

[.5Bhttp:.2F.2Fpersonal.ee.surrey.ac.uk.2FPersonal.2FR.Webb.2Fl3a15.2Fextras.2Fvrmsgrm.pdf.23page.3D3_Understanding_VRAM_and_SGRAM_Operation_.28page_3.29.5D_.28.5B.5Bwikipedia:IBM.7CIBM.5D.5D.29-75] Understanding VRAM and SGRAM Operation (page 3) (IBM)

[:File:TMM2063P_datasheet.pdf_p-76] File:TMM2063P datasheet.pdf

[:File:UPD4168_datasheet.pdf_p-77] File:UPD4168 datasheet.pdf

[:File:KM6264B_datasheet.pdf_p-78] File:KM6264B datasheet.pdf

[:File:LC3664R_datasheet.pdf_p-79] File:LC3664R datasheet.pdf

[.5Bhttp:.2F.2Fwww.smspower.org.2FDevelopment.2FROMPartNumbers_ROM_Part_Numbers.5D-80] ROM Part Numbers

[:File:MB834200A_datasheet.pdf_p-81] File:MB834200A datasheet.pdf

[:File:MB838200B_datasheet.pdf_p-82] 71.0 ^71.1 File:MB838200B datasheet.pdf

[:File:M27C322_datasheet.pdf_p-83] File:M27C322 datasheet.pdf

[:File:Zilog_Z80_Programmer.27s_Reference_Manual.pdf_p33-84] 73.0 ^73.1 File:Zilog Z80 Programmer's Reference Manual.pdf, page 33

[.5Bhttp:.2F.2Fmd.squee.co.2FZilog_Z80_Zilog_Z80_.28Mega_Drive_Wiki.29.5D-85] Zilog Z80 (Mega Drive Wiki)

[3_cycles_per_byte.2C.7F.27.22.60UNIQ--ref-000000EC-QINU.60.22.27.7F_100_cycles_per_32_KB_bank_switch.7F.27.22.60UNIQ--ref-000000ED-QINU.60.22.27.7F-86] [3 cycles per byte,^[73] 100 cycles per 32 KB bank switch^[74] 3 cycles per byte,^[73] 100 cycles per 32 KB bank switch^[74]]

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@@ Line 31: / Line 31: @@
 ==Audio==
-:''See [[YM2612]] for further information''
+:''See [[YM2612]] and [[Sega Master System/Technical specifications]] for further information''
 {{multicol|
-* Integrated circuit: [[Yamaha]] IC6 (with [[VDP]]){{fileref|Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf}}
-:* [[wikipedia:Sound chip|Sound chips]]: 2 chips ([[Yamaha YM2612]], [[Sega]] [[SN76489|PSG]])
-:* Sound channels: 11 hardware channels (7 YM2612 channels, 4 PSG channels), 12-14 channels with software mixing (7-10 YM2612 channels, 4 PSG channels)
 * FM [[wikipedia:Sound chip|sound chip]]: [[Yamaha YM2612]], clocked at the 68000 clock speed (7.670454 MHz in NTSC, 7.600489 MHz in PAL)
-:* Sound output: Mono, Stereo{{fileref|GenesisTechnicalOverview.pdf}}
+:* Most Mega Drive 2 and Genesis 3 systems actually use the core from the chip's CMOS equivalent, the [[YM3438]] integrated into [[Sega]]-[[Yamaha]] ASIC (FC1004/FF1004/FJ3002/FQ8007){{fileref|Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf}}
 :* Output frequency: 53.267 kHz (NTSC), 52.781 kHz (PAL){{ref|[https://github.com/RetroAchievements/RASuite/blob/master/bizhawk/BizHawk.Emulation.Common/Sound/YM2612.cs Yamaha YM2612 Emulation Core]}}
-:* Sound channels: 7 hardware channels, 7-10 channels with software mixing
+:* Sound channels: 6
-::* Default hardware configuration: 7 channels (6 FM channels, 1 LFO channel)
+::* Default hardware configuration: 6 FM channels
-::* Alternative hardware configuration: 7 channels (5 FM channels, 1 PCM channel, 1 LFO channel)
+::* Alternative hardware configuration: 5 FM channels, 1 PCM channel
-::* Software mixing configuration: 7-11 channels (5 FM channels, 1-4 PCM channels, 1 LFO channel)
+:* 6 channels of FM synthesis, Operator Type‑N
-:* 6 channels of [[wikia:w:c:electronicmusic:Frequency modulation|FM synthesis]], Operator Type‑N
 ::* The third channel can enter a Special Mode, or multifrequency mode, where each individual operator has a different frequency
 ::* FM sample rate: 53.267 kHz (NTSC), 52.781 kHz (PAL)
+::* FM operators: 4 operators per channel, 24 operators total
 :* The sixth channel can enter a DAC mode where the sound program constantly streams 8‑bit unsigned [[PCM]] data to mix directly into the output waveform
-::* Hardware PCM [[wikipedia:Sampling (signal processing)|sampling]] channel: 1 channel
+::* [[PCM]] [[wikipedia:Sample rate|sample rate]]: Controlled by software, up to 26.3 kHz
-::* Software mixing: 1-4 PCM channels{{ref|[https://github.com/Stephane-D/SGDK/blob/master/bin/rescomp.txt ResComp 1.5 (April 2016)]}}
+::* Software mixing capabilities: Custom sound drivers can allow multiple PCM channels and audio compression{{ref|[https://github.com/Stephane-D/SGDK/blob/master/bin/rescomp.txt ResComp 1.5 (April 2016)]}}{{ref|[http://sonicresearch.org/community/index.php?threads/dual-pcm.4791/ Dual PCM]}}
-::* File formats: [[PCM]], [[PCM|DPCM]],{{ref|[http://sonicresearch.org/community/index.php?threads/dual-pcm.4791/ Dual PCM]}} [[PCM|ADPCM]], [[VGM]], XGM, [[Echo|TFM]], [[PCM|WAV]],{{ref|[https://github.com/Stephane-D/SGDK/blob/master/bin/rescomp.txt ResComp 1.5 (April 2016)]}} [[wikipedia:MOD (file format)|MOD]]{{ref|1=[http://forums.sonicretro.org/index.php?showtopic=13458 MOD player for the Sega Genesis]}}
-::* PCM sample [[wikipedia:Audio bit depth|depth]]: 8‑bit (PCM),{{ref|[http://www.alyjameslab.com/wa_files/FMDRIVE_USER_MANUAL.pdf FM-Drive User Manual]}} 4-bit (DPCM/ADPCM){{ref|[http://sonicresearch.org/community/index.php?threads/dual-pcm.4791/ Dual PCM]}}{{ref|[https://github.com/Stephane-D/SGDK/blob/master/bin/rescomp.txt ResComp 1.5 (April 2016)]}}
-::* PCM [[wikipedia:Sampling rate|sampling rate]]: 32 kHz (1 channel),{{ref|[https://github.com/Stephane-D/SGDK/blob/master/bin/rescomp.txt ResComp 1.5 (April 2016)]}} 22.5 kHz (2 channels),{{ref|[http://sonicresearch.org/community/index.php?threads/dual-pcm.4791/ Dual PCM]}} 16 kHz (4 channels){{ref|[https://github.com/Stephane-D/SGDK/blob/master/bin/rescomp.txt ResComp 1.5 (April 2016)]}}
-::* PCM bitrate: 1024 [[Byte|Kbps]] (16 kHz), 720 Kbps (22.5 kHz), 512 Kbps (32 kHz)
-:* 1 [[wikipedia:sine wave|sine wave]] [[wikipedia:Low-frequency oscillation|LFO]] (low frequency oscillator) channel
-:* Mapped to the Z80 address space — 68000 must request the Z80 bus to use
-:* Some Mega Drive 2 systems actually use the core from the chip's CMOS equivalent, the [[YM3438]]
-:* [[wikipedia:Interrupt request|IRQ]] interrupt capabilities: IRQ2 sound interrupt{{ref|[https://github.com/mamedev/mess-cvs/blob/master/src/drivers/genesis.c Genesis (MESS)]}}
 * [[wikipedia:Programmable sound generator|PSG]] sound chip: Sega PSG ([[SN76489|SN76496]]),{{ref|[https://github.com/mamedev/historic-mame/blob/master/src/emu/sound/sn76496.c SN76496 (MAME)]}} clocked at the Z80 clock speed (3.579545 MHz in NTSC, 3.546894 MHz in PAL) and built into the VDP — same as with the [[Master System]]
-:* Based on: TI [[SN76489]]
 :* 4 audio channels: Three channels of pure [[wikipedia:Square wave|square wave]] tones, and one noise channel
 ::* The noise channel can play either [[wikipedia:White noise|white noise]] or "periodic noise" either at one of three preset frequencies or using the frequency of the third tone channel (consequently, that channel will be mute)
-:* Can be freely accessed by both the 68000 through the VDP and the Z80 through its memory map
+:* Clone of the [[SN76489]] with different noise [[wikipedia:Linear-feedback shift register|LFSR]] and frequency counter implementations
 * The cartridge connector has two pins which allow stereo sound mixing directly from cart. No game used this, however, but the 32X uses it for its [[wikipedia:Pulse-width modulation|PWM]] audio
 * The Mega Drive 1 has mono audio output from the TV output and stereo output from a built‑in headphone jack, plus a built‑in volume control. Future models drop the headphone jack and do stereo output from the TV output
@@ Line 70: / Line 58: @@
 {{multicol|
 * [[wikia:w:c:gaming:Graphics processing unit|GPU]]: [[Sega]] 315‑5313 [[VDP]] ([[Yamaha]] YM7101){{fileref|Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf}}{{intref|Mega Drive PCB revisions}}
-:* Integrated circuit: Yamaha IC6 (with sound chips){{fileref|Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf}}
+:* Integrated circuit: Sega-Yamaha IC6 (with sound chips){{fileref|Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf}}
 :* An evolution of the [[Sega Master System]] VDP (which is, in turn, an evolution of the [[TMS9918]])
 :* All TMS9918 modes were removed and replaced with several new modes
@@ Line 80: / Line 68: @@
 :* IRQ [[wikipedia:Raster interrupt|interrupt]] capabilities: IRQ6 [[wikipedia:Vertical blanking interval|VBlank]] interrupt, IRQ4 H‑Int (Horizontal Interrupt) scanline interrupt{{ref|[https://github.com/mamedev/mess-cvs/blob/master/src/drivers/genesis.c Genesis (MESS)]}}
 :* [[wikipedia:DMA controller|DMA unit]]: Capable of [[wikipedia:Direct memory access|DMA]], high-speed fills and memory transfers, can transfer data from 68000 address space to VRAM/CRAM/VSRAM during active display and VBlank{{fileref|GenesisTechnicalOverview.pdf|page=3}}
+:* Pixel format: [[wikipedia:Packed pixel|Packed pixel]]
 * RGB/Composite Video Encoder [[wikipedia:Digital-to-analog converter|DAC]]: [[Sony]] CXA1145 (NTSC/PAL){{fileref|Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf}}{{fileref|CXA1145P datasheet.pdf}} / [[Fujitsu]] MB3514 (PAL){{intref|Mega Drive PCB revisions}}{{fileref|MB3514 datasheet.pdf}}
 :* [[wikipedia:Colorburst|Colorburst]] clock frequency: 3.579545 MHz (NTSC), 4.433618 MHz (PAL){{ref|[http://cgfm2.emuviews.com/txt/vdppin.txt 315-5313 Information]}}
@@ Line 100: / Line 89: @@
 ::* 40–64 scrolling layers: Each of the 2 tilemap planes can be split into multiple scrolling layers, 32 one-tile rows and 20 two-tile columns. Each scanline, row and column can be scrolled at different rates, and each row can be overlapped.{{fileref|GenesisTechnicalOverview.pdf|page=46}}{{ref|[http://www.gamepilgrimage.com/content/sega-genesis-vs-super-nintendo Sega Genesis Comparison]}}
 :* Background window plane, behind scrolling planes{{ref|[http://www.polygon.com/features/2015/2/3/7952705/sega-genesis-masami-ishikawa How Sega Built the Genesis: Masami Ishikawa Inteview] ([[wikipedia:Polygon (website)|Polygon]])}}
-:* [[Sprite]] plane: 80 sprites on screen, 20 sprites per scanline, 16 sprite sizes (8×8 to 32×32 pixels),{{fileref|GenesisTechnicalOverview.pdf}} 16 colors per sprite,{{ref|[https://gamefaqs.gamespot.com/genesis/916377-genesis/faqs/9755 Sega Programming FAQ (October 18, 1995)]}} integer sprite zooming{{ref|[http://dreamjam.co.uk/emuviews/txt/msvdp.txt Sega Master System VDP Documentation]}} (up to 320x224),{{ref|[http://www.polygon.com/features/2015/2/3/7952705/sega-genesis-masami-ishikawa How Sega Built the Genesis: Masami Ishikawa Inteview] ([[wikipedia:Polygon (website)|Polygon]])}} definable sprite priorities, 32 bytes per sprite tile,{{fileref|GenesisTechnicalOverview.pdf|page=2}} sprite flipping, virtual 512×512 sprite space,{{ref|[http://dreamjam.co.uk/emuviews/txt/genvdp.txt Sega Genesis VDP Documentation]}} sprites can be combined into larger sprites, up to 1280 sprite tiles (80x 32×32 sprites)
+:* [[Sprite]] plane: 80 sprites on screen, 20 sprites per scanline, 16 colors per sprite,{{ref|[https://gamefaqs.gamespot.com/genesis/916377-genesis/faqs/9755 Sega Programming FAQ (October 18, 1995)]}} integer sprite zooming{{ref|[http://dreamjam.co.uk/emuviews/txt/msvdp.txt Sega Master System VDP Documentation]}} (up to 320x224),{{ref|[http://www.polygon.com/features/2015/2/3/7952705/sega-genesis-masami-ishikawa How Sega Built the Genesis: Masami Ishikawa Inteview] ([[wikipedia:Polygon (website)|Polygon]])}} definable sprite priorities, 32 bytes per sprite tile,{{fileref|GenesisTechnicalOverview.pdf|page=2}} sprite flipping, virtual 512×512 sprite space,{{ref|[http://dreamjam.co.uk/emuviews/txt/genvdp.txt Sega Genesis VDP Documentation]}} sprites can be combined into larger sprites, up to 1280 sprite tiles (80x 32×32 sprites)
+::* 16 sprite sizes: 8×8, 8×16, 8×24, 8×32, 16×8, 16×16, 16×24, 16×32, 24×8, 24×16, 24×24, 24×32, 32×8, 32×16, 32×24, 32×32{{fileref|GenesisTechnicalOverview.pdf}}
 :* Note: Priorities can be defined between planes.{{fileref|GenesisTechnicalOverview.pdf|page=2}}
 * Color [[palette]]:{{ref|[http://dreamjam.co.uk/emuviews/txt/genvdp.txt Sega Genesis VDP Documentation]}}
@@ Line 124: / Line 114: @@
 :* [[wikipedia:Sequential access memory|SAM]] buffer: 256 bytes separate cache within VRAM chips, for sending continuous stream of video screen refresh data to VDP while it reads/writes VRAM
 * VDP internal cache: 232 bytes
-:* 64 9‑bit words (72 bytes) of internal CRAM ([[Palette|Color RAM]]) — used to store the color palette
+:* 64 9‑bit words (72 bytes) of internal [[Sega Mega Drive/Palettes and CRAM|CRAM]] (Color RAM) — used to store the color palette
 ::* 64 colors split into four 16‑color lines; each tile can be drawn with one of these four color lines
 ::* The first color in each line is transparent and any color of the entire palette can be used as a "background color" (when no pixels are drawn at a location); consequently the Mega Drive can display 61 colors on screen at once (unless raster effects or the Shadow/Highlight modes are used, in which case this number increases depending on the extent used)
@@ Line 134: / Line 124: @@
 }}
-===Blast processing===
+===DMA===
-:''See [[Blast processing]] for more details and technical comparison with SNES''
+:''See [[Sega Mega Drive/Hardware comparison (Super NES)]] for technical comparison with SNES''
-The term [[Blast Processing]] was primarily a reference to the Mega Drive [[VDP]] graphics processor's powerful [[wikipedia:DMA controller|DMA unit]] that could handle [[wikipedia:Direct memory access|DMA]] (direct memory access) operations at significantly faster speeds than the Super NES.{{ref|[http://trixter.oldskool.org/2008/12/05/blast-processing-101/ Blast Processing 101]}} The Mega Drive's DMA unit is part of the VDP, which is located on the same Yamaha IC6 integrated circuit as the sound chips.{{fileref|Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf}} In comparison, the Super Nintendo's DMA unit is part of its [[Ricoh]] 5A22 CPU.{{ref|[http://problemkaputt.de/fullsnes.htm SNES hardware specifications]}} The combination of the VDP's high-speed DMA unit with the 68000 CPU as well as faster memory is essentially what gives the Mega Drive a significant performance advantage over the SNES.
+The term "[[Blast Processing]]" was primarily a reference to the Mega Drive [[VDP]] graphics processor's powerful [[wikipedia:DMA controller|DMA unit]] that could handle [[wikipedia:Direct memory access|DMA]] (direct memory access) operations at significantly faster speeds than the Super NES.{{ref|[http://trixter.oldskool.org/2008/12/05/blast-processing-101/ Blast Processing 101]}} The Mega Drive's DMA unit is part of the VDP, which is located on the same Sega-Yamaha IC6 integrated circuit as the sound chips.{{fileref|Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf}} In comparison, the Super Nintendo's DMA unit is part of its [[Ricoh]] 5A22 CPU.{{ref|[http://problemkaputt.de/fullsnes.htm SNES hardware specifications]}} The combination of the VDP's high-speed DMA unit with the 68000 CPU as well as faster memory is essentially what gives the Mega Drive a significant performance advantage over the SNES.
 The Mega Drive could write to [[VRAM]] during active display, [[wikipedia:Vertical blanking interval|VBlank]], and [[wikipedia:Horizontal blanking interval|HBlank]],{{fileref|GenesisTechnicalOverview.pdf}} whereas the SNES could only do so during VBlank and HBlank. The Mega Drive had higher memory [[Byte|bandwidth]] and was capable of quicker DMA transfer rates, giving it a faster performance than the SNES,{{ref|[http://www.gamepilgrimage.com/content/sega-genesis-vs-super-nintendo Sega Genesis vs Super Nintendo]}} and helped give the Mega Drive a higher [[fillrate]], higher gameplay resolution, faster parallax scrolling, fast data [[wikipedia:Blitter|blitting]], and high frame-rate with many moving objects on screen, and allowed it to display more unique tiles (background and sprite tiles) and large [[sprite]]s (32×32 and higher) on screen, and quickly transfer more unique tiles and large sprites (16×16 and higher) on screen.
-The Mega Drive's DMA capabilities also helped give it more flexibility, allowing the hardware to be programmed in various different ways. Combining the CPU's fast arithmetic with the VDP's fast DMA, it could replicate some of the SNES's hardware features with software programming, such as larger 64×64 sprites (combining 32×32 sprites), background scaling and rotation (like the [[Sega X Board]] and [[wikipedia:Mode 7|Mode 7]]), and direct color (increasing colors on screen). Other programmable capabilities include mid-frame palette swaps (increasing colors per scanline), [[wikipedia:Bitmap|bitmap]] [[wikipedia:Framebuffer|framebuffers]], sprite scaling and rotation, [[wikipedia:Ray casting|ray casting]], and 3D polygon graphics; the base Mega Drive hardware (without needing any [[cartridge]] enhancement chips) could render 3D polygons with a performance comparable to the SNES's optional [[wikipedia:Super FX|Super FX]] (SFX) cartridge enhancement chip,{{ref|[https://github.com/Stephane-D/SGDK/blob/master/inc/maths3D.h 3D math engine (SGDK)]}}{{ref|[http://www.sega-16.com/2008/05/interview-lee-actor/ Interview: Lee Actor (Sterling Software Programmer)]}}{{ref|1=[https://www.youtube.com/watch?v=YUZpF2JLF4s Star Fox 3D Tech Demo on Sega Genesis]}}{{ref|1=[https://www.youtube.com/watch?v=oHLc0AzD85g Star Fox 3D Tech Demo on Sega Genesis: Version 2 Using DMA]}} which itself was significantly outperformed by the Mega Drive's optional [[Sega Virtua Processor]] (SVP) cartridge enhancement chip.
+The Mega Drive's DMA capabilities also helped give it more flexibility, allowing the hardware to be programmed in various different ways. Combining the CPU's fast arithmetic with the VDP's fast DMA, it could replicate some of the SNES's hardware features with software programming, such as larger 64×64 sprites (combining 32×32 sprites), background scaling and rotation (like the [[Sega X Board]] and [[wikipedia:Mode 7|Mode 7]]), and direct color (increasing colors on screen). Other programmable capabilities include mid-frame palette swaps (increasing colors per scanline), [[wikipedia:Bitmap|bitmap]] [[wikipedia:Framebuffer|framebuffers]], sprite scaling and rotation, and [https://www.giantbomb.com/ray-casting/3015-1517/ ray casting]. The optional [[Sega Virtua Processor]] (SVP) cartridge enhancement chip provided for faster polygon rendering, though it was only used by [[Virtua Racing#Mega_Drive_version|a single game]] due to its high cost.
+Later on, various homebrew software for the Mega Drive implemented software 3D polygon graphics rendering with a performance almost approaching the SNES's optional [[wikipedia:Super FX|Super FX]] (SFX) cartridge enhancement chip,{{ref|[https://github.com/Stephane-D/SGDK/blob/master/inc/maths3D.h 3D math engine (SGDK)]}}{{ref|[http://www.sega-16.com/2008/05/interview-lee-actor/ Interview: Lee Actor (Sterling Software Programmer)]}}{{ref|1=[https://www.youtube.com/watch?v=YUZpF2JLF4s Star Fox 3D Tech Demo on Sega Genesis]}}{{ref|1=[https://www.youtube.com/watch?v=oHLc0AzD85g Star Fox 3D Tech Demo on Sega Genesis: Version 2 Using DMA]}}.
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