Difference between revisions of "Sega Mega Drive/Technical specifications"

From Sega Retro

(→‎DMA: FMV has no citations. Homebrew 3D engines were done years later. SVP was done *before* the homebrew engines; the way this was worded implied it was after.)
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::* FM operators: 4 operators per channel, 24 operators total
 
::* FM operators: 4 operators per channel, 24 operators total
 
:* The sixth channel can enter a DAC mode where the sound program constantly streams 8‑bit unsigned [[PCM]] data to mix directly into the output waveform
 
:* The sixth channel can enter a DAC mode where the sound program constantly streams 8‑bit unsigned [[PCM]] data to mix directly into the output waveform
−
::* [[PCM]] [[wikipedia:Sample rate|sample rate]]: Controlled by software. Up to 32 kHz.{{ref|[https://github.com/Stephane-D/SGDK/blob/master/bin/rescomp.txt ResComp 1.5 (April 2016)]}}
+
::* [[PCM]] [[wikipedia:Sample rate|sample rate]]: Controlled by software. Up to 26.3 kHz.{{ref|[https://github.com/Stephane-D/SGDK/blob/master/bin/rescomp.txt ResComp 1.5 (April 2016)]}}
−
::* Software mixing capabilities: Custom sound drivers can allow up to 4 PCM channels and audio compression{{ref|[https://github.com/Stephane-D/SGDK/blob/master/bin/rescomp.txt ResComp 1.5 (April 2016)]}}{{ref|[http://sonicresearch.org/community/index.php?threads/dual-pcm.4791/ Dual PCM]}}
+
::* Software mixing capabilities: Custom sound drivers can allow multiple PCM channels and audio compression{{ref|[https://github.com/Stephane-D/SGDK/blob/master/bin/rescomp.txt ResComp 1.5 (April 2016)]}}{{ref|[http://sonicresearch.org/community/index.php?threads/dual-pcm.4791/ Dual PCM]}}
 
* [[wikipedia:Programmable sound generator|PSG]] sound chip: Sega PSG ([[SN76489|SN76496]]),{{ref|[https://github.com/mamedev/historic-mame/blob/master/src/emu/sound/sn76496.c SN76496 (MAME)]}} clocked at the Z80 clock speed (3.579545 MHz in NTSC, 3.546894 MHz in PAL) and built into the VDP — same as with the [[Master System]]
 
* [[wikipedia:Programmable sound generator|PSG]] sound chip: Sega PSG ([[SN76489|SN76496]]),{{ref|[https://github.com/mamedev/historic-mame/blob/master/src/emu/sound/sn76496.c SN76496 (MAME)]}} clocked at the Z80 clock speed (3.579545 MHz in NTSC, 3.546894 MHz in PAL) and built into the VDP — same as with the [[Master System]]
 
:* 4 audio channels: Three channels of pure [[wikipedia:Square wave|square wave]] tones, and one noise channel
 
:* 4 audio channels: Three channels of pure [[wikipedia:Square wave|square wave]] tones, and one noise channel

Revision as of 10:48, 5 August 2023

Back to: Sega Mega Drive.

Technical specifications for the Sega Mega Drive.

  • System master clock rate: 53.693175 MHz (NTSC), 53.203424 MHz (PAL)[1]
  • Master clock cycles per frame: 896,040 (NTSC), 1,067,040 (PAL)
  • Master clock cycles per scanline: 3420[2]

CPU

  • Clock rate: 7.670454 MHz (NTSC), 7.600489 MHz (PAL)
  • The 68000 has a 24‑bit address space, allowing access to up to 16 MB of memory. Sega's memory map for the Mega Drive allowed games to be up to 4 MB without the use of a memory mapper; games that tried to go up to 10 MB would find their memory maps crushed by the Sega CD (which took the second 4 MB block) and Sega 32X (which took 2 MB of the third 4 MB block). All devices are memory mapped.
  • Games using save memory also needed to have the memory in the cartridge map; larger games, such as Phantasy Star IV, used a mapper to swap out cart space for SRAM during a save.
  • Clock rate: 3.579545 MHz (NTSC), 3.546894 MHz (PAL)
  • Some games did not use the Z80, other games used it only for sample playback, but most used it for sound processing
  • 8 KB program RAM which the 68000 and the Z80 can freely write to (though the 68000 must request the Z80 bus)
  • Can access 32 KB of the 68000 memory map at once (while it should be used for accessing the cartridge, setting the bank register elsewhere can work on some hardware)
  • Instruction set: 8‑bit and 16‑bit instructions
  • Data bus width: 8‑bit
  • CPU instruction performance: 1.861363 MIPS (NTSC), 1.844386 MIPS (PAL)[7]
  • 68000 performance: 1.342329 MIPS (NTSC), 1.330086 MIPS (PAL)
  • Z80 performance: 0.519034 MIPS (NTSC), 0.5143 MIPS (PAL)

Audio

See YM2612 and Sega Master System/Technical specifications for further information
  • Most Mega Drive 2 and Genesis 3 systems actually use the core from the chip's CMOS equivalent, the YM3438 integrated into Sega-Yamaha ASIC (FC1004/FF1004/FJ3002/FQ8007)[1]
  • Output frequency: 53.267 kHz (NTSC), 52.781 kHz (PAL)[8]
  • Sound channels: 6
  • Default hardware configuration: 6 FM channels
  • Alternative hardware configuration: 5 FM channels, 1 PCM channel
  • 6 channels of FM synthesis, Operator Type‑N
  • The third channel can enter a Special Mode, or multifrequency mode, where each individual operator has a different frequency
  • FM sample rate: 53.267 kHz (NTSC), 52.781 kHz (PAL)
  • FM operators: 4 operators per channel, 24 operators total
  • The sixth channel can enter a DAC mode where the sound program constantly streams 8‑bit unsigned PCM data to mix directly into the output waveform
  • PCM sample rate: Controlled by software. Up to 26.3 kHz.[9]
  • Software mixing capabilities: Custom sound drivers can allow multiple PCM channels and audio compression[9][10]
  • PSG sound chip: Sega PSG (SN76496),[11] clocked at the Z80 clock speed (3.579545 MHz in NTSC, 3.546894 MHz in PAL) and built into the VDP — same as with the Master System
  • 4 audio channels: Three channels of pure square wave tones, and one noise channel
  • The noise channel can play either white noise or "periodic noise" either at one of three preset frequencies or using the frequency of the third tone channel (consequently, that channel will be mute)
  • Clone of the SN76489 with different noise LFSR and frequency counter implementations
  • Can be freely accessed by both the 68000 through the VDP and the Z80 through its memory map
  • The cartridge connector has two pins which allow stereo sound mixing directly from cart. No game used this, however, but the 32X uses it for its PWM audio
  • The Mega Drive 1 has mono audio output from the TV output and stereo output from a built‑in headphone jack, plus a built‑in volume control. Future models drop the headphone jack and do stereo output from the TV output

Graphics

  • Integrated circuit: Sega-Yamaha IC6 (with sound chips)[1]
  • An evolution of the Sega Master System VDP (which is, in turn, an evolution of the TMS9918)
  • All TMS9918 modes were removed and replaced with several new modes
  • Controls background playfields and foreground sprites[13]
  • Clock rate: 13.423294 MHz (NTSC), 13.300856 MHz (PAL)
  • Pixel clock rate: 6.711647 MHz (NTSC), 6.650428 MHz (PAL)
  • Internal data bus: 16-bit[14]
  • External data buses: 16-bit CPU bus,[14] 8/16-bit VRAM bus (Dual Port VRAM, 16-bit RAM/SAM, 8-bit RAM)
  • IRQ interrupt capabilities: IRQ6 VBlank interrupt, IRQ4 H‑Int (Horizontal Interrupt) scanline interrupt[15]
  • DMA unit: Capable of DMA, high-speed fills and memory transfers, can transfer data from 68000 address space to VRAM/CRAM/VSRAM during active display and VBlank[16]
  • Pixel format: Packed pixel
  • Colorburst clock frequency: 3.579545 MHz (NTSC), 4.433618 MHz (PAL)[19]
  • NTSC: 320×224 ("40 column mode"), 256×224 ("32 column mode")
  • PAL: 320×224, 256×224, 320×240, 256×240
  • NTSC: 320×448, 256×448
  • PAL: 320×448, 256×448, 320×480, 256×480
  • Note: "Interlaced mode" doubles the height of all resolutions; it was used by some games, such as Sonic 2 for two‑player mode.
  • Progressive scan: 427×262 (NTSC), 423×312 (PAL)[20]
  • Interlaced: 427×524 (NTSC), 423×624 (PAL)
  • Tilemap resolutions: 256×256 to 512×512 and 1024×256
  • Refresh rate: 59.92274 Hz (NTSC), 49.701459 Hz (PAL)[21]
  • Maximum frame rate: 59.92274 frames/sec (NTSC), 49.701459 frames/sec (PAL)
  • Four graphics planes: 2 scrolling tile planes (grids of tiles), "window" tile plane (cannot be transparent), sprite plane
  • Tilemap background planes: 2 scrolling planes, with horizontal and vertical tile flipping, individual tile priority, 6 tilemap sizes (256x256, 256x512, 256x1024, 512x256, 512x512, 1024x256),[22] 32 bytes per tile,[22] 16 colors per tile
  • Scrolling capabilities: Parallax scrolling, line and row scrolling, vertical and horizontal line scrolling, column scrolling.[23][24]
  • 40–64 scrolling layers: Each of the 2 tilemap planes can be split into multiple scrolling layers, 32 one-tile rows and 20 two-tile columns. Each scanline, row and column can be scrolled at different rates, and each row can be overlapped.[23][25]
  • Background window plane, behind scrolling planes[24]
  • Sprite plane: 80 sprites on screen, 20 sprites per scanline, 16 colors per sprite,[26] integer sprite zooming[27] (up to 320x224),[24] definable sprite priorities, 32 bytes per sprite tile,[13] sprite flipping, virtual 512×512 sprite space,[28] sprites can be combined into larger sprites, up to 1280 sprite tiles (80x 32×32 sprites)
  • 16 sprite sizes: 8×8, 8×16, 8×24, 8×32, 16×8, 16×16, 16×24, 16×32, 24×8, 24×16, 24×24, 24×32, 32×8, 32×16, 32×24, 32×32[29]
  • Note: Priorities can be defined between planes.[13]
  • Standard: 512 colors (9-bit RGB)
  • Shadow/Highlight mode: 1536 colors
  • Standard: 61–64 colors
  • Shadow/Highlight: 114–192 colors
  • Mid‑frame palette swap: 75–256 colors (see Blast Processing below)
  • Direct color: 256–512 colors (see Blast Processing below)
  • Colors per pixel: 16 colors (4‑bit)[16]
  • Mid‑frame palette swap: 16 colors (4-bit) to 256 colors (8-bit)
  • Direct color: 256 colors (8-bit) to 512 colors (9-bit)
  • Shadow/Highlight: Hardware lighting,[28] shadow generation (matching each character's shape),[24] triples color palette and colors on screen, increases colors per tile
  • Video RAM: 64 KB VRAM (Dual-Port VRAM) — used to store graphics tiles, mappings for all layers, and horizontal scrolling[30]
  • Scroll A Pattern Table: 2 KB (256x256) to 8 KB (512x512, 1024x256) for background tilemap plane A
  • Scroll B Pattern Table: 2 KB (256x256) to 8 KB (512x512, 1024x256) for background tilemap plane B
  • Window Pattern Name Table: 2 KB (256x224, 256x240) to 4 KB (320x224, 320x240) for static window plane
  • H Scroll Data Table: 1 KB for horizontal scrolling
  • Sprite Attribute Table: 512 bytes (256x224, 256x240) to 1 KB (320x224, 320x240) for sprite attributes
  • Pattern Generator Table: 2 KB to 56.5 KB for background tiles (64 to 1808 tiles, 32 KB per tile)
  • Sprite Generator Table: Up to 40 KB for sprite tiles (up to 1280 tiles, 32 KB per tile)
  • SAM buffer: 256 bytes separate cache within VRAM chips, for sending continuous stream of video screen refresh data to VDP while it reads/writes VRAM
  • VDP internal cache: 232 bytes
  • 64 9‑bit words (72 bytes) of internal CRAM (Color RAM) — used to store the color palette
  • 64 colors split into four 16‑color lines; each tile can be drawn with one of these four color lines
  • The first color in each line is transparent and any color of the entire palette can be used as a "background color" (when no pixels are drawn at a location); consequently the Mega Drive can display 61 colors on screen at once (unless raster effects or the Shadow/Highlight modes are used, in which case this number increases depending on the extent used)
  • Colors are 9‑bit RGB with 3 bits per color component, allowing for 512 colors
  • Shadow/Highlight modes increase color gamut (183—192 colors on screen, out of 1536 color palette)
  • 80 bytes internal VSRAM (Vertical Scrolling RAM) — used for vertical scrolling (10‑bit words, up to 20 different vertical scroll values for each of the two scrolling playfields)[29]
  • 80 bytes internal sprite buffer — 8 bytes per sprite[31][32]
  • Other features: Semi‑transparency, FIFO memory circuit design, read/write of one line buffer method for drawing[24]

DMA

See Sega Mega Drive/Hardware comparison (Super NES) for technical comparison with SNES

The term "Blast Processing" was primarily a reference to the Mega Drive VDP graphics processor's powerful DMA unit that could handle DMA (direct memory access) operations at significantly faster speeds than the Super NES.[33] The Mega Drive's DMA unit is part of the VDP, which is located on the same Sega-Yamaha IC6 integrated circuit as the sound chips.[1] In comparison, the Super Nintendo's DMA unit is part of its Ricoh 5A22 CPU.[34] The combination of the VDP's high-speed DMA unit with the 68000 CPU as well as faster memory is essentially what gives the Mega Drive a significant performance advantage over the SNES.

The Mega Drive could write to VRAM during active display, VBlank, and HBlank,[29] whereas the SNES could only do so during VBlank and HBlank. The Mega Drive had higher memory bandwidth and was capable of quicker DMA transfer rates, giving it a faster performance than the SNES,[35] and helped give the Mega Drive a higher fillrate, higher gameplay resolution, faster parallax scrolling, fast data blitting, and high frame-rate with many moving objects on screen, and allowed it to display more unique tiles (background and sprite tiles) and large sprites (32×32 and higher) on screen, and quickly transfer more unique tiles and large sprites (16×16 and higher) on screen.

The Mega Drive's DMA capabilities also helped give it more flexibility, allowing the hardware to be programmed in various different ways. Combining the CPU's fast arithmetic with the VDP's fast DMA, it could replicate some of the SNES's hardware features with software programming, such as larger 64×64 sprites (combining 32×32 sprites), background scaling and rotation (like the Sega X Board and Mode 7), and direct color (increasing colors on screen). Other programmable capabilities include mid-frame palette swaps (increasing colors per scanline), bitmap framebuffers, sprite scaling and rotation, and ray casting. The optional Sega Virtua Processor (SVP) cartridge enhancement chip provided for faster polygon rendering, though it was only used by a single game due to its high cost.

Later on, various homebrew software for the Mega Drive implemented software 3D polygon graphics rendering with a performance almost approaching the SNES's optional Super FX (SFX) cartridge enhancement chip,[36][37][38][39].

  • VRAM transfer per scanline: 205 bytes per VBlank scanline, 18 bytes per active scanline
  • CRAM/VSRAM transfer per scanline: 410 bytes per VBlank scanline, 36 bytes per active scanline
  • VBlank scanlines in standard 224-line display: 38 (NTSC), 88 (PAL)
  • VBlank scanlines in custom 192-line display: 70 (NTSC), 120 (PAL)
  • VBlank scanlines in custom 160-line display: 103 (NTSC), 153 (PAL)[41]
  • Refresh rate: 59.92274 Hz (NTSC), 49.701459 Hz (PAL)
  • Maximum DMA transfer rate: 3.21845 MB/s (inactive display)
  • Maximum DMA transfer per frame: 53.71 KB (NTSC), 63.96 KB (PAL)
  • DMA transfer per frame during active display: 11.822–23.995 KB (NTSC), 22.072–34.245 KB (PAL)[n 1]
  • DMA transfer rate during active display: 708.406 KB/s to 1.437846 MB/s (NTSC), 1.09701 MB/s to 1.702026 MB/s (PAL)[n 2]
  • CRAM/VSRAM cache bandwidth: 26.846588 MB/s (NTSC), 26.601712 MB/s (PAL) (see Memory below)[40][20]
  • Maximum DMA transfer rate: 6.4369 MB/s (inactive display)
  • Maximum DMA transfer per frame: 107.42 KB (NTSC), 127.92 KB (PAL)
  • DMA transfer per frame during active display: 23.644–47.99 KB (NTSC), 44.144–68.490 KB (PAL)[n 3]
  • DMA transfer rate during active display: 1.416813–2.875692 MB/s (NTSC), 2.194021–3.404052 MB/s (PAL)[n 4]
  • Maximum write fillrate: 6.4369 MPixels/s, 410 pixels/scanline
  • Maximum write per frame: 107,420 pixels (NTSC), 127,920 pixels (PAL)
  • Write per frame during active display: 23,644–47,990 pixels (NTSC), 44,144–68,490 pixels (PAL)[n 5]
  • Write fillrate during active display: 1.416813–2.875692 MPixels/s (NTSC), 2.194021–3.404052 MPixels/s (PAL)[n 6]
  • Tile fillrate: 1808 tiles per frame,[22] 108,340 tiles/sec (NTSC), 89,860 tiles/sec (PAL)
  • Texel fillrate: 115,712 texels (1808x 8×8 tiles) per frame, 6.934358 MTexels/s (NTSC), 5.751055 MTexels/s (PAL)
  • Tile transfer per frame during active display: 369–749 tiles (NTSC), 689–1070 tiles (PAL)[n 7]
  • Sprite fillrate: 80 sprites/frame, 4793 sprites/sec (NTSC), 3976 sprites/sec (PAL)
  • Sprite texel fillrate: 320 texels/scanline, 81,920 texels (80× 32×32 sprites) per frame,[28] 4.90887 MTexels/s (NTSC), 4.071543 MTexels/s (PAL)
  • Sprite tile fillrate: 1280 sprite tiles (80x 32×32 sprites) per frame, 76,701 sprite tiles/sec (NTSC), 63,617 sprite tiles/sec (PAL)
  • Sprite display per frame: 80 sprites (8×8 to 32×32), 20 sprites (64×64), 4 sprites (128×128)
  • Sprite display per scanline: 20 sprites (8×8 to 16×16), 13 sprites (24×24), 10 sprites (32×32), 5 sprites (64×64)
  • Sprite transfer per frame during standard 224-line active display:
  • NTSC: 80 sprites (8×8 to 16×16), 41 sprites (24×24), 23 sprites (32×32), 5 sprites (64×64)
  • PAL: 80 sprites (8×8 to 16×16), 76 sprites (24×24), 43 sprites (32×32), 10 sprites (64×64)
  • Sprite transfer per frame during custom 160-line active display:
  • NTSC: 80 sprites (8×8 to 24×24), 46 sprites (32×32), 11 sprites (64×64)
  • PAL: 80 sprites (8×8 to 24×24), 66 sprites (32×32), 16 sprites (64×64)
  • Effective fillrate: 2 tilemaps (256×256 to 512×512), 80 sprites (8×8 to 32×32)
  • Effective tile fillrate: 1808–9472 tiles/frame, 108,340–567,588 tiles/sec
  • Effective pixel fillrate: 115,712–606,208 pixels/frame, 6.934358–36.325644 MPixels/s
  • Programmable custom resolutions:
  • Display resolutions: 128×160 to 320×160, 128×224 to 160×224
  • Background tilemap planes: 128×160 to 768×512[42]
  • Bitmap framebuffer: Single/Double buffering, 128×160 to 320×408[n 8]
  • Mid-frame palette swap: Can use DMA to change color while drawing each scanline, sending more data/colors to the CRAM and DAC[43][24]
  • Colors on screen: 75 colors (Sonic 2) to 512 colors (demo with scrolling background)
  • Shadow/Highlight colors on screen: 114 colors (Sonic 2 prototype) to 1536 colors (demo with scrolling background)
  • Colors per pixel: 16 colors (4-bit) to 256 colors (8-bit)
  • Color palette: Up to 4096 colors (12-bit) for static bitmap images[44]
  • Direct color: Can use DMA to reprogram CRAM from a color palette to a direct color display[35]
  • Colors on screen: 256 colors (8-bit) to 512 colors (9-bit)
  • Static bitmap images: Up to 4096 colors (12-bit)[44]
  • Colors per pixel: 256 colors (8-bit) to 512 colors (9-bit)
  • Resolutions: 160×224, 128×224
  • 3D polygon graphics: Capable of 3D polygons with stock Mega Drive hardware (without needing enhancement chips), capable of 3D texture mapping,[45] can use DMA to render bitmap framebuffer (double-buffered) that displays 3D polygons[36][41]
  • Vertex transformations: 10,000 vertices/sec (767 cycles/vertex), 500 vertices/frame
  • Polygon transformations: 3300 polygons/sec (2301 cycles/triangle), 166 polygons/frame
  • Framebuffer rendering: 256×160, double-buffered, 15–30 FPS[46][n 9]
  • Flat shading: 1800 polygons/sec[n 10]
  • Texture mapping: 1000 polygons/sec[n 11]
  • Other DMA programmable capabilities: Scaling and rotation (like Sega X Board and Mode 7),[52][53] ray casting
  • Optional cartridge enhancement chip: Sega Virtua Processor (only used in Virtua Racing), enhances Mega Drive's 3D polygon performance. It can calculate geometry for 50,000 polygons/sec and render 20,000 polygons/sec. It also has higher memory, bandwidth, fillrate, framebuffer resolution, and frame rate.

Memory

  • System RAM: 136 KB
  • Main RAM: 64 KB (repeated over the upper 2 MB of address space)
  • VRAM: 64 KB
  • CRAM (Color RAM): 72 bytes (576 bits)
  • VSRAM (Vertical Scrolling RAM): 80 bytes (640 bits)
  • Sprite cache: 80 bytes (640 bits)[31][32]

Configuration

  • System memory buses:[1]
  • 16‑bit system bus — 68000 & VDP <‑> Main RAM & Cartridge ROM/RAM
  • 8‑bit system bus — Z80 & YM2612 <‑> Audio RAM
  • 8/16‑bit video bus — VDP <‑> VRAM
  • CPU access: 3.800245–5 MHz (200–263 ns)
  • Performance: 13.423294 MHz (NTSC, 74 ns), 13.300856 MHz (PAL, 75 ns)
  • FPM DRAM: 2048-bit internal (8x 256-bit arrays), 8-bit external (2x 4‑bit), 8.333333 MHz (120 ns),[55][63] 8 MHz (125 ns, when reading SAM)[55]
  • SAM buffer cache: 8-bit (2x 4‑bit), 13.423294 MHz (NTSC, 74 ns), 13.300856 MHz (PAL, 75 ns), VDP reads continuous stream of video screen refresh data from SAM while reading/writing DRAM[64]
  • Cartridge ROM chips: 16‑bit[69]

Bandwidth

  • System RAM bandwidth: 26.979911MB/s (NTSC), 26.857473 MB/s (PAL)
  • Main RAM: 10.526314 MB/s (16-bit, 5.263157 MHz)
  • CPU access: 5 MB/s
  • VRAM: 13.423294 MB/s (NTSC), 13.300856 MB/s (PAL)
  • FPM DRAM: 8.333333 MB/s (RAM), 8 MB/s (when reading SAM)
  • SAM buffer cache: 13.423294 MB/s (NTSC), 13.300856 MB/s (PAL)
  • Audio RAM: 3.030303 MB/s (8-bit, 3.030303 MHz)
  • Z80 access: 1.193182 MB/s (NTSC), 1.182298 MB/s (PAL)[73]
  • Cartridge ROM bandwidth: 10 MB/s (most cartridges), 15.200978–15.340906 MB/s (some cartridges)
  • 68000 access: 5 MB/s (5 MHz)
  • Z80 access: 1.191969 MB/s (NTSC), 1.181096 MB/s (PAL)[75]
  • Internal processor bandwidth:
  • 68000 internal bus: 30.681812 MB/s (NTSC, 32-bit, 7.670454 MHz), 30.401956 MB/s (PAL, 32-bit, 7.600489 MHz)
  • Z80 internal bus: 3.579545 MB/s (NTSC), 3.546894 MB/s (PAL)
  • VDP internal RAM cache: 26.846588 MB/s (NTSC, 16-bit, 13.423294 MHz), 26.601712 MB/s (PAL, 16-bit, 13.423294 MHz)

Memory map

Main article: Sega Mega Drive/Memory map.

Input

  • Controller input: Two male DE-9 controller ports; one female DE-9 expansion port (early MD1s only)
  • Controller ports support two modes: parallel and serial
  • Parallel supports 7‑bit bidirectional, with the console setting the direction of each bit.
  • Parallel also supports optional active‑low interrupts on the TH line. (mapped to 68000 IRQ 2)
  • Serial mode supports up to 4800 bps. (used by the Mega Modem on port 3)
  • Expansion port: Used for Sega CD.
  • Provides access to /FDC ($A120xx) and /DISK to indicate Sega CD presence.
  • Maps Sega CD PRG RAM to $000000 when no cartridge is present, $400000 otherwise.

Enhancements

Sega Virtua Processor

Main article: Sega Virtua Processor.

Add-ons

Notes

  1. ↑ [DMA transfer per frame during active display:
    • 224-line display: 11.822 KB (NTSC), 22.072 KB (PAL)
    • 192-line display: 17.806 KB (NTSC), 28.056 KB (PAL)
    • 160-line display: 23.995 KB (NTSC), 34.245 KB (PAL)
    DMA transfer per frame during active display:
    • 224-line display: 11.822 KB (NTSC), 22.072 KB (PAL)
    • 192-line display: 17.806 KB (NTSC), 28.056 KB (PAL)
    • 160-line display: 23.995 KB (NTSC), 34.245 KB (PAL)]
  2. ↑ [DMA transfer rate during active display:
    • 224-line display: 708.406 KB/s (NTSC), 1.09701 MB/s (PAL)
    • 192-line display: 1.066984 MB/s (NTSC), 1.394424 MB/s (PAL)
    • 160-line display: 1.437846 MB/s (NTSC), 1.702026 MB/s (PAL)
    DMA transfer rate during active display:
    • 224-line display: 708.406 KB/s (NTSC), 1.09701 MB/s (PAL)
    • 192-line display: 1.066984 MB/s (NTSC), 1.394424 MB/s (PAL)
    • 160-line display: 1.437846 MB/s (NTSC), 1.702026 MB/s (PAL)]
  3. ↑ [DMA transfer per frame during active display:
    • 224-line display: 23.644 KB (NTSC), 44.144 KB (PAL)
    • 160-line display: 47.99 KB (NTSC), 68.490 KB (PAL)
    DMA transfer per frame during active display:
    • 224-line display: 23.644 KB (NTSC), 44.144 KB (PAL)
    • 160-line display: 47.99 KB (NTSC), 68.490 KB (PAL)]
  4. ↑ [DMA transfer rate during active display:
    • 224-line display: 1.416813 MB/s (NTSC), 2.194021 MB/s (PAL)
    • 160-line display: 2.875692 MB/s (NTSC), 3.404052 MB/s (PAL)
    DMA transfer rate during active display:
    • 224-line display: 1.416813 MB/s (NTSC), 2.194021 MB/s (PAL)
    • 160-line display: 2.875692 MB/s (NTSC), 3.404052 MB/s (PAL)]
  5. ↑ [Write per frame during active display:
    • 224-line display: 23,644 pixels (NTSC), 44,144 pixels (PAL)
    • 160-line display: 47,990 pixels (NTSC), 68,490 pixels (PAL)
    Write per frame during active display:
    • 224-line display: 23,644 pixels (NTSC), 44,144 pixels (PAL)
    • 160-line display: 47,990 pixels (NTSC), 68,490 pixels (PAL)]
  6. ↑ [Write fillrate during active display:
    • 224-line display: 1.416813 MPixels/s (NTSC), 2.194021 MPixels/s (PAL)
    • 160-line display: 2.875692 MPixels/s (NTSC), 3.404052 MPixels/s (PAL)
    Write fillrate during active display:
    • 224-line display: 1.416813 MPixels/s (NTSC), 2.194021 MPixels/s (PAL)
    • 160-line display: 2.875692 MPixels/s (NTSC), 3.404052 MPixels/s (PAL)]
  7. ↑ [Tile transfer per frame during active display:
    • Standard 224-line display: 369 tiles (NTSC), 689 tiles (PAL)
    • Custom 160-line display: 749 tiles (NTSC), 1070 tiles (PAL)
    Tile transfer per frame during active display:
    • Standard 224-line display: 369 tiles (NTSC), 689 tiles (PAL)
    • Custom 160-line display: 749 tiles (NTSC), 1070 tiles (PAL)]
  8. ↑ [Bitmap framebuffer:
    • Single buffering: 128×160 to 512×256 and 320×408
    • Double buffering: 128×160 to 256×256 and 320×204
    Bitmap framebuffer:
    • Single buffering: 128×160 to 512×256 and 320×408
    • Double buffering: 128×160 to 256×256 and 320×204]
  9. ↑ [40 KB memory, 614.4 KB/s (15 FPS) to 1.2288 MB/s (30 FPS) bandwidth, 2.383275 CPU cycles per byte VRAM DMA transfer, 1.464285 MHz (15 FPS) to 2.928568 MHz (30 FPS) DMA, 4.741885 MHz (30 FPS) to 6.206168 MHz (15 FPS) remaining for polygons 40 KB memory, 614.4 KB/s (15 FPS) to 1.2288 MB/s (30 FPS) bandwidth, 2.383275 CPU cycles per byte VRAM DMA transfer, 1.464285 MHz (15 FPS) to 2.928568 MHz (30 FPS) DMA, 4.741885 MHz (30 FPS) to 6.206168 MHz (15 FPS) remaining for polygons]
  10. ↑ [32-pixel polygons, 15 FPS, scanline rendering, 250 cycles/scanline per poly,[47][48] 3301 cycles/poly (32-pixel), 166 polygons/frame
    • Polygon memory: 40 bytes/poly, 6.485 KB memory (166 polygons/frame), 72 KB/s bandwidth (1800 polygons/sec)
    32-pixel polygons, 15 FPS, scanline rendering, 250 cycles/scanline per poly,[47][48] 3301 cycles/poly (32-pixel), 166 polygons/frame
    • Polygon memory: 40 bytes/poly, 6.485 KB memory (166 polygons/frame), 72 KB/s bandwidth (1800 polygons/sec)]
  11. ↑ [38 cycles/texel,[49] 2432 draw cycles per 8×8 texel texture, 77 cycles DMA transfer (32 bytes) per 8×8 texel texture, 5810 cycles (2509 texture cycles) per 8×8 texel polygon 38 cycles/texel,[49] 2432 draw cycles per 8×8 texel texture, 77 cycles DMA transfer (32 bytes) per 8×8 texel texture, 5810 cycles (2509 texture cycles) per 8×8 texel polygon]

References

  1. ↑ 1.0 1.1 1.2 1.3 1.4 1.5 1.6 File:Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf
  2. ↑ https://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h
  3. ↑ Hardware and Computer Organization, page 136
  4. ↑ http://www.digitpress.com/faq/megadrive.htm
  5. ↑ 5.0 5.1 Ben Heck’s 16-Bit Console Wars! (6:07) (The Ben Heck Show)
  6. ↑ The 68000 Microprocessor, page 5
  7. ↑ Obsolete Microprocessors
  8. ↑ Yamaha YM2612 Emulation Core
  9. ↑ 9.0 9.1 ResComp 1.5 (April 2016)
  10. ↑ Dual PCM
  11. ↑ SN76496 (MAME)
  12. ↑ 12.0 12.1 12.2 Mega Drive PCB revisions
  13. ↑ 13.0 13.1 13.2 File:GenesisTechnicalOverview.pdf, page 2
  14. ↑ 14.0 14.1 File:GenesisTechnicalOverview.pdf, page 15
  15. ↑ Genesis (MESS)
  16. ↑ 16.0 16.1 File:GenesisTechnicalOverview.pdf, page 3
  17. ↑ File:CXA1145P datasheet.pdf
  18. ↑ File:MB3514 datasheet.pdf
  19. ↑ 315-5313 Information
  20. ↑ 20.0 20.1 20.2 20.3 File:GenesisTechnicalOverview.pdf, page 14
  21. ↑ Genesis Plus
  22. ↑ 22.0 22.1 22.2 File:GenesisTechnicalOverview.pdf, page 13
  23. ↑ 23.0 23.1 File:GenesisTechnicalOverview.pdf, page 46
  24. ↑ 24.0 24.1 24.2 24.3 24.4 24.5 How Sega Built the Genesis: Masami Ishikawa Inteview (Polygon)
  25. ↑ 25.0 25.1 Sega Genesis Comparison
  26. ↑ Sega Programming FAQ (October 18, 1995)
  27. ↑ Sega Master System VDP Documentation
  28. ↑ 28.0 28.1 28.2 28.3 28.4 28.5 Sega Genesis VDP Documentation
  29. ↑ 29.0 29.1 29.2 File:GenesisTechnicalOverview.pdf
  30. ↑ File:GenesisTechnicalOverview.pdf, page 79
  31. ↑ 31.0 31.1 VDP: Sprites
  32. ↑ 32.0 32.1 VDP Sprite (SGDK)
  33. ↑ Blast Processing 101
  34. ↑ SNES hardware specifications
  35. ↑ 35.0 35.1 Sega Genesis vs Super Nintendo
  36. ↑ 36.0 36.1 3D math engine (SGDK)
  37. ↑ Interview: Lee Actor (Sterling Software Programmer)
  38. ↑ Star Fox 3D Tech Demo on Sega Genesis
  39. ↑ Star Fox 3D Tech Demo on Sega Genesis: Version 2 Using DMA
  40. ↑ 40.0 40.1 40.2 File:GenesisTechnicalOverview.pdf, page 45
  41. ↑ 41.0 41.1 Bitmap engine (SGDK)
  42. ↑ Sonic the Hedgehog 2 (The Cutting Room Floor)
  43. ↑ The Man Responsible For Sega's Blast Processing (Nintendo Life)
  44. ↑ 44.0 44.1 How a SEGA GLITCH created stunning images
  45. ↑ D Polygonal Texturé - MegaDrive/Genesis (YouTube)
  46. ↑ Star Fox 3D Tech Demo on Sega Genesis: Version 2 Using DMA (YouTube)
  47. ↑ Polygon cycles
  48. ↑ 3D on the Sega Genesis is possible (SpritesMind)
  49. ↑ 3D on the Sega Genesis is possible
  50. ↑ 50.0 50.1 SONIC 3D's Intro Sequence Is Impossible To Fit On A Cartridge - Right?
  51. ↑ 51.0 51.1 Was Sega CD FMV really the best the Sega Mega Drive / Genesis Could do? Mike's Mega Drive FMV codec
  52. ↑ Sega Genesis Games That Pushed The Limits of Graphics & Sound (Racket Boy)
  53. ↑ Mode 7 demo for Genesis/MD (SpritesMind)
  54. ↑ 54.0 54.1 File:Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf, page 8
  55. ↑ 55.0 55.1 55.2 File:UPD41264 datasheet.pdf
  56. ↑ 2010's Sega Mega Drive RPG Pier Solar coming to Xbox 360, PC and Mac in HD, Eurogamer
  57. ↑ SSFII Genesis Technical Information (2000-07-26)
  58. ↑ MegaDrive/Genesis Pinouts
  59. ↑ File:HM65256B datasheet.pdf
  60. ↑ File:TC51832 datasheet.pdf
  61. ↑ File:HM53461 datasheet.pdf
  62. ↑ File:KM424C64 datasheet.pdf
  63. ↑ File:MB81461 datasheet.pdf
  64. ↑ Understanding VRAM and SGRAM Operation (page 3) (IBM)
  65. ↑ File:TMM2063P datasheet.pdf
  66. ↑ File:UPD4168 datasheet.pdf
  67. ↑ File:KM6264B datasheet.pdf
  68. ↑ File:LC3664R datasheet.pdf
  69. ↑ ROM Part Numbers
  70. ↑ File:MB834200A datasheet.pdf
  71. ↑ 71.0 71.1 File:MB838200B datasheet.pdf
  72. ↑ File:M27C322 datasheet.pdf
  73. ↑ 73.0 73.1 File:Zilog Z80 Programmer's Reference Manual.pdf, page 33
  74. ↑ Zilog Z80 (Mega Drive Wiki)
  75. ↑ [3 cycles per byte,[73] 100 cycles per 32 KB bank switch[74] 3 cycles per byte,[73] 100 cycles per 32 KB bank switch[74]]


Sega Mega Drive
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